onsemi NLV14011UBDR2G
- Part No.:
- NLV14011UBDR2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
NLV14011UBDR2G.pdf
- Description:
- IC GATE NAND 4CH 2-INP 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,034
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NLV14011UBDR2G from onsemi is a quad 2-input NAND gate CMOS logic IC designed for low-power, high-noise-immunity digital control in automotive and industrial systems. It operates across 3.0 V to 18 V supply, delivers ±10 mA output drive, supports −55 °C to +125 °C ambient range, and features double diode input protection. It serves as a core combinational logic element in power management sequencing and sensor interface signal conditioning.
For engineers reviewing the NLV14011UBDR2G datasheet, pinout, applications, or equivalent options, key selection criteria include its AEC-Q100 qualification, SOIC-14 package compatibility, rail-to-rail input voltage tolerance (−0.5 V to VDD + 0.5 V), and guaranteed 4.95 V VOH at 5 V VDD - critical for mixed-voltage system interfacing and legacy TTL load driving.
Technical Context
The NLV14011UBDR2G implements four independent 2-input NAND gates using complementary MOS (CMOS) P- and N-channel enhancement-mode transistors on a single monolithic die. Its logic function is non-inverting only when used with external inversion; the gate itself performs strict NAND Boolean operation with true active-low outputs.
It requires unused inputs tied to VSS or VDD to prevent floating node instability, and supports dynamic switching up to 180 ns propagation delay (at 5 V, CL = 50 pF). Input capacitance is 5.0–7.5 pF, and quiescent current per package is ≤1.0 µA at 15 V and 125 °C - enabling ultra-low standby power in battery-backed modules.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input NAND gate - enables compact implementation of AND/NAND-based enable, inhibit, and strobe logic without external inverters. |
| Supply Voltage Range | 3.0 V to 18 V DC - supports direct integration into 5 V, 12 V, and wide-input industrial power rails without level-shifting. |
| Operating Temperature | −55 °C to +125 °C - validated for under-hood automotive and harsh-environment industrial control applications. |
| Output Drive Capability | ±10 mA per pin - sufficient to directly drive two low-power TTL loads or one LS-TTL load across full temperature range. |
| Input Protection | Double diode clamping on all inputs - provides robust ESD immunity and transient overvoltage tolerance up to ±10 mA. |
| Quiescent Current | ≤1.0 µA at 15 V / 125 °C - ensures negligible battery drain in always-on monitoring circuits. |
| Propagation Delay | 40–180 ns (VDD = 5/10/15 V, CL = 50 pF) - enables reliable timing in sub-MHz control loops and debounce circuits. |
Pinout & Package
Package: SOIC-14 (Case 751A-03), 8.55 mm × 3.80 mm × 1.75 mm body, Pb-free, RoHS compliant, rated for reflow soldering up to 260 °C (8 s).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 4, 5, 8, 9, 12, 13 | Input (IN1A, IN2A, IN1B, IN2B, IN1C, IN2C, IN1D, IN2D) | CMOS-compatible logic inputs with double-diode ESD protection; must be tied to VSS or VDD if unused. |
| 3, 6, 10, 11 | Output (OUTA, OUTB, OUTC, OUTD) | Pull-up/pull-down complementary outputs capable of sourcing/sinking ≥0.36 mA at VOL = 0.4 V (5 V VDD). |
| 7 | VSS | Ground reference for all internal circuitry; required return path for input clamp diodes and output current sinks. |
| 14 | VDD | Positive supply rail; accepts 3.0–18 V DC; powers all four gates and internal protection networks. |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Qualified | Validated for automotive applications including engine control, body electronics, and ADAS subsystems requiring PPAP compliance. |
| Rail-to-Rail Input Tolerance | Accepts input voltages from −0.5 V to VDD + 0.5 V - eliminates need for external clamping in noisy environments. |
| Low Dynamic Power | Total supply current scales linearly with frequency (e.g., IT ≈ 0.3 µA/kHz × f + IDD/N at 5 V), enabling predictable power budgeting. |
| Pb-Free & RoHS Compliant | Meets global environmental regulations; compatible with lead-free reflow profiles and halogen-free board assembly requirements. |
| Pin-for-Pin CD4000 Compatibility | Direct drop-in replacement for legacy CD4011BE and MC14011UB in existing SOIC-14 layouts - no PCB redesign needed. |
Applications
| Automotive Power Sequencing | Industrial Sensor Interface |
|---|---|
|
Use Scenario: Controlling startup order of multiple ECUs by enabling downstream regulators only after primary rail stabilization. IC Role / Device Role: Quad NAND gate implementing AND-logic with reset hold-off and fault interlock functions. Use Value: Eliminates discrete logic and reduces BOM count while maintaining AEC-Q100 reliability and thermal margin across −40 °C to +125 °C. |
Use Scenario: Conditioning analog sensor outputs (e.g., thermistor bridges) before ADC sampling in PLC I/O modules. IC Role / Device Role: Signal gating and noise-filtered enable control for multiplexed sensor channels. Use Value: Leverages high noise immunity (≥4.5 V VIH at 15 V VDD) to reject EMI in factory-floor environments with motor drives and RF sources. |
| Medical Device Safety Logic | Consumer Appliance Control Panel |
|
Use Scenario: Implementing dual-redundant enable paths in infusion pump motor drivers to enforce hardware-level safety interlocks. IC Role / Device Role: NAND-based voting logic that deactivates actuation unless both independent sensors agree on safe state. Use Value: Provides fail-safe behavior with <1 µA quiescent draw - preserving battery life during standby while meeting IEC 62304 Class C requirements. |
Use Scenario: Debouncing mechanical keypad inputs and generating clean scan strobes in smart home appliance UIs. IC Role / Device Role: Input synchronization and pulse shaping for microcontroller GPIO inputs. Use Value: Reduces firmware overhead via hardware-level edge detection and eliminates software polling delays with guaranteed 40 ns min tPLH at 15 V. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NAND gate logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC14011UBDR2G | Same logic function, pinout, and electrical specs but rated for −55 °C to +125 °C without AEC-Q100 validation or PPAP support. | Approved for industrial and commercial use only; not qualified for automotive production programs. | Select MC14011UBDR2G where automotive qualification is unnecessary and cost sensitivity outweighs long-term supply assurance. |
| CD4011BM96 | Identical quad NAND function and SOIC-14 package, but wider propagation delay (200 ns max at 5 V), higher quiescent current (5 µA), and no AEC-Q100 or NLV prefix traceability. | Limited to non-automotive, non-safety-critical designs; lacks onsemi's automotive process controls and lot traceability. | Choose CD4011BM96 only for prototyping or legacy design refresh where AEC-Q100 compliance is not mandated. |
Compared with MC14011UBDR2G and CD4011BM96, the NLV14011UBDR2G uniquely combines automotive-grade qualification, lower leakage (<1 µA), tighter timing (40 ns min tPLH), and full traceability - making it the sole option for production-tier automotive electronics requiring PPAP documentation and zero-defect reliability.
Availability
NLV14011UBDR2G is available at Aetrix Electronics and suitable for automotive power sequencing, industrial sensor interface, medical device safety logic, and consumer appliance control panel applications requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.
Supply support for NLV14011UBDR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient silicon solutions for automotive, industrial, cloud, and IoT applications.
The NLV14011UBDR2G belongs to the UB-Suffix CMOS logic family, engineered specifically for high-reliability, low-power digital control in automotive and extended-temperature industrial systems - emphasizing noise immunity, wide-VDD operation, and AEC-Q100 compliance.
FAQ
What is the maximum supply voltage rating for NLV14011UBDR2G?
The NLV14011UBDR2G has an absolute maximum DC supply voltage (VDD) rating of +18.0 V, with operational specification guaranteed from 3.0 V to 18 V. Exceeding +18.0 V risks permanent damage, and operation below 3.0 V may result in undefined logic states or increased propagation delay. The NLV14011UBDR2G must be operated within this validated range to ensure compliance with AEC-Q100 stress testing and functional performance.
Is NLV14011UBDR2G pin-compatible with CD4011BE?
Yes, the NLV14011UBDR2G is pin-for-pin compatible with CD4011BE and other CD4000-series UB-suffix devices, sharing identical SOIC-14 pin assignments, logic function, and electrical interface characteristics. This allows direct replacement in legacy designs without layout changes, though the NLV14011UBDR2G adds AEC-Q100 qualification, tighter parametric tolerances, and enhanced ESD protection not present in standard CD4011BE.
What is the recommended handling for unused inputs on NLV14011UBDR2G?
Unused inputs on the NLV14011UBDR2G must be tied to either VSS (ground) or VDD (supply) to prevent floating nodes that cause excessive current draw, oscillation, or latch-up. For NAND gates, connecting unused inputs to VDD ensures they do not affect the logic output - a mandatory practice confirmed in the official datasheet to maintain stability across −55 °C to +125 °C operation.
Does NLV14011UBDR2G support mixed-voltage interfacing with 3.3 V microcontrollers?
Yes, the NLV14011UBDR2G supports mixed-voltage interfacing: its VIH threshold is 4.0 V (min) at 5 V VDD, and VIL is 1.0 V (max), allowing reliable recognition of 3.3 V logic-high signals when powered at 5 V. When powered at 3.3 V, VIH drops to ~1.3 V, enabling direct connection to 3.3 V MCU GPIOs - verified in the Electrical Characteristics table for NLV14011UBDR2G across all VDD conditions.
What packaging and reel specifications apply to NLV14011UBDR2G?
The NLV14011UBDR2G is supplied in Pb-free SOIC-14 (Case 751A-03) tape-and-reel format: 2500 units per reel, with standard orientation per onsemi BRD8011/D specification. The package dimensions are 8.55 mm × 3.80 mm × 1.75 mm, and the reel complies with EIA-481-D standards - ensuring compatibility with automated SMT placement equipment used in high-volume automotive and industrial manufacturing lines.
NLV14011UBDR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 4000B
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- NAND Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 3V ~ 18V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 3.5mA, 8.8mA
- Input Logic Level - Low:
- 1V ~ 2.5V
- Input Logic Level - High:
- 4V ~ 12.5V
- Max Propagation Delay @ V, Max CL:
- 80ns @ 15V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
NLV14011UBDR2G FAQ
1.How can I place an order for NLV14011UBDR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV14011UBDR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV14011UBDR2G reliable?
The price and inventory of NLV14011UBDR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV14011UBDR2G is usually 5 days.
3.What payment methods are accepted for NLV14011UBDR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV14011UBDR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV14011UBDR2G?
NLV14011UBDR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV14011UBDR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV14011UBDR2G?
For technical support, including NLV14011UBDR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV14011UBDR2G requirements.
6.How does Aetrix verify that NLV14011UBDR2G is sourced from the original manufacturer or authorized distributors?
All NLV14011UBDR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV14011UBDR2G meets industry standards.
7.What is the process for return or replacement of NLV14011UBDR2G?
All NLV14011UBDR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV14011UBDR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV14011UBDR2G part is unused and in its original packaging.
Return procedure for NLV14011UBDR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NLV14011UBDR2G Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

