onsemi NLV17SG08DFT2G
- Part No.:
- NLV17SG08DFT2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
NLV17SG08DFT2G.pdf
- Description:
- IC GATE AND 1CH 2-INP SC88A
- Quantity:
- Payment:

- Shipping:

Inventory:4,595
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Product details
Overview
NLV17SG08DFT2G from onsemi is a single 2-input CMOS AND gate optimized for ultra-low-voltage operation (0.9 V to 3.6 V), delivering 2.5 ns typical propagation delay at 3.0 V with 15 pF load, over-voltage tolerant inputs/outputs up to 3.6 V, and IOFF partial power-down protection - used in battery-powered sensor interfaces and low-power logic level translation.
For engineers reviewing the NLV17SG08DFT2G datasheet, pinout, applications, or equivalent options, key selection criteria include supply voltage range compatibility, propagation delay vs. load capacitance, input/output overvoltage tolerance, IOFF behavior during power sequencing, and SC-88A package footprint constraints.
Technical Context
The NLV17SG08DFT2G implements standard positive-logic AND functionality using advanced CMOS process technology, supporting rail-to-rail input switching thresholds that scale with VCC (e.g., VIH = 0.65×VCC min at 1.4–1.95 V). Its IOFF feature actively isolates inputs and outputs when VCC = 0 V, preventing back-driving of powered rails in partial-power-down systems.
Propagation delay is characterized across five VCC ranges (0.9 V to 3.6 V) and three load conditions (10/15/30 pF), with tPLH/tPHL as low as 2.2 ns (typ) at 3.0–3.6 V and CL = 15 pF. Input leakage remains ≤±1.0 µA over full temperature range (−55°C to +125°C), and ESD robustness meets HBM 2000 V and CDM 1000 V per JESD22.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 0.9 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| tPLH / tPHL | 2.5 ns (typ) at VCC = 3.0 V, CL = 15 pF - supports >200 MHz toggle rates in low-capacitance signal paths. |
| VIH / VIL | VIH = 0.65×VCC (min), VIL = 0.35×VCC (max) - ensures noise margin ≥35% of VCC across operating range. |
| IOFF Leakage | ≤10.0 µA at TA = −55°C to +125°C - prevents unintended current flow during system sleep or hot-swap events. |
| Overvoltage Tolerance | Inputs/outputs withstand up to 3.6 V regardless of VCC - allows safe interfacing with higher-voltage peripherals. |
| ESD Rating | HBM 2000 V, CDM 1000 V - exceeds IEC 61000-4-2 Level 2 requirements for board-level robustness. |
Pinout & Package
Package: SC-88A (SOT-353), 5-pin, 1.25 mm × 2.1 mm footprint, 0.65 mm pitch, moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | GND | Ground reference for all internal circuitry and output stage return path. |
| 2 | B | Second digital input; accepts 0.9–3.6 V logic signals independent of VCC. |
| 3 | A | First digital input; identical electrical characteristics to Pin 2. |
| 4 | NC | No connect - internally unconnected; must be left floating or tied to GND per layout best practice. |
| 5 | Y | AND gate output; drives CMOS loads up to ±20 mA with VOH ≥2.48 V and VOL ≤0.4 V at VCC = 3.3 V. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-voltage operation | Functional down to 0.9 V VCC - extends battery life in coin-cell and energy-harvesting applications. |
| Input/output overvoltage tolerance | Withstands 3.6 V applied to A/B/Y pins even when VCC = 0.9 V - eliminates need for external clamping diodes. |
| IOFF partial power-down protection | Blocks current flow between A/B/Y and GND/VCC when VCC = 0 V - prevents back-powering in multi-rail systems. |
| Pb-free, Halogen-free, RoHS-compliant | Meets IPC/JEDEC J-STD-609 Class 1 moisture sensitivity and automotive AEC-Q101 qualification (NLV prefix variant). |
Applications
| IoT Sensor Node Logic | Automotive Body Control Module |
|---|---|
Use Scenario: Combining wake-up signals from multiple MEMS sensors before triggering MCU interrupt. IC Role / Device Role / Timing Role: Single 2-input AND gate performing synchronous enable gating with sub-3 ns delay. Use Value: Reduces quiescent current by enabling logic-controlled power gating while maintaining timing integrity across 0.9–3.6 V supply variation. | Use Scenario: Interlocking door lock actuator enable with ignition status and door-closed confirmation. IC Role / Device Role / Timing Role: Safety-critical combinational logic element verifying dual conditions before enabling high-side driver. Use Value: AEC-Q101 qualified operation and IOFF isolation ensure fail-safe behavior during battery voltage sag or partial power loss. |
| Wearable Health Monitor | Industrial PLC I/O Expansion |
Use Scenario: Enabling ECG analog front-end only when both motion-detection and user-press signals are active. IC Role / Device Role / Timing Role: Low-power combinatorial gate coordinating event-driven subsystem activation. Use Value: 0.9 V operation allows direct integration with buck-boost regulators powering mixed-voltage subsystems. | Use Scenario: Validating fieldbus communication readiness before asserting module ready flag to controller. IC Role / Device Role / Timing Role: Interface-level logic gate synchronizing local status with bus arbitration state. Use Value: Overvoltage-tolerant I/O permits direct connection to 5 V fieldbus lines without level-shifting components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input AND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G08DBVR | Wider VCC range (1.65–5.5 V); no IOFF; 3.7 ns typical delay at 3.3 V/15 pF. | Not rated for <1.2 V operation; lacks partial power-down protection. | Select when interfacing with 5 V systems and IOFF is not required. |
| 74LVC1G08GW,125 | Same VCC range (1.65–5.5 V); SC-70 package; no IOFF; 3.2 ns typical delay at 3.3 V/15 pF. | Higher minimum VCC excludes sub-1.2 V use cases; no overvoltage tolerance beyond VCC. | Choose for cost-sensitive industrial designs where 1.65 V minimum VCC is acceptable. |
Compared with SN74LVC1G08DBVR and 74LVC1G08GW,125, the NLV17SG08DFT2G uniquely supports 0.9 V operation, provides IOFF isolation, and tolerates 3.6 V on I/O pins irrespective of VCC - making it essential for ultra-low-power, multi-rail, and automotive body electronics where voltage sequencing and robustness are critical.
Availability
NLV17SG08DFT2G is available at Aetrix Electronics and suitable for IoT sensor nodes, automotive body control modules, and wearable health monitors requiring stable component supply, long-term lifecycle support, and AEC-Q101 qualified parts.
Supply support for NLV17SG08DFT2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, delivering silicon solutions for automotive, industrial, cloud, medical, and IoT applications.
The NLV17SG08DFT2G belongs to the MiniGate family of ultra-small-footprint logic devices, designed specifically for space-constrained, low-power, and multi-voltage embedded systems where traditional logic families cannot operate reliably below 1.2 V.
FAQ
What is the minimum supply voltage for reliable operation of NLV17SG08DFT2G?
The NLV17SG08DFT2G is fully specified down to 0.9 V VCC, with guaranteed functionality including propagation delay, input thresholds, and output drive strength across the entire −55°C to +125°C temperature range. Below 0.9 V, timing and logic behavior are not characterized, and operation is not assured. The NLV17SG08DFT2G achieves this via process optimization for ultra-low-threshold CMOS transistors.
Does NLV17SG08DFT2G support partial power-down mode, and how does it behave?
Yes, NLV17SG08DFT2G supports partial power-down via its IOFF feature: when VCC = 0 V, input and output terminals are actively isolated, limiting leakage current to ≤10.0 µA over temperature. This prevents back-driving of powered rails in multi-supply systems. The NLV17SG08DFT2G maintains this behavior regardless of input or output voltage levels up to 3.6 V.
Can NLV17SG08DFT2G inputs accept 3.6 V signals when VCC is only 1.2 V?
Yes, NLV17SG08DFT2G inputs are over-voltage tolerant up to 3.6 V independent of VCC value. This is confirmed in the datasheet's "Inputs/Outputs Over-Voltage Tolerant up to 3.6 V" feature and Maximum Ratings table (VIN = −0.5 to +4.3 V). The NLV17SG08DFT2G uses internal clamp structures that safely shunt excess voltage without damage or logic corruption.
What is the propagation delay of NLV17SG08DFT2G at 1.8 V supply and 15 pF load?
At VCC = 1.8 V and CL = 15 pF, the NLV17SG08DFT2G exhibits tPLH/tPHL of 4.5 ns (typ) and 7.0 ns (max) over temperature, per Table 4 of the datasheet. This performance enables reliable 100+ MHz signal routing in 1.8 V domains. The NLV17SG08DFT2G maintains consistent delay scaling across VCC due to its adaptive threshold design.
Is NLV17SG08DFT2G qualified for automotive applications?
Yes, the NLV17SG08DFT2G is AEC-Q101 qualified and PPAP capable, as explicitly stated in the datasheet under "−Q Suffix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements". The "NLV" prefix denotes automotive-grade screening, and the part is manufactured in onsemi's certified automotive facilities. The NLV17SG08DFT2G meets stringent reliability, thermal, and ESD requirements for under-hood and body electronics.
NLV17SG08DFT2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- AND Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 0.9V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 8mA, 8mA
- Input Logic Level - Low:
- 0.7V ~ 0.8V
- Input Logic Level - High:
- 1.7V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 5.4ns @ 3.3V, 30pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-88A (SC-70-5/SOT-353)
NLV17SG08DFT2G FAQ
1.How can I place an order for NLV17SG08DFT2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV17SG08DFT2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV17SG08DFT2G reliable?
The price and inventory of NLV17SG08DFT2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV17SG08DFT2G is usually 5 days.
3.What payment methods are accepted for NLV17SG08DFT2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV17SG08DFT2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV17SG08DFT2G?
NLV17SG08DFT2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV17SG08DFT2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV17SG08DFT2G?
For technical support, including NLV17SG08DFT2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV17SG08DFT2G requirements.
6.How does Aetrix verify that NLV17SG08DFT2G is sourced from the original manufacturer or authorized distributors?
All NLV17SG08DFT2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV17SG08DFT2G meets industry standards.
7.What is the process for return or replacement of NLV17SG08DFT2G?
All NLV17SG08DFT2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV17SG08DFT2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV17SG08DFT2G part is unused and in its original packaging.
Return procedure for NLV17SG08DFT2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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