onsemi NLV18SZ07DFT2G
- Part No.:
- NLV18SZ07DFT2G
- Manufacturer:
- onsemi
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
NLV18SZ07DFT2G.pdf
- Description:
- IC BUFFER NON-INVERT 5.5V SC88A
- Quantity:
- Payment:

- Shipping:

Inventory:2,577
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NLV18SZ07DFT2G from onsemi is an automotive-grade single CMOS open-drain buffer logic gate in SC-88A (SOT-353) package, operating from 1.65 V to 5.5 V, with 3.7 ns typical propagation delay at 3.0 V and ±24 mA output drive capability, used for level-shifting and wired-OR bus interfacing in vehicle body control modules.
For engineers reviewing the NLV18SZ07DFT2G datasheet, pinout, applications, or equivalent options, key selection criteria include open-drain output architecture, AEC-Q100 Grade 1 qualification (−40°C to +125°C), SC-88A footprint compatibility, and 5.5 V absolute maximum supply rating.
Technical Context
The NLV18SZ07DFT2G implements a single-channel open-drain buffer with active-high input and high-impedance output in tri-state mode when input is low. It features symmetrical output impedance and balanced tPLH/tPHL propagation delays under defined load conditions (RL = 1 MΩ, CL = 15 pF).
Its DC electrical behavior includes input threshold voltages (VT+ = 1.9 V, VT− = 0.6 V at VCC = 3.0 V), hysteresis of 1.2 V, and guaranteed VOL ≤ 0.28 V at IOL = 12 mA - enabling robust noise immunity and reliable pull-up interface design in mixed-voltage automotive subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - supports direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| tPD (Typ) | 3.7 ns at VCC = 3.0 V, RL = 1 MΩ, CL = 15 pF - enables high-speed signal buffering in CAN/LIN peripheral interfaces |
| IOL (Max) | 24 mA at VCC = 3.0 V - drives standard 4.7 kΩ pull-up resistors on 3.3 V buses without voltage droop |
| Operating Temp | −40°C to +125°C (AEC-Q100 Grade 1) - qualified for under-hood and cabin control unit deployment |
| Input Hysteresis | 1.2 V at VCC = 3.0 V - suppresses false triggering from EMI-induced input noise in automotive harness environments |
| ESD Rating | 2000 V HBM - meets ISO 10605 requirements for electrostatic discharge robustness in assembly and field operation |
| Package | SC-88A (SOT-353), 5-pin - 2.2 mm × 1.35 mm footprint compatible with space-constrained PCB layouts |
Pinout & Package
SC-88A (Case 419A-02) is a 5-pin surface-mount package with gull-wing leads, 0.65 mm pitch, and exposed pad not present. Pin 1 is marked by a dot or beveled corner per tape-and-reel orientation diagram.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | N.C. | No internal connection - must remain unconnected; floating or tied to GND/VCC has no functional impact |
| 2 | A | Active-high digital input - logic high enables output pull-down; logic low places Y in high-impedance state |
| 3 | GND | Ground reference - shared return path for input/output current and internal biasing networks |
| 4 | Y | Open-drain output - sinks current when A = HIGH; presents Hi-Z when A = LOW; requires external pull-up |
| 5 | VCC | Positive supply - powers internal logic and output stage; decoupling capacitor (100 nF) recommended near pin |
Key Features
| Feature | Design Value |
|---|---|
| Open-drain output architecture | Enables wired-OR bus configurations and level translation between disparate voltage domains without direction control logic |
| AEC-Q100 Grade 1 qualification | Validated for continuous operation from −40°C to +125°C ambient, meeting automotive electronics reliability and lifetime requirements |
| High noise immunity | Input hysteresis ≥1.2 V and VIH/VIL margins >30% of VCC ensure stable switching in electrically noisy engine bay environments |
| Low quiescent current | ICC ≤ 1 µA max at TA = 25°C - minimizes standby power in always-on vehicle modules such as door lock controllers |
| Pb-free, RoHS-compliant packaging | Meets EU Directive 2011/65/EU and automotive ELV requirements; compatible with lead-free reflow soldering profiles (peak 260°C) |
Applications
| Body Control Module (BCM) Input Monitoring | LIN Bus Transceiver Interface |
|---|---|
|
Use Scenario: Detecting door ajar switch status across multiple doors using shared pull-up resistor network. IC Role / Device Role / Timing Role: Open-drain buffer isolates mechanical switch signals and aggregates them onto single LIN-compatible diagnostic line. Use Value: Eliminates need for discrete MOSFETs or optocouplers; reduces BOM count while maintaining fail-safe open-circuit detection. |
Use Scenario: Driving LIN physical layer transceiver enable pin from 3.3 V microcontroller GPIO. IC Role / Device Role / Timing Role: Level-shifting buffer translates 3.3 V logic to 12 V LIN bus domain via external pull-up, ensuring clean edge timing. Use Value: Guarantees <3.7 ns propagation delay and <0.28 V VOL at 12 mA sink - meets LIN 2.2a timing budget for dominant/recessive transitions. |
| Automotive Lighting Dimming Control | Smart Junction Box Power Sequencing |
|
Use Scenario: Controlling PWM dimming signal routing to LED driver ICs in headlamp assemblies. IC Role / Device Role / Timing Role: Open-drain gate buffers microcontroller PWM output before feeding into current-sink LED drivers with varying supply rails. Use Value: Supports mixed 5 V and 12 V LED driver supplies via configurable pull-up; maintains <1% duty cycle distortion up to 20 kHz. |
Use Scenario: Enabling sequential power-up of sub-systems (e.g., radio → HVAC → display) based on ignition state. IC Role / Device Role / Timing Role: Buffer gates ignition-switched 12 V signal to enable downstream LDOs and PMICs with precise timing alignment. Use Value: Delivers 24 mA sink current to drive base/gate of power MOSFETs directly - removes need for additional driver stages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar open-drain buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74VHC1G07DTT1G | Non-automotive grade; rated −40°C to +85°C only; identical SC-88A pinout and open-drain function | Lacks AEC-Q100 qualification and extended temperature support - unsuitable for under-hood use | Select only for non-automotive industrial or consumer designs where cost sensitivity outweighs qualification needs |
| SN74LVC1G07DBVR | Industrial grade (−40°C to +125°C), but not AEC-Q100 qualified; same 5-pin SC-70 package, slightly higher ICC (10 µA) | Acceptable for cabin modules with controlled thermal environment, but not PPAP-capable for Tier 1 OEM sourcing | Prefer when existing board layout uses SC-70 and qualification documentation is not required by customer |
Compared with NLV18SZ07DFT2G, MC74VHC1G07DTT1G offers identical functionality at lower cost but lacks automotive qualification, while SN74LVC1G07DBVR provides extended temperature range without formal AEC-Q100 validation - making NLV18SZ07DFT2G the sole choice for production-critical, PPAP-mandated vehicle systems.
Availability
NLV18SZ07DFT2G is available at Aetrix Electronics and suitable for automotive body electronics, lighting control systems, and LIN subsystem integration requiring stable component supply across multi-year vehicle production cycles.
Supply support for NLV18SZ07DFT2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power, analog, sensor, and logic solutions for automotive, industrial, and cloud infrastructure markets.
The NLV18SZxx family delivers high-speed, low-power automotive logic gates optimized for body electronics, powertrain interfaces, and ADAS subsystems where AEC-Q100 compliance and thermal resilience are mandatory.
FAQ
What is the absolute maximum supply voltage for NLV18SZ07DFT2G?
The absolute maximum DC supply voltage (VCC) for NLV18SZ07DFT2G is +6.5 V, as specified in Table 1 Maximum Ratings. Operation above this voltage risks permanent damage. For reliable long-term performance, the device must be operated within the recommended range of 1.65 V to 5.5 V per Table 2. NLV18SZ07DFT2G is not rated for 6 V system rails unless transient clamping is implemented externally.
Does NLV18SZ07DFT2G have a defined output high voltage (VOH)?
No - NLV18SZ07DFT2G does not specify VOH because it features an open-drain output. The output voltage in the high state is determined solely by the external pull-up resistor and its connected supply rail. Per Note 5 in the datasheet, VOH is not applicable to open-drain devices like NLV18SZ07DFT2G, NLV18SZ06DFT2G, and others in the series.
Can NLV18SZ07DFT2G drive a 4.7 kΩ pull-up resistor on a 5 V bus?
Yes - NLV18SZ07DFT2G can reliably drive a 4.7 kΩ pull-up on a 5 V bus. At VCC = 5.5 V and IOL = 12 mA, VOL is guaranteed ≤ 0.4 V (Table 3), yielding a worst-case output low voltage of 0.4 V - well within TTL and CMOS logic thresholds. This ensures clean signal integrity for wired-OR bus topologies in NLV18SZ07DFT2G-based designs.
Is NLV18SZ07DFT2G pin-compatible with other SC-88A logic buffers?
Yes - NLV18SZ07DFT2G shares the identical SC-88A (SOT-353) 5-pin pinout with other NLV18SZxx variants including NLV18SZ04DFT2G (inverter) and NLV18SZ16DFT2G (buffer). Pin 1 is N.C., Pin 2 is input, Pin 3 is GND, Pin 4 is output, and Pin 5 is VCC - enabling drop-in substitution within the same function group when redesigning for different logic types.
What is the thermal resistance (θJA) of NLV18SZ07DFT2G in typical PCB layout?
The junction-to-ambient thermal resistance (θJA) of NLV18SZ07DFT2G is 659°C/W, measured on an FR4 board with minimum pad spacing, using a 10 mm × 1 inch, 20 oz copper trace and no airflow (Note 2, Table 1). This value assumes standard JEDEC test conditions; actual θJA will improve with enhanced copper pour and thermal vias in production PCBs hosting NLV18SZ07DFT2G.
NLV18SZ07DFT2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 18SZ
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- -
- Number of Bits per Element:
- -
- Input Type:
- -
- Output Type:
- -
- Current - Output High, Low:
- 32mA, 32mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-88A (SC-70-5/SOT-353)
NLV18SZ07DFT2G FAQ
1.How can I place an order for NLV18SZ07DFT2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV18SZ07DFT2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV18SZ07DFT2G reliable?
The price and inventory of NLV18SZ07DFT2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV18SZ07DFT2G is usually 5 days.
3.What payment methods are accepted for NLV18SZ07DFT2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV18SZ07DFT2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV18SZ07DFT2G?
NLV18SZ07DFT2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV18SZ07DFT2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV18SZ07DFT2G?
For technical support, including NLV18SZ07DFT2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV18SZ07DFT2G requirements.
6.How does Aetrix verify that NLV18SZ07DFT2G is sourced from the original manufacturer or authorized distributors?
All NLV18SZ07DFT2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV18SZ07DFT2G meets industry standards.
7.What is the process for return or replacement of NLV18SZ07DFT2G?
All NLV18SZ07DFT2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV18SZ07DFT2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV18SZ07DFT2G part is unused and in its original packaging.
Return procedure for NLV18SZ07DFT2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NLV18SZ07DFT2G Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

