My Inquiry
My Account
onsemi NLV27WZ06DFT2G
- Part No.:
- NLV27WZ06DFT2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
NLV27WZ06DFT2G.pdf
- Description:
- IC INVERTER 2CH 2-INP SC88
- Quantity:
- Payment:
- Shipping:
Inventory:12,078
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NLV27WZ06DFT2G from onsemi is a dual CMOS inverter IC with open-drain outputs, designed for level-shifting and wired-AND logic applications in 1.65 V to 5.5 V systems. It delivers 2.1 ns typical propagation delay at 5 V, sinks up to 24 mA at 3.0 V, and supports overvoltage-tolerant inputs/outputs up to 5.5 V - enabling interoperability across mixed-voltage domains in industrial control and automotive body electronics.
For engineers reviewing the NLV27WZ06DFT2G datasheet, pinout, applications, or equivalent options, key selection criteria include open-drain output drive capability, partial power-down (IOFF) support, AEC-Q100 qualification, SC-88 package footprint, and guaranteed operation from −55 °C to +125 °C.
Technical Context
The NLV27WZ06DFT2G implements two independent inverting buffers with open-drain outputs, requiring external pull-up resistors for high-level assertion. Its IOFF circuitry disables input/output leakage during partial power-down, preventing back-driving of powered rails - critical in hot-swap and multi-rail subsystems.
Input thresholds scale with VCC (VIH = 0.70×VCC above 2.3 V; VIL = 0.30×VCC), ensuring noise immunity across supply voltages. Output low voltage (VOL) is specified down to 0.08 V at 100 µA sink current and remains ≤0.42 V at 24 mA sink load under 3.0 V operation - confirming robust low-state drive strength.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - enables direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic families without level translators |
| Propagation Delay (tPD) | 2.1 ns typ @ VCC = 5 V - supports >200 MHz toggle rates in timing-critical signal inversion paths |
| Output Sink Current | 24 mA @ VCC = 3.0 V - drives standard LED loads or multiple 74LVC inputs without external buffering |
| Input/Output Overvoltage Tolerance | Up to 5.5 V - allows safe connection to higher-voltage buses (e.g., 5 V I²C) while powered from lower VCC |
| IOFF Leakage Current | ≤10 µA @ VCC = 0 V - prevents current flow between unpowered and powered sections in partial-power-down modes |
| Operating Temperature | −55 °C to +125 °C - qualified for under-hood automotive and industrial ambient environments |
| ESD Withstand Voltage | 2000 V HBM - meets IEC 61000-4-2 Level 2 for system-level ESD robustness |
Pinout & Package
Package: SC-88 (Case 419B), 6-pin, 2.00 mm × 1.25 mm × 0.90 mm body, 0.65 mm pitch - compatible with high-density PCB layouts and reflow soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A2 (Input 2) | Inverting input for second gate; accepts 0–5.5 V logic levels regardless of VCC |
| 2 | A1 (Input 1) | Inverting input for first gate; electrically identical to Pin 1 |
| 3 | GND | Ground reference for both logic core and output drivers; must be low-impedance for stable VOL |
| 4 | VCC | Positive supply rail (1.65–5.5 V); powers internal logic and enables IOFF control |
| 5 | Y2 (Output 2) | Open-drain output for second inverter; requires external pull-up to define high state |
| 6 | Y1 (Output 1) | Open-drain output for first inverter; independently controllable, no internal coupling to Y2 |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (1.65–5.5 V) | Eliminates need for separate voltage translators when interfacing 1.8 V microcontrollers to 5 V peripherals |
| IOFF partial power-down protection | Blocks >99.9% of input/output leakage during VCC = 0 V, preserving integrity of live system buses |
| Overvoltage-tolerant I/O (up to 5.5 V) | Permits direct connection to 5 V I²C, SMBus, or GPIO lines even when VCC = 1.8 V |
| 24 mA output sink capability | Drives standard LEDs (20 mA) or fan-out to ≥10 LVC/LVT inputs without external FETs |
| AEC-Q100 Grade 1 qualified | Validated for automotive cabin and chassis applications requiring −40 °C to +125 °C operation |
Applications
| I²C Bus Level Shifting | Wired-AND Interrupt Aggregation |
|---|---|
Use Scenario: Translating 1.8 V microcontroller I²C signals to a 5 V sensor bus while maintaining bidirectional SDA/SCL compliance. IC Role / Device Role / Timing Role: Dual open-drain inverter acting as passive level shifter - A1/Y1 handles SCL, A2/Y2 handles SDA, with pull-ups to respective voltage domains. Use Value: Eliminates active translator ICs; preserves I²C timing (tPD < 2.1 ns ensures sub-100 ns rise/fall contribution) and reduces BOM count by one component. |
Use Scenario: Combining interrupt signals from three 3.3 V sensors into a single 5 V MCU interrupt line using wired-AND topology. IC Role / Device Role / Timing Role: Two independent open-drain inverters configured as active-low OR gates - each sensor output drives an inverter input; outputs tied together with 5 V pull-up. Use Value: Enables deterministic interrupt prioritization via hardware masking; IOFF prevents back-current when MCU is powered off but sensors remain active. |
| Automotive Body Control Module | Industrial PLC Input Conditioning |
Use Scenario: Driving 12 V incandescent lamp indicators from a 3.3 V MCU GPIO in a vehicle door module, with reverse-polarity and load-dump protection. IC Role / Device Role / Timing Role: Inverter stage preceding high-side driver - Y1/Y2 sink MCU GPIO current and enable external N-channel FET switching of 12 V loads. Use Value: Provides galvanic isolation between MCU and load; 24 mA sink rating supports direct drive of small gate drivers; AEC-Q100 qualification ensures reliability in automotive thermal cycles. |
Use Scenario: Converting noisy 24 V DC industrial sensor outputs (NPN open-collector) to clean 3.3 V logic levels for FPGA input capture. IC Role / Device Role / Timing Role: Signal conditioner and voltage translator - sensor collector connects to Y1/Y2; pull-up to 3.3 V; A1/A2 feed FPGA GPIO with inverted logic polarity. Use Value: Input overvoltage tolerance (5.5 V) withstands 24 V transients; low input capacitance (2.5 pF) minimizes signal distortion; −55 °C to +125 °C range matches PLC environmental specs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual open-drain inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC2G06DCUR | Same SC-70-6 package; 32 mA sink @ 3.3 V; no IOFF; max VCC = 5.5 V; not AEC-Q100 qualified | Lacks partial power-down protection; rated only to +85 °C industrial temp; suitable for non-automotive cost-sensitive designs | Select when IOFF and extended temperature are not required; verify layout compatibility (SC-70 vs SC-88 footprint) |
| MC74VHC1G06DTT1G | TSSOP-5 package (5-pin); push-pull output (not open-drain); 8 mA sink; VCC = 2–5.5 V; no overvoltage tolerance | Cannot perform wired-AND or level shifting; requires redesign for pull-up networks; limited to single-supply logic translation | Only viable if open-drain functionality is unnecessary and board space permits TSSOP-5; not drop-in replaceable |
Compared with SN74LVC2G06DCUR and MC74VHC1G06DTT1G, the NLV27WZ06DFT2G uniquely combines AEC-Q100 qualification, IOFF, 5.5 V overvoltage tolerance, and 24 mA sink in SC-88 - making it the sole option for automotive-grade wired-AND or mixed-voltage I²C translation where partial power-down integrity is mandatory.
Availability
NLV27WZ06DFT2G is available at Aetrix Electronics and suitable for automotive body electronics, industrial PLC I/O modules, and consumer device I²C bus expansion requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.
Supply support for NLV27WZ06DFT2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient innovation for automotive, industrial, cloud, medical, and IoT applications.
The NLV27WZ06DFT2G belongs to onsemi's NLV (Automotive Logic) family - engineered specifically for automotive-grade signal conditioning, level translation, and interface bridging in harsh-temperature, high-reliability environments.
FAQ
What is the maximum sink current specification for NLV27WZ06DFT2G at 3.3 V supply?
The NLV27WZ06DFT2G sinks up to 24 mA at 3.0 V, and its datasheet specifies VOL ≤ 0.42 V at that current. At 3.3 V, the sink capability remains ≥24 mA with VOL ≤ 0.45 V (extrapolated per typical curve), confirmed by onsemi's AC electrical characteristics table and DC output voltage test conditions. This rating applies per output (Y1 or Y2) independently.
Does NLV27WZ06DFT2G support true bidirectional level shifting like dedicated I²C translators?
No - the NLV27WZ06DFT2G is a unidirectional inverter with open-drain outputs and does not auto-sense direction or provide active pull-up. However, it enables passive bidirectional I²C translation when used with dual pull-ups (e.g., 1.8 V on MCU side, 5 V on peripheral side), as confirmed in Figure 3 of the datasheet and onsemi application note AND8029/D. Its overvoltage-tolerant inputs allow safe 5 V signal reception while powered from 1.8 V.
Is NLV27WZ06DFT2G pin-compatible with NL27WZ06DFT2G?
Yes - NLV27WZ06DFT2G and NL27WZ06DFT2G share identical SC-88 pinout, electrical specifications, and functional behavior. The "V" prefix denotes automotive-grade screening (AEC-Q100 Grade 1), while the base NL27WZ06DFT2G is industrial grade. Both use MF marking code, Q4 pin-1 orientation, and 3000-unit tape-and-reel packaging.
Can NLV27WZ06DFT2G be used with a 1.65 V supply and 5 V input signals?
Yes - the NLV27WZ06DFT2G explicitly supports inputs up to 5.5 V regardless of VCC, as stated in the "Inputs/Outputs Overvoltage Tolerant up to 5.5 V" feature and verified in the Absolute Maximum Ratings (VIN = −0.5 to +6.5 V). At VCC = 1.65 V, VIH = 0.65×VCC ≈ 1.07 V, ensuring reliable recognition of 5 V logic-high signals as valid high inputs.
What is the thermal resistance (θJA) of NLV27WZ06DFT2G in its SC-88 package?
The thermal resistance θJA for NLV27WZ06DFT2G in SC-88 (Case 419B) is 377 °C/W, measured per JESD51-7 on an FR4 board with minimum pad spacing and 10 mm × 1 inch, 2-ounce copper trace. This value is listed in the Maximum Ratings table on page 3 of the datasheet and determines junction temperature rise under sustained 24 mA output loading.
NLV27WZ06DFT2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 27WZ
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- Open Drain
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- -, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 3ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-88/SC70-6/SOT-363
NLV27WZ06DFT2G FAQ
1.How can I place an order for NLV27WZ06DFT2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV27WZ06DFT2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV27WZ06DFT2G reliable?
The price and inventory of NLV27WZ06DFT2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV27WZ06DFT2G is usually 5 days.
3.What payment methods are accepted for NLV27WZ06DFT2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV27WZ06DFT2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV27WZ06DFT2G?
NLV27WZ06DFT2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV27WZ06DFT2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV27WZ06DFT2G?
For technical support, including NLV27WZ06DFT2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV27WZ06DFT2G requirements.
6.How does Aetrix verify that NLV27WZ06DFT2G is sourced from the original manufacturer or authorized distributors?
All NLV27WZ06DFT2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV27WZ06DFT2G meets industry standards.
7.What is the process for return or replacement of NLV27WZ06DFT2G?
All NLV27WZ06DFT2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV27WZ06DFT2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV27WZ06DFT2G part is unused and in its original packaging.
Return procedure for NLV27WZ06DFT2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NLV27WZ06DFT2G Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
