onsemi NLV74HC00ADTR2G
- Part No.:
- NLV74HC00ADTR2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
NLV74HC00ADTR2G.pdf
- Description:
- IC GATE NAND 4CH 2-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NLV74HC00ADTR2G from onsemi is a quad 2-input NAND gate in TSSOP-14 package, designed for high-performance silicon-gate CMOS logic applications. It operates across 2 V to 6 V supply, delivers 10 LSTTL load drive capability, and features low input current (±0.1 µA), high noise immunity, and AEC-Q100 qualification for automotive use - deployed in engine control units and body electronics.
For engineers reviewing the NLV74HC00ADTR2G datasheet, pinout, applications, or equivalent options, this page provides verified functional specifications, validated pin assignments, automotive-grade thermal and ESD performance data, and direct alternative part comparisons for design-in and BOM optimization.
Technical Context
The NLV74HC00ADTR2G implements four independent NAND gates with identical pinout to LS00 TTL logic, enabling drop-in replacement in legacy designs. Its inputs are compatible with both standard CMOS outputs and LSTTL outputs when pullup resistors are used.
It supports full-rail input voltage range (0–VCC) and guarantees rail-to-rail output swing under load. Propagation delay is 13 ns typical at VCC = 6 V, with output transition time ≤19 ns, meeting JEDEC Standard No. 7A for high-speed digital logic interoperability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input NAND gate - enables compact implementation of combinational logic, inverters (via tied inputs), and basic control gating. |
| Supply Voltage Range | 2.0 V to 6.0 V - supports mixed-voltage systems including 3.3 V microcontrollers and 5 V legacy peripherals. |
| Propagation Delay | 13 ns max at VCC = 6 V - ensures timing-critical signal conditioning in automotive sensor interfaces and power sequencers. |
| Output Drive | ±4.0 mA at VCC = 4.5 V - sufficient to directly drive LEDs, small MOSFET gates, or additional CMOS/TTL loads without buffers. |
| Input Leakage Current | ±0.1 µA max at VCC = 6 V - minimizes standby power in always-on vehicle modules such as door latch controllers. |
| Operating Temperature | −55 °C to +125 °C - qualified for under-hood and chassis-mounted automotive ECUs per AEC-Q100 Grade 1. |
| ESD Rating | HBM >2000 V - enhances robustness against handling and assembly electrostatic discharge in production environments. |
Pinout & Package
TSSOP-14 (Case 948G), 4.9 mm × 4.4 mm × 1.2 mm profile, lead-free and RoHS compliant. Surface-mount package optimized for high-density PCB layouts and automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A1 (Input) | First input of Gate 1 - must be tied to defined logic level if unused to prevent floating node instability. |
| 2 | B1 (Input) | Second input of Gate 1 - paired with Pin 1 to generate Y1 = A1·B1 (NAND function). |
| 3 | Y1 (Output) | Output of Gate 1 - rail-to-rail CMOS swing, capable of sourcing/sinking up to ±4.0 mA at 4.5 V. |
| 4 | A2 (Input) | First input of Gate 2 - electrically isolated from other gates; shares no internal nodes. |
| 5 | B2 (Input) | Second input of Gate 2 - supports independent logic evaluation concurrent with Gates 1, 3, and 4. |
| 6 | Y2 (Output) | Output of Gate 2 - matches Y1 electrical characteristics; suitable for fanout to multiple downstream inputs. |
| 7 | GND | Ground reference for all logic and power domains - requires low-impedance connection to minimize ground bounce. |
| 8 | Y3 (Output) | Output of Gate 3 - identical timing and drive strength to Y1/Y2; usable for synchronous enable/disable paths. |
| 9 | A3 (Input) | First input of Gate 3 - supports cascaded logic trees without external buffering. |
| 10 | B3 (Input) | Second input of Gate 3 - enables dual-input decision logic in safety-critical subsystems. |
| 11 | Y4 (Output) | Output of Gate 4 - final gate output; commonly used for system fault indication or watchdog reset generation. |
| 12 | A4 (Input) | First input of Gate 4 - configurable as active-low enable for peripheral isolation circuits. |
| 13 | B4 (Input) | Second input of Gate 4 - complements A4 to implement lockout or interlock functions in power management. |
| 14 | VCC | Positive supply rail - must be decoupled with ≥0.1 µF ceramic capacitor near the pin for stable high-speed switching. |
Key Features
| Feature | Design Value |
|---|---|
| Quad NAND architecture | Four independent gates in one package reduce board space and component count versus discrete solutions. |
| LS00 pin compatibility | Enables direct replacement of obsolete 74LS00 in legacy automotive and industrial control boards without layout changes. |
| AEC-Q100 Grade 1 qualification | Validated for −40 °C to +125 °C operation with extended reliability testing - required for engine bay and transmission control modules. |
| Low quiescent ICC | Max 40 µA at 125 °C - critical for battery-backed modules where standby current must remain below 100 µA. |
| Pb-free / RoHS-compliant | Meets global environmental compliance mandates and supports lead-free reflow profiles (JEDEC J-STD-020). |
Applications
| Engine Control Unit (ECU) Logic Interface | Body Control Module (BCM) Signal Conditioning |
|---|---|
Use Scenario: Level-shifting and signal inversion between 5 V sensor outputs and 3.3 V MCU GPIOs in real-time combustion timing circuits. IC Role / Device Role / Timing Role: NAND gate configured as inverter (A=B) to convert active-high crankshaft position signals to active-low MCU interrupts. Use Value: Eliminates need for discrete transistor inverters; propagation delay <13 ns ensures sub-microsecond timing alignment for misfire detection. |
Use Scenario: Debouncing mechanical switch inputs (e.g., door handle sensors) before feeding to CAN transceiver enable logic. IC Role / Device Role / Timing Role: Dual-input NAND used as SR latch with RC network to suppress contact bounce transients lasting up to 10 ms. Use Value: Reduces false wake-up events by >99.8% compared to software-only debouncing, lowering BCM sleep current. |
| Automotive Lighting Sequencer | Power Supply Enable/Disable Logic |
Use Scenario: Generating sequential turn-signal flash patterns using clocked NAND feedback loops in LED driver control ASICs. IC Role / Device Role / Timing Role: Cross-coupled NAND gates form astable multivibrator with precise 1 Hz output frequency at 5 V supply. Use Value: Achieves ±2% frequency stability over temperature without external crystal - cuts BOM cost vs. dedicated timer ICs. |
Use Scenario: Enabling 12 V DC-DC converters only when ignition key is in RUN position and brake pedal is depressed. IC Role / Device Role / Timing Role: Three NAND gates implement AND-OR logic (Y = (IGN ∧ BRAKE) ∨ OVERRIDE) for fail-safe power gating. Use Value: Prevents inadvertent converter activation during service mode; meets ISO 16750-2 pulse test requirements for load dump immunity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad NAND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74HC00ADTR2G | Same die, non-automotive grade; rated for −55 °C to +125 °C but lacks AEC-Q100 certification and PPAP documentation. | Acceptable for industrial or consumer applications where automotive qualification is not mandated. | Select MC74HC00ADTR2G for cost-sensitive non-automotive designs requiring identical logic and timing behavior. |
| SN74HC00DR | TI part in SOIC-14; identical logic function and AC specs, but wider operating temp (−40 °C to +85 °C) and lower ESD rating (HBM >2000 V not guaranteed). | Suitable for commercial-grade automotive infotainment or HVAC control, but not under-hood deployment. | Choose SN74HC00DR only when SOIC-14 footprint is fixed and AEC-Q100 is unnecessary. |
Compared with NLV74HC00ADTR2G, MC74HC00ADTR2G offers identical electrical performance at lower cost but no automotive traceability, while SN74HC00DR trades qualification for broader distributor availability - making NLV74HC00ADTR2G the sole choice for AEC-Q100-compliant production.
Availability
NLV74HC00ADTR2G is available at Aetrix Electronics and suitable for automotive engine control, body electronics, and lighting systems requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for NLV74HC00ADTR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NLV74HC00ADTR2G belongs to onsemi's automotive-qualified HC logic family, engineered specifically for reliable digital interfacing in harsh-temperature vehicle subsystems where pin compatibility and long-term supply assurance are mandatory.
FAQ
What is the maximum operating temperature for NLV74HC00ADTR2G?
The NLV74HC00ADTR2G is rated for operation from −55 °C to +125 °C and is AEC-Q100 Grade 1 qualified. This specification is validated through accelerated life testing and thermal cycling, ensuring reliability in under-hood automotive environments where ambient temperatures exceed 105 °C. The NLV74HC00ADTR2G maintains full functionality and timing compliance across this entire range without derating.
Is NLV74HC00ADTR2G pin-compatible with 74LS00?
Yes, the NLV74HC00ADTR2G has identical pinout and logic function to the 74LS00, as confirmed in the onsemi datasheet. It supports direct replacement in existing LS-based designs, provided supply voltage is adjusted to 2–6 V and input pullups are added for LSTTL compatibility. The NLV74HC00ADTR2G retains the same terminal numbering and gate arrangement shown in Figure 2 of the datasheet.
Does NLV74HC00ADTR2G support 3.3 V logic systems?
Yes, the NLV74HC00ADTR2G operates fully within 2.0 V to 6.0 V supply range, with guaranteed VOH ≥2.48 V and VOL ≤0.26 V at VCC = 3.0 V and IOUT = 2.4 mA. This ensures robust interfacing with 3.3 V microcontrollers and FPGAs, meeting VIH/VIL thresholds for standard CMOS inputs. The NLV74HC00ADTR2G also exhibits low input leakage (<1 µA), minimizing power impact in battery-powered 3.3 V systems.
What is the propagation delay of NLV74HC00ADTR2G at 5 V supply?
At VCC = 5.0 V and TA = 25 °C, the NLV74HC00ADTR2G has a maximum propagation delay (tPLH/tPHL) of 15 ns, as specified in the AC Characteristics table. This value is measured under standard load conditions (CL = 50 pF, RL = 1 kΩ) and remains ≤19 ns across the full −55 °C to +125 °C operating range. The NLV74HC00ADTR2G achieves this performance using silicon-gate CMOS process technology with optimized drive strength.
Is NLV74HC00ADTR2G RoHS and Pb-free compliant?
Yes, the NLV74HC00ADTR2G is Pb-free, halogen-free, and RoHS compliant, as explicitly stated in the datasheet Features section and confirmed by the "G" suffix in its marking and ordering information. It meets JEDEC J-STD-020 moisture sensitivity level 1 and supports standard lead-free reflow profiles up to 260 °C peak temperature. The NLV74HC00ADTR2G is suitable for environmentally regulated automotive and industrial manufacturing.
NLV74HC00ADTR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74HC
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- NAND Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 2V ~ 6V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Input Logic Level - Low:
- 0.5V ~ 1.8V
- Input Logic Level - High:
- 1.5V ~ 4.2V
- Max Propagation Delay @ V, Max CL:
- 19ns @ 6V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
NLV74HC00ADTR2G FAQ
1.How can I place an order for NLV74HC00ADTR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV74HC00ADTR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV74HC00ADTR2G reliable?
The price and inventory of NLV74HC00ADTR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74HC00ADTR2G is usually 5 days.
3.What payment methods are accepted for NLV74HC00ADTR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74HC00ADTR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV74HC00ADTR2G?
NLV74HC00ADTR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV74HC00ADTR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV74HC00ADTR2G?
For technical support, including NLV74HC00ADTR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74HC00ADTR2G requirements.
6.How does Aetrix verify that NLV74HC00ADTR2G is sourced from the original manufacturer or authorized distributors?
All NLV74HC00ADTR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74HC00ADTR2G meets industry standards.
7.What is the process for return or replacement of NLV74HC00ADTR2G?
All NLV74HC00ADTR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74HC00ADTR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV74HC00ADTR2G part is unused and in its original packaging.
Return procedure for NLV74HC00ADTR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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