onsemi NLV74HC08ADTR2G
- Part No.:
- NLV74HC08ADTR2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
NLV74HC08ADTR2G.pdf
- Description:
- IC GATE AND 4CH 2-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:160,800
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NLV74HC08ADTR2G from onsemi is a quad 2-input AND gate in TSSOP-14 package, operating from 2.0 V to 6.0 V supply, delivering 10 LSTTL load drive capability with propagation delay as low as 13 ns at 6.0 V, used in digital logic interfacing and signal conditioning within industrial control and automotive body electronics.
For engineers reviewing the NLV74HC08ADTR2G datasheet, pinout, applications, or equivalent options, key selection criteria include supply voltage range compatibility (2.0–6.0 V), guaranteed propagation delay across temperature (−55°C to +125°C), input/output voltage thresholds, output drive strength, and AEC-Q100 qualification status for automotive use.
Technical Context
The NLV74HC08ADTR2G implements four independent 2-input AND gates using high-performance silicon-gate CMOS technology, with inputs compatible with standard CMOS outputs and pullup-resistor-enabled LSTTL compatibility. Its logic function Y = A·B is implemented per gate without internal feedback or enable controls.
It operates across −55°C to +125°C ambient temperature with guaranteed DC and AC performance, including VIH/VIL thresholds defined at multiple VCC levels (2.0 V, 3.0 V, 4.5 V, 6.0 V), and supports dynamic operation up to 35 MHz typical at 5 V based on tPLH/tPHL ≤ 19 ns and tTLH/tTHL ≤ 19 ns.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Quad 2-input AND gate (Y = A·B per channel) |
| Supply Voltage Range | 2.0 V to 6.0 V - enables direct interface with 3.3 V and 5 V systems without level shifters |
| Propagation Delay (tPLH/tPHL) | 13 ns max at VCC = 6.0 V, TA ≤ 125°C - supports >35 MHz toggle rate in clean-load conditions |
| Output Drive | ±25 mA DC per pin - drives 10 LSTTL loads or directly interfaces to CMOS/NMOS/TTL inputs |
| Input Thresholds (VIH/VIL) | VIH = 4.20 V min, VIL = 1.80 V max at VCC = 6.0 V - ensures noise margin ≥0.9 V under worst-case conditions |
| Operating Temperature | −55°C to +125°C - qualified for under-hood automotive and extended industrial environments |
| ESD Rating | HBM >2000 V - provides robust handling during board assembly and system integration |
Pinout & Package
TSSOP-14 (Case 948G), 4.9 mm × 4.4 mm × 1.2 mm body, 0.65 mm pitch, Pb-free, RoHS-compliant, moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A1 | First input of Gate 1 - must be tied to valid logic level if unused |
| 2 | B1 | Second input of Gate 1 - referenced to GND; no internal pull-up/down |
| 3 | Y1 | Output of Gate 1 - CMOS-compatible push-pull output, capable of sourcing/sinking 25 mA |
| 4 | A2 | First input of Gate 2 - electrically isolated from other gates |
| 5 | B2 | Second input of Gate 2 - shares same VCC/GND reference as all gates |
| 6 | Y2 | Output of Gate 2 - identical timing and drive specs as Y1 |
| 7 | GND | Ground reference for all logic and power paths - requires low-impedance PCB connection |
| 8 | Y3 | Output of Gate 3 - not internally connected to other outputs; fan-out limited only by load capacitance |
| 9 | A3 | First input of Gate 3 - matches A1/A2/A4 electrical characteristics |
| 10 | B3 | Second input of Gate 3 - VIH/VIL thresholds scale with VCC per datasheet table |
| 11 | Y4 | Output of Gate 4 - fully specified for 10 LSTTL load drive at 25°C and 125°C |
| 12 | A4 | First input of Gate 4 - supports 10 pF max Cin per input |
| 13 | B4 | Second input of Gate 4 - input leakage ≤ ±1.0 µA at VCC = 6.0 V, TA = 125°C |
| 14 | VCC | Positive supply rail - decoupling capacitor (0.1 µF ceramic) required within 5 mm of pin |
Key Features
| Feature | Design Value |
|---|---|
| High noise immunity | CMOS architecture delivers >40% VCC noise margin at 5 V, reducing susceptibility to crosstalk in dense PCB layouts |
| LSTTL load compatibility | Guaranteed 10 LSTTL load drive per output eliminates need for buffer stages in legacy TTL interfacing |
| Wide supply range | 2.0–6.0 V operation allows single part to serve both 3.3 V microcontrollers and 5 V peripheral buses |
| AEC-Q100 qualified | Qualified to Grade 1 (−40°C to +125°C) and Grade 3 (−40°C to +125°C) per datasheet footnote - meets automotive subsystem requirements |
| Pb-free & RoHS compliant | Meets JEDEC Std. No. 7A and UL 94 V-0 flammability rating - suitable for global production and end-of-life compliance |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
Use Scenario: Logic-level translation and signal gating between 3.3 V MCU GPIOs and 5 V sensor interface circuits in programmable logic controllers. IC Role / Device Role / Timing Role: Quad AND gate performing synchronized enable/control of four discrete output channels with sub-20 ns propagation delay. Use Value: Eliminates discrete transistor buffers while maintaining deterministic timing across temperature and voltage extremes. |
Use Scenario: Door lock actuator enable logic where two independent signals (key fob command + door handle sensor) must both be asserted to trigger solenoid driver. IC Role / Device Role / Timing Role: Single-gate AND function (e.g., Y1 = A1·B1) providing fail-safe dual-input validation before power delivery. Use Value: Reduces BOM count vs. discrete diode-OR solutions and guarantees <13 ns response time at 125°C ambient. |
| Medical Infusion Pump UI Logic | Consumer Appliance Power Sequencing |
Use Scenario: Interlock logic verifying simultaneous press of "Start" and "Confirm" buttons before enabling motor driver in Class II medical devices. IC Role / Device Role / Timing Role: Dedicated AND gate (Y2) implementing hardware-enforced safety interlock with no software dependency. Use Value: Meets IEC 62304 SW safety requirement via deterministic, analog-free digital gating at −40°C to +85°C. |
Use Scenario: Sequential power-up of display backlight, audio amplifier, and Wi-Fi module only after main MCU asserts "Ready" and voltage rails stabilize. IC Role / Device Role / Timing Role: Three independent AND gates (Y3, Y4, and one unused) coordinating multi-rail enable signals with precise timing alignment. Use Value: Replaces RC-based delays with jitter-free, temperature-stable logic control - reduces startup variance from ±50 ms to ±2 ns. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad 2-input AND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74HC08ADR2G | SOIC-14 package (7.5 mm × 5.0 mm), higher thermal resistance (JA = 116°C/W), same electrical specs | Suitable for through-hole prototyping or legacy PCBs with SOIC footprints; less space-constrained than TSSOP | Select when board layout lacks fine-pitch routing capability or requires manual soldering compatibility |
| SN74HC08DR | TI-manufactured, SOIC-14, identical logic function but different VIH/VIL thresholds at 2.0 V (VIH = 1.5 V min vs. onsemi's 1.50 V), same 13 ns delay at 6 V | Valid for non-automotive industrial use; not AEC-Q100 qualified; lower ESD rating (HBM = 2000 V vs. onsemi's >2000 V) | Choose for cost-sensitive non-automotive designs where AEC-Q100 and extended temp range are not required |
Compared with NLV74HC08ADTR2G, MC74HC08ADR2G offers identical functionality in a larger, more manufacturable package but sacrifices board area and thermal performance; SN74HC08DR provides functional equivalence for commercial-grade applications but lacks automotive qualification and has narrower process-controlled VIH margin at low VCC.
Availability
NLV74HC08ADTR2G is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, and medical infusion pump UI logic requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for NLV74HC08ADTR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and logic ICs for automotive, industrial, and cloud infrastructure markets.
NLV74HC08ADTR2G belongs to the NLV74HC logic family, designed specifically for automotive and industrial applications demanding extended temperature operation, AEC-Q100 qualification, and high-reliability packaging.
FAQ
What is the maximum operating temperature for NLV74HC08ADTR2G?
The NLV74HC08ADTR2G is rated for operation from −55°C to +125°C ambient temperature, with full DC and AC specifications guaranteed across this range. This makes NLV74HC08ADTR2G suitable for under-hood automotive applications and high-temperature industrial enclosures where thermal derating of standard HC devices would otherwise apply.
Does NLV74HC08ADTR2G support 3.3 V logic systems?
Yes, NLV74HC08ADTR2G operates reliably at 3.3 V supply (within its 2.0–6.0 V range), with VIH = 2.10 V min and VIL = 0.90 V max at VCC = 3.0 V - providing >1.2 V noise margin. Its output VOH = 2.48 V min at |IOUT| = 2.4 mA ensures clean interfacing with 3.3 V CMOS inputs without level shifting.
Is NLV74HC08ADTR2G pin-compatible with standard 74HC08 devices?
Yes, NLV74HC08ADTR2G uses the industry-standard 14-pin TSSOP footprint and identical pinout to MC74HC08A/MC74HCT08A, matching LS08. All four AND gates, VCC, and GND align exactly - enabling drop-in replacement in existing TSSOP-14 designs targeting extended temperature or automotive qualification.
What is the propagation delay of NLV74HC08ADTR2G at 5 V supply?
At VCC = 5.0 V and TA ≤ 125°C, NLV74HC08ADTR2G guarantees tPLH/tPHL ≤ 16 ns per gate, with typical values near 13 ns. This delay remains stable across temperature and load, supporting reliable timing in synchronous digital subsystems such as address decoding and interrupt arbitration.
How does NLV74HC08ADTR2G differ from MC74HC08ADTR2G?
NLV74HC08ADTR2G is the automotive-grade variant of MC74HC08ADTR2G, featuring AEC-Q100 qualification (Grade 1/3), enhanced screening, and tighter parametric limits across temperature. Both share identical pinout, logic function, and electrical specs - but NLV74HC08ADTR2G is designated for mission-critical automotive applications requiring PPAP documentation and lot traceability.
NLV74HC08ADTR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74HC
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- AND Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 2V ~ 6V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 5.2mA, 5.2mA
- Input Logic Level - Low:
- 0.5V ~ 1.8V
- Input Logic Level - High:
- 1.5V ~ 4.2V
- Max Propagation Delay @ V, Max CL:
- 19ns @ 6V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
NLV74HC08ADTR2G FAQ
1.How can I place an order for NLV74HC08ADTR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV74HC08ADTR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV74HC08ADTR2G reliable?
The price and inventory of NLV74HC08ADTR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74HC08ADTR2G is usually 5 days.
3.What payment methods are accepted for NLV74HC08ADTR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74HC08ADTR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV74HC08ADTR2G?
NLV74HC08ADTR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV74HC08ADTR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV74HC08ADTR2G?
For technical support, including NLV74HC08ADTR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74HC08ADTR2G requirements.
6.How does Aetrix verify that NLV74HC08ADTR2G is sourced from the original manufacturer or authorized distributors?
All NLV74HC08ADTR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74HC08ADTR2G meets industry standards.
7.What is the process for return or replacement of NLV74HC08ADTR2G?
All NLV74HC08ADTR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74HC08ADTR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV74HC08ADTR2G part is unused and in its original packaging.
Return procedure for NLV74HC08ADTR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NLV74HC08ADTR2G Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

