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onsemi NLV74HC125ADTR2G
- Part No.:
- NLV74HC125ADTR2G
- Manufacturer:
- onsemi
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
NLV74HC125ADTR2G.pdf
- Description:
- IC BUFFER NON-INVERT 6V 14TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,998
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Product details
Overview
NLV74HC125ADTR2G from onsemi is a quad 3-state noninverting buffer IC designed for bus-oriented systems, featuring four independent active-low output enables, 2.0–6.0 V operation, ±35 mA output drive per pin, and TSSOP-14 packaging - used in memory address drivers, clock distribution, and data bus isolation.
For engineers reviewing the NLV74HC125ADTR2G datasheet, pinout, applications, or equivalent options, key selection criteria include supply voltage range (2.0–6.0 V), propagation delay (15 ns @ 6.0 V), 3-state leakage (<10 µA), input compatibility with CMOS/LSTTL, and automotive-grade AEC-Q100 qualification.
Technical Context
The NLV74HC125ADTR2G implements four identical noninverting buffer channels, each with an independent active-low output enable (OE1–OE4). Its silicon-gate CMOS architecture ensures high noise immunity and low static current (≤160 µA at 6.0 V, 125°C).
Each channel supports bidirectional logic-level translation across 2.0–6.0 V, with guaranteed VOH ≥5.9 V and VOL ≤0.26 V at 6.0 V/7.8 mA. Propagation delays are tightly specified: tPLH/tPHL ≤15 ns and tPLZ/tPHZ ≤20 ns at VCC = 6.0 V and TA = 25°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.0–6.0 V - supports wide-input rail operation including 3.3 V and 5 V systems without level shifters. |
| Output Drive | ±35 mA per pin - drives up to 15 LSTTL loads directly, eliminating need for external buffers in medium-fanout buses. |
| Propagation Delay | 15 ns max (A→Y, VCC = 6.0 V) - enables reliable timing in high-speed address/data bus applications up to ~33 MHz. |
| 3-State Leakage | ≤10 µA at 125°C - ensures minimal bus contention and signal integrity during high-impedance state in shared-bus architectures. |
| Input Thresholds | VIH = 4.2 V, VIL = 1.8 V @ VCC = 6.0 V - provides >1.2 V noise margin for robust operation in electrically noisy industrial environments. |
| Operating Temperature | –55°C to +125°C - qualified for under-hood automotive and extended industrial use cases. |
| ESD Rating | >2000 V HBM - meets IEC 61000-4-2 Level 2 requirements for board-level ESD resilience. |
Pinout & Package
TSSOP-14 package (Case 948G), 4.9 mm × 4.4 mm × 1.2 mm body, 0.65 mm pitch, Pb-free, RoHS-compliant, moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 | Input A1–A4 | Noninverting data inputs - accept CMOS- or LSTTL-compatible logic levels; internal pull-down not provided. |
| 2, 5, 11, 14 | Output Enable OE1–OE4 | Active-low enables - assert low to enable corresponding Y output; high forces 3-state (high-Z) output. |
| 3, 6, 8, 12 | Output Y1–Y4 | Buffered noninverting outputs - drive bus lines directly; high-Z when respective OE is high. |
| 7 | GND | Ground reference for all logic and power domains - must be low-impedance connection to minimize switching noise. |
| 14 | VCC | Positive supply rail - decoupling capacitor (0.1 µF ceramic) required within 5 mm of pin for stable high-speed operation. |
Key Features
| Feature | Design Value |
|---|---|
| Quad independent 3-state control | Four separate OE pins allow per-channel bus arbitration - essential for multi-master memory or peripheral interfaces. |
| Wide VCC range (2.0–6.0 V) | Eliminates need for voltage translators between 3.3 V controllers and 5 V legacy peripherals or displays. |
| High noise immunity | CMOS input structure with >1.2 V noise margin at 6 V - sustains reliable operation in motor-drive or power-conversion adjacent layouts. |
| AEC-Q100 Grade 1 qualified | Validated for automotive powertrain and body electronics - includes PPAP documentation support and controlled change management. |
| Low quiescent ICC | ≤4.0 µA typical at 25°C - reduces standby power in always-on modules such as CAN gateway wake-up logic. |
Applications
| Memory Address Buffering | Industrial PLC Bus Isolation |
|---|---|
Use Scenario: Driving 16-bit address bus from microcontroller to multiple SRAM/Flash devices sharing same data/address lines. IC Role / Device Role / Timing Role: Noninverting buffer with per-line 3-state control isolates address signals during memory access arbitration. Use Value: Prevents bus contention during simultaneous read/write cycles; 15 LSTTL load drive eliminates need for discrete transistors. |
Use Scenario: Isolating fieldbus (e.g., RS-485) transceiver control lines from programmable logic controller CPU board. IC Role / Device Role / Timing Role: Quad buffer gates control direction, enable, and fault signaling with independent OE per line. Use Value: Enables hot-swap-safe bus reconfiguration; ±35 mA drive handles transceiver bias currents without external drivers. |
| Automotive Instrument Cluster Clock Distribution | Test Equipment Signal Routing |
Use Scenario: Distributing MCU-generated SPI clock and chip-select signals to multiple display drivers and sensor interfaces in dashboard module. IC Role / Device Role / Timing Role: Low-skew noninverting buffer with 15 ns max delay preserves setup/hold timing margins across 4 parallel paths. Use Value: Meets AEC-Q100 temperature and ESD requirements while maintaining <1 ns inter-channel skew for synchronized pixel updates. |
Use Scenario: Reconfigurable signal path routing in automated test equipment (ATE) where DUT interface signals must be gated or inverted dynamically. IC Role / Device Role / Timing Role: 3-state buffer array acts as programmable signal switch matrix controlled by FPGA GPIOs. Use Value: Enables software-defined test configurations; 10 µA max 3-state leakage prevents false triggering on floating nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad 3-state noninverting buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74HC125ADR2G | SOIC-14 package, same electrical specs, no automotive qualification. | Lacks AEC-Q100 Grade 1 rating and PPAP support; unsuitable for production automotive designs. | Select when cost-sensitive industrial PCBs require through-hole or SOIC footprint and automotive compliance is not required. |
| SN74LVC125APWR | 3.3 V only (1.65–3.6 V), lower propagation delay (4.5 ns @ 3.3 V), higher speed but narrower voltage range. | Not compatible with 5 V systems; requires level shifting if interfacing with legacy 5 V peripherals. | Choose for high-speed 3.3 V-only designs where sub-5 ns timing is critical and mixed-voltage operation is unnecessary. |
Compared with MC74HC125ADR2G and SN74LVC125APWR, the NLV74HC125ADTR2G uniquely combines automotive qualification, 2.0–6.0 V flexibility, and TSSOP-14 space savings - making it optimal for compact, thermally constrained, and safety-critical embedded systems requiring mixed-voltage bus interfacing.
Availability
NLV74HC125ADTR2G is available at Aetrix Electronics and suitable for automotive instrument clusters, industrial PLC backplanes, and test equipment signal routing requiring stable component supply, long-term lifecycle assurance, and AEC-Q100-compliant sourcing.
Supply support for NLV74HC125ADTR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power, analog, sensing, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The NLV74HC125ADTR2G belongs to onsemi's high-reliability HC logic family, engineered specifically for automotive and extended-temperature industrial applications demanding AEC-Q100 qualification, robust ESD performance, and long-lifecycle support.
FAQ
What is the maximum operating temperature range for NLV74HC125ADTR2G?
The NLV74HC125ADTR2G is rated for operation from –55°C to +125°C and is AEC-Q100 Grade 1 qualified. This full industrial-plus-automotive temperature range ensures reliability in engine control units, under-dash electronics, and outdoor industrial enclosures where ambient temperatures exceed standard commercial limits. The NLV74HC125ADTR2G maintains specified VOH/VOL and timing performance across this entire range.
Does NLV74HC125ADTR2G support 3.3 V logic systems?
Yes, NLV74HC125ADTR2G fully supports 3.3 V operation, with guaranteed performance across 2.0–6.0 V supply range. At VCC = 3.3 V, it delivers VOH ≥3.2 V and VOL ≤0.33 V while driving 6 mA loads, and exhibits tPLH ≤23 ns. Its CMOS inputs are compatible with both 3.3 V and 5 V logic families, enabling seamless voltage-domain bridging without external level shifters.
How does the active-low output enable work on NLV74HC125ADTR2G?
Each of the four output enables (OE1–OE4) on NLV74HC125ADTR2G is active-low: pulling an OE pin low enables its corresponding buffer output (Y1–Y4) to pass the input signal noninverted; holding OE high places that output in high-impedance (3-state) mode. This allows independent control of bus segments - for example, enabling only Y1/Y2 while tri-stating Y3/Y4 to prevent contention during multi-device communication.
Is NLV74HC125ADTR2G pin-compatible with legacy 74LS125 devices?
Yes, NLV74HC125ADTR2G is pinout-compatible with the industry-standard 74LS125 and 74LS126 logic devices in both SOIC-14 and TSSOP-14 packages. Pin assignments for inputs (A1–A4), outputs (Y1–Y4), enables (OE1–OE4), VCC, and GND match exactly - enabling drop-in replacement in existing LS-based designs while delivering superior noise immunity, lower power, and wider voltage operation.
What is the 3-state leakage current specification for NLV74HC125ADTR2G?
The NLV74HC125ADTR2G specifies maximum 3-state output leakage current (IOZ) of ±10 µA at VCC = 6.0 V and TA = 125°C. This low leakage ensures minimal bus loading and signal corruption when outputs are disabled - critical for maintaining valid logic states on shared data or address buses during idle or arbitration phases. The NLV74HC125ADTR2G meets this spec across its full temperature and voltage range.
NLV74HC125ADTR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74HC
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 7.8mA, 7.8mA
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
NLV74HC125ADTR2G FAQ
1.How can I place an order for NLV74HC125ADTR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV74HC125ADTR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV74HC125ADTR2G reliable?
The price and inventory of NLV74HC125ADTR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74HC125ADTR2G is usually 5 days.
3.What payment methods are accepted for NLV74HC125ADTR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74HC125ADTR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV74HC125ADTR2G?
NLV74HC125ADTR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV74HC125ADTR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV74HC125ADTR2G?
For technical support, including NLV74HC125ADTR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74HC125ADTR2G requirements.
6.How does Aetrix verify that NLV74HC125ADTR2G is sourced from the original manufacturer or authorized distributors?
All NLV74HC125ADTR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74HC125ADTR2G meets industry standards.
7.What is the process for return or replacement of NLV74HC125ADTR2G?
All NLV74HC125ADTR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74HC125ADTR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV74HC125ADTR2G part is unused and in its original packaging.
Return procedure for NLV74HC125ADTR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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