My Inquiry
My Account
onsemi NLV74HC126ADTR2G
- Part No.:
- NLV74HC126ADTR2G
- Manufacturer:
- onsemi
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
NLV74HC126ADTR2G.pdf
- Description:
- IC BUFFER NON-INVERT 6V 14TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,996
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NLV74HC126ADTR2G from onsemi is a quad 3-state noninverting buffer IC with active-high output enables, designed for bus-oriented systems including memory address drivers and clock distribution. It operates from 2.0 V to 6.0 V, delivers ±35 mA output drive per pin, supports –55 °C to +125 °C operation, and features 15 LSTTL load drive capability in TSSOP-14 package.
For engineers reviewing the NLV74HC126ADTR2G datasheet, pinout, applications, or equivalent options, key selection criteria include its active-high enable logic, 3-state output compatibility with CMOS/NMOS/TTL buses, propagation delay ≤23 ns at 4.5 V, and automotive-grade AEC-Q100 qualification (NLV prefix).
Technical Context
The NLV74HC126ADTR2G implements four independent noninverting buffers, each with a dedicated active-high output enable (OE) input controlling high-impedance state. Its silicon-gate CMOS architecture ensures low input current (≤1.0 µA), high noise immunity, and JEDEC Std. No. 7A compliance.
All four channels share a common VCC (Pin 14) and GND (Pin 7). Each buffer exhibits matched AC timing: tPLH/tPHL ≤23 ns, tPLZ/tPHZ ≤30 ns, and tTLH/tTHL ≤15 ns at VCC = 4.5 V and TA = 25 °C - enabling synchronous bus control without skew-induced contention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 2.0 V to 6.0 V - supports mixed-voltage system interfacing (e.g., 3.3 V logic driving 5 V bus) |
| Output Drive Capability | ±35 mA per pin - drives up to 15 LSTTL loads without external buffering |
| Propagation Delay (A→Y) | ≤23 ns at VCC = 4.5 V - enables reliable timing in 20+ MHz bus applications |
| 3-State Leakage Current | ≤10 µA at 125 °C - ensures stable high-impedance state under thermal stress |
| Operating Temperature | –55 °C to +125 °C - qualified for under-hood automotive and industrial environments |
| Input Capacitance | 10 pF max - minimizes capacitive loading on upstream drivers |
| Power Dissipation Cap. | 30 pF typical - enables accurate dynamic power estimation (PD = CPD × VCC² × f) |
Pinout & Package
TSSOP-14 package (Case 948G), 4.9 mm × 4.4 mm × 1.2 mm body, 0.65 mm pitch, Pb-free, RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 | A1, A2, A3, A4 - Input | Noninverting data inputs; TTL/CMOS-compatible thresholds (VIH ≥1.35 V @ VCC=4.5 V) |
| 2, 5, 11, 14 | OE1, OE2, OE3, OE4 - Enable | Active-high 3-state controls; OE = HIGH enables output, LOW forces high-Z |
| 3, 6, 8, 12 | Y1, Y2, Y3, Y4 - Output | Noninverting buffered outputs; support bidirectional bus arbitration when paired with complementary drivers |
| 7 | GND | Ground reference for all logic and I/O; requires low-inductance connection to minimize switching noise |
| 14 | VCC | Positive supply rail; decoupling capacitor (0.1 µF ceramic) required within 5 mm of this pin |
Key Features
| Feature | Design Value |
|---|---|
| Quad independent 3-state buffers | Enables selective routing of four signals onto shared bus lines without contention |
| Active-high output enables | Simplifies interface with microcontroller GPIOs lacking active-low logic or inverters |
| Wide 2.0–6.0 V supply range | Eliminates level shifters in mixed-supply systems (e.g., 3.3 V MCU controlling 5 V peripheral bus) |
| AEC-Q100 Grade 1 qualified | Validated for automotive powertrain, body electronics, and ADAS subsystems requiring –40 °C to +125 °C operation |
| Low 1.0 µA max input leakage | Prevents unintended logic transitions in battery-powered or high-impedance sensor interfaces |
Applications
| Automotive Body Control Module | Industrial PLC I/O Expansion |
|---|---|
Use Scenario: Isolating and buffering LIN bus address lines between MCU and multiple door module transceivers. IC Role / Device Role / Timing Role: Noninverting buffer with per-channel OE control routes address bits while preventing backfeed during module sleep states. Use Value: Enables deterministic wake-up sequencing via independent OE assertion; 125 °C rating sustains reliability near engine bay heat sources. |
Use Scenario: Driving 24 V discrete I/O backplane signals from 3.3 V FPGA GPIOs in modular PLC racks. IC Role / Device Role / Timing Role: Level-shifting buffer with 3-state outputs allows hot-swap insertion of I/O modules without bus contention. Use Value: ±35 mA drive handles 24 V optocoupler LED loads directly; wide VCC range accommodates FPGA core voltage variation. |
| Medical Infusion Pump Controller | Test Equipment Signal Routing |
Use Scenario: Buffering real-time motor step/direction signals from safety-critical MCU to isolated stepper driver stages. IC Role / Device Role / Timing Role: Quad noninverting gate with independent OE provides fail-safe signal gating during emergency stop events. Use Value: Propagation delay ≤23 ns ensures sub-microsecond response to E-stop commands; AEC-Q100 qualification validates long-term parametric stability. |
Use Scenario: Multiplexing calibration reference signals between DMM, oscilloscope, and arbitrary waveform generator in automated test fixtures. IC Role / Device Role / Timing Role: Bidirectional bus driver with 3-state outputs isolates instruments during reconfiguration sequences. Use Value: 10 pF input capacitance prevents signal integrity degradation at 10 MHz reference frequencies; low leakage maintains DC accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad noninverting buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74HC126ADR2G | SOIC-14 package; same electrical specs but larger footprint and higher thermal resistance (116 °C/W vs. 150 °C/W) | Preferred for prototyping or legacy PCBs with SOIC land patterns; less suitable for space-constrained automotive modules | Select when board layout lacks TSSOP-14 clearance or requires manual soldering compatibility |
| SN74LVC126APWR | 3.3 V only (1.65–3.6 V); lower propagation delay (≤5.5 ns @ 3.3 V); different pinout (OE pins grouped separately) | Better for high-speed 3.3 V FPGA interfaces; incompatible with 5 V buses or mixed-voltage designs | Choose only for new 3.3 V-only systems where speed >20 MHz is critical and voltage headroom is fixed |
Compared with MC74HC126ADR2G and SN74LVC126APWR, the NLV74HC126ADTR2G uniquely combines automotive qualification, 2–6 V operation, and TSSOP-14 packaging - making it the sole option for space-limited, thermally demanding, mixed-voltage automotive or industrial bus nodes.
Availability
NLV74HC126ADTR2G is available at Aetrix Electronics and suitable for automotive body control modules, industrial PLC I/O expansion, medical infusion pump controllers, and automated test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for NLV74HC126ADTR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient, high-reliability components for automotive, industrial, cloud, and medical applications.
The NLV74HC126ADTR2G belongs to onsemi's HC logic family - engineered for robustness in harsh environments, with emphasis on AEC-Q100 compliance, wide voltage tolerance, and low-power CMOS performance.
FAQ
What is the logic function of NLV74HC126ADTR2G?
The NLV74HC126ADTR2G contains four independent noninverting buffers, each with an active-high output enable (OE) input. When OE is HIGH, the output Y follows the input A; when OE is LOW, Y enters high-impedance state. This enables bus sharing and signal isolation in multi-master systems. All logic behavior matches the standard 74HC126 function.
Does NLV74HC126ADTR2G support 5 V operation?
Yes, NLV74HC126ADTR2G supports 5 V operation fully - its recommended supply range is 2.0 V to 6.0 V, and all DC/AC specifications (including VOH ≥4.4 V and VOL ≤0.26 V at 6.0 mA load) are guaranteed at VCC = 4.5 V and 5.0 V. It is compatible with both 3.3 V and 5 V logic families.
Is NLV74HC126ADTR2G qualified for automotive use?
Yes, the "NLV" prefix denotes onsemi's automotive-grade variant. NLV74HC126ADTR2G is AEC-Q100 qualified (Grade 1: –40 °C to +125 °C), PPAP capable, and manufactured in onsemi's certified automotive facilities - meeting requirements for body electronics, chassis, and ADAS subsystems.
What is the maximum output current per pin for NLV74HC126ADTR2G?
The absolute maximum DC output current per pin is ±35 mA, as specified in the Maximum Ratings table. For continuous operation, the recommended limit is ±6.0 mA (per the DC Electrical Characteristics test condition for VOH/VOL), ensuring stable voltage levels and thermal safety in sustained drive scenarios.
Can NLV74HC126ADTR2G replace MC74HC125A in a design?
No - NLV74HC126ADTR2G has active-high output enables (OE HIGH = enabled), whereas MC74HC125A uses active-low enables (OE LOW = enabled). Swapping them requires inverting all OE signals in firmware/hardware. Pinout and electrical specs are identical, but logic polarity differs; direct replacement is not functionally valid without redesign.
NLV74HC126ADTR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74HC
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 7.8mA, 7.8mA
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
NLV74HC126ADTR2G FAQ
1.How can I place an order for NLV74HC126ADTR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV74HC126ADTR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV74HC126ADTR2G reliable?
The price and inventory of NLV74HC126ADTR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74HC126ADTR2G is usually 5 days.
3.What payment methods are accepted for NLV74HC126ADTR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74HC126ADTR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV74HC126ADTR2G?
NLV74HC126ADTR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV74HC126ADTR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV74HC126ADTR2G?
For technical support, including NLV74HC126ADTR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74HC126ADTR2G requirements.
6.How does Aetrix verify that NLV74HC126ADTR2G is sourced from the original manufacturer or authorized distributors?
All NLV74HC126ADTR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74HC126ADTR2G meets industry standards.
7.What is the process for return or replacement of NLV74HC126ADTR2G?
All NLV74HC126ADTR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74HC126ADTR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV74HC126ADTR2G part is unused and in its original packaging.
Return procedure for NLV74HC126ADTR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NLV74HC126ADTR2G Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments
-
SN74LVC2G17DBVR
Texas Instruments
-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments
-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
