Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

onsemi NLV74HC86ADR2G

Name: NLV74HC86ADR2G
Brand: onsemi
SKU: NLV74HC86ADR2G
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: NLV74HC86ADR2G

Manufacturer:: onsemi

Category:: Gates and Inverters

Package:: 14-SOIC (0.154", 3.90mm Width)

Datasheet:: NLV74HC86ADR2G.pdf

Description:: IC GATE XOR 4CH 2-INP 14SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:1,022

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

NLV74HC86ADR2G from onsemi is a quad 2-input exclusive-OR (XOR) gate in SOIC-14 package, operating from 2.0 V to 6.0 V, delivering 10 LSTTL load drive capability and supporting industrial temperature range (−55 °C to +125 °C); it implements four independent A ⊕ B logic functions and is used in digital signal comparison, parity generation, and arithmetic circuits.

For engineers reviewing the NLV74HC86ADR2G datasheet, pinout, applications, or equivalent options, key selection factors include supply voltage compatibility (2.0–6.0 V), propagation delay (17 ns at 6.0 V), input/output voltage thresholds, quiescent current (≤40 µA), and SOIC-14 package footprint for legacy board compatibility.

Technical Context

The NLV74HC86ADR2G uses high-performance silicon-gate CMOS technology with 56 FETs per device (14 equivalent gates), ensuring low input current (±0.1 µA typical) and high noise immunity. Its inputs are compatible with standard CMOS outputs and, with pullup resistors, with LSTTL outputs.

It features rail-to-rail output swing, supports fan-out of 10 LSTTL loads, and meets JEDEC Standard No. 7A. The device is Pb-free, halogen-free, and RoHS compliant, with MSL Level 1 moisture sensitivity rating.

Key Specifications

Parameter	Value and Actual Design Meaning
Logic Function	Quad 2-input XOR (Y = A ⊕ B), four independent gates
Supply Voltage Range	2.0 V to 6.0 V - enables operation across battery-powered and 3.3/5.0 V systems
Propagation Delay	17 ns max at VCC = 6.0 V - supports >30 MHz toggle rates in critical paths
Output Drive	10 LSTTL loads - ensures robust interfacing without external buffers
Input Leakage Current	±0.1 µA max at 6.0 V - minimizes power loss in high-impedance or battery-critical nodes
Operating Temperature	−55 °C to +125 °C - qualified for extended industrial and under-hood automotive environments
Quiescent Supply Current	40 µA max at 6.0 V - supports ultra-low-power standby modes

Pinout & Package

Package: SOIC-14 NB (Case 751A), 8.75 mm × 4.00 mm × 1.75 mm body, surface-mount, Pb-free, RoHS-compliant.

Pin/Terminal	Circuit Role	Design Meaning
1	A1	First XOR gate input A
2	B1	First XOR gate input B
3	Y1	First XOR gate output (Y1 = A1 ⊕ B1)
4	A2	Second XOR gate input A
5	B2	Second XOR gate input B
6	Y2	Second XOR gate output (Y2 = A2 ⊕ B2)
7	GND	Ground reference for all logic and power domains
8	Y3	Third XOR gate output (Y3 = A3 ⊕ B3)
9	A3	Third XOR gate input A
10	B3	Third XOR gate input B
11	Y4	Fourth XOR gate output (Y4 = A4 ⊕ B4)
12	A4	Fourth XOR gate input A
13	B4	Fourth XOR gate input B
14	VCC	Positive supply rail (2.0–6.0 V)

Key Features

Feature	Design Value
Rail-to-rail CMOS output swing	VOH ≥ 5.9 V / VOL ≤ 0.1 V at VCC = 6.0 V - ensures full logic-level compatibility with downstream CMOS/NMOS stages
High noise immunity	Typical noise margin >1.5 V at VCC = 5.0 V - suppresses false triggering in electrically noisy industrial control environments
Low dynamic power consumption	CPD = 33 pF per gate - enables predictable switching power calculation: PD = CPD × VCC² × f + ICC × VCC
JEDEC Std. 7A compliance	Validated electrical behavior per industry-standard CMOS interface requirements - simplifies qualification in regulated systems
Automotive-grade variant available	NLV74HC86ADR2G−Q version qualified to AEC-Q100 - supports functional safety-aware designs requiring PPAP documentation

Applications

Parity Generation	Digital Signal Comparison
Use Scenario: Detecting odd/even bit count in serial data streams or memory word integrity checks. IC Role / Device Role / Timing Role: XOR gate performing bitwise modulo-2 addition across parallel data lines. Use Value: Enables real-time parity error detection with <17 ns latency at 6.0 V, meeting cycle-time constraints in UART and SPI controllers.	Use Scenario: Identifying mismatch between two digital signals (e.g., redundant sensor outputs or configuration registers). IC Role / Device Role / Timing Role: Four independent XOR gates comparing corresponding bits of two 4-bit words. Use Value: Provides deterministic, zero-latency inequality indication without software overhead-critical for fail-safe monitoring in PLC I/O modules.
Arithmetic Logic Unit (ALU) Building Block	Phase Detection in Clock Recovery
Use Scenario: Constructing half-adder or full-adder stages in custom microcontroller ALUs or FPGA soft-core datapaths. IC Role / Device Role / Timing Role: Core logic element generating sum bit (S = A ⊕ B ⊕ Cin) in combinational adder chains. Use Value: Delivers sub-20 ns propagation delay at 6.0 V, enabling multi-bit ripple-carry adders with predictable timing margins.	Use Scenario: Detecting phase alignment between recovered clock and data edges in low-speed serial receivers. IC Role / Device Role / Timing Role: XOR gate acting as digital phase comparator feeding integrator or loop filter. Use Value: Supports jitter-tolerant clock recovery up to 30 MHz due to symmetric rise/fall response (tTLH/tTHL ≤ 19 ns at 6.0 V).

Parity Generation

Digital Signal Comparison

Use Scenario: Detecting odd/even bit count in serial data streams or memory word integrity checks.

IC Role / Device Role / Timing Role: XOR gate performing bitwise modulo-2 addition across parallel data lines.

Use Value: Enables real-time parity error detection with <17 ns latency at 6.0 V, meeting cycle-time constraints in UART and SPI controllers.

Use Scenario: Identifying mismatch between two digital signals (e.g., redundant sensor outputs or configuration registers).

IC Role / Device Role / Timing Role: Four independent XOR gates comparing corresponding bits of two 4-bit words.

Use Value: Provides deterministic, zero-latency inequality indication without software overhead-critical for fail-safe monitoring in PLC I/O modules.

Arithmetic Logic Unit (ALU) Building Block

Phase Detection in Clock Recovery

Use Scenario: Constructing half-adder or full-adder stages in custom microcontroller ALUs or FPGA soft-core datapaths.

IC Role / Device Role / Timing Role: Core logic element generating sum bit (S = A ⊕ B ⊕ Cin) in combinational adder chains.

Use Value: Delivers sub-20 ns propagation delay at 6.0 V, enabling multi-bit ripple-carry adders with predictable timing margins.

Use Scenario: Detecting phase alignment between recovered clock and data edges in low-speed serial receivers.

IC Role / Device Role / Timing Role: XOR gate acting as digital phase comparator feeding integrator or loop filter.

Use Value: Supports jitter-tolerant clock recovery up to 30 MHz due to symmetric rise/fall response (tTLH/tTHL ≤ 19 ns at 6.0 V).

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad XOR gate applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MC74HC86ADR2G	Same logic function, identical pinout, same SOIC-14 package; differs only in screening grade (NLV = enhanced temp range, −55 °C to +125 °C vs. standard −40 °C to +85 °C)	Standard commercial/industrial use where extended temperature is not required	Select when cost sensitivity outweighs need for extended thermal performance
SN74HC86DR	TI part, identical logic and pinout, SOIC-14, but rated −40 °C to +85 °C and lacks AEC-Q100 qualification	Non-automotive consumer or computing applications with standard ambient conditions	Choose for dual-sourcing flexibility in non-automotive designs with TI ecosystem preference

Compared with MC74HC86ADR2G and SN74HC86DR, the NLV74HC86ADR2G provides guaranteed operation down to −55 °C and up to +125 °C, making it uniquely suitable for under-hood automotive, aerospace, and harsh industrial deployments where thermal margin is non-negotiable.

Availability

NLV74HC86ADR2G is available at Aetrix Electronics and suitable for industrial control systems, automotive body electronics, and test equipment requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for NLV74HC86ADR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, delivering silicon-based solutions for automotive, industrial, cloud, and IoT applications.

The NLV74HC86ADR2G belongs to onsemi's high-reliability HC logic family, designed specifically for robust digital interfacing in mission-critical industrial and automotive subsystems where extended temperature operation and AEC-Q100 compliance are essential.

FAQ

What logic function does the NLV74HC86ADR2G implement?

The NLV74HC86ADR2G implements four independent 2-input exclusive-OR (XOR) logic gates, each computing Y = A ⊕ B. Its truth table yields low output when inputs match (both low or both high) and high output when inputs differ. This behavior is fundamental to parity generation, signal comparison, and arithmetic sum operations in digital systems using the NLV74HC86ADR2G.

Is the NLV74HC86ADR2G pin-compatible with TTL-based XOR gates like the 74LS86?

Yes, the NLV74HC86ADR2G is pinout-identical to the 74LS86. Its inputs are compatible with standard CMOS outputs and, when used with pullup resistors, with LSTTL outputs. However, unlike the LS86, the NLV74HC86ADR2G operates from 2.0 V to 6.0 V and draws significantly less quiescent current, making it suitable for mixed-voltage and low-power designs that still require legacy board compatibility with the NLV74HC86ADR2G.

What is the maximum propagation delay of the NLV74HC86ADR2G at 5.0 V supply?

At VCC = 5.0 V and TA = 25 °C, the NLV74HC86ADR2G has a maximum propagation delay (tPLH/tPHL) of 20 ns. Over the full industrial temperature range (−55 °C to +125 °C), the guaranteed maximum is 25 ns at 5.0 V. This value is confirmed in the AC Electrical Characteristics table of the official onsemi datasheet for the NLV74HC86ADR2G.

Does the NLV74HC86ADR2G support 3.3 V logic systems?

Yes, the NLV74HC86ADR2G fully supports 3.3 V operation. Its recommended supply range is 2.0 V to 6.0 V, and all DC and AC specifications-including VIH (min 2.1 V), VIL (max 0.9 V), VOH (min 2.48 V), and VOL (max 0.26 V) at 3.0 V-are explicitly guaranteed for 3.3 V systems. This makes the NLV74HC86ADR2G ideal for interfacing between 3.3 V microcontrollers and legacy 5 V peripherals.

What packaging and environmental certifications apply to the NLV74HC86ADR2G?

The NLV74HC86ADR2G is supplied in a Pb-free, halogen-free SOIC-14 NB package (Case 751A), RoHS compliant and rated MSL Level 1. It meets JEDEC Standard No. 7A and is qualified for extended temperature operation (−55 °C to +125 °C). The "NLV" prefix denotes onsemi's enhanced reliability grade, and the "G" suffix confirms lead-free finish - all verified in the official NLV74HC86ADR2G datasheet.

NLV74HC86ADR2G Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: 74HC

Package/Case:: 14-SOIC (0.154", 3.90mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Logic Type:: XOR (Exclusive OR)

Number of Circuits:: 4

Number of Inputs:: 2

Features:: -

Voltage - Supply:: 2V ~ 6V

Current - Quiescent (Max):: 1 µA

Current - Output High, Low:: 5.2mA, 5.2mA

Input Logic Level - Low:: 0.5V ~ 1.8V

Input Logic Level - High:: 1.5V ~ 4.2V

Max Propagation Delay @ V, Max CL:: 26ns @ 6V, 50pF

Operating Temperature:: -55°C ~ 125°C

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 14-SOIC

NLV74HC86ADR2G FAQ

1.How can I place an order for NLV74HC86ADR2G through Aetrix?

Please submit a Request for Quotation (RFQ) for NLV74HC86ADR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for NLV74HC86ADR2G reliable?

The price and inventory of NLV74HC86ADR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74HC86ADR2G is usually 5 days.

3.What payment methods are accepted for NLV74HC86ADR2G?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74HC86ADR2G transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for NLV74HC86ADR2G?

NLV74HC86ADR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your NLV74HC86ADR2G order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for NLV74HC86ADR2G?

For technical support, including NLV74HC86ADR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74HC86ADR2G requirements.

6.How does Aetrix verify that NLV74HC86ADR2G is sourced from the original manufacturer or authorized distributors?

All NLV74HC86ADR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74HC86ADR2G meets industry standards.

7.What is the process for return or replacement of NLV74HC86ADR2G?

All NLV74HC86ADR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74HC86ADR2G, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The NLV74HC86ADR2G part is unused and in its original packaging.

Return procedure for NLV74HC86ADR2G:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…