onsemi NLV74LCX00DTR2G
- Part No.:
- NLV74LCX00DTR2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
NLV74LCX00DTR2G.pdf
- Description:
- IC GATE NAND 4CH 2-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NLV74LCX00DTR2G from onsemi is a low-voltage CMOS quad 2-input NAND gate operating from 1.65 V to 5.5 V, featuring 5 V-tolerant inputs, 24 mA balanced output drive at 3.0 V, near-zero static supply current (10 µA), and TTL/LVCMOS compatibility. It serves as a logic-level translation and signal inversion component in mixed-voltage digital systems such as industrial I/O controllers and automotive body electronics.
For engineers reviewing the NLV74LCX00DTR2G datasheet, pinout, applications, or equivalent options, key selection criteria include input voltage tolerance, propagation delay (≤4.2 ns at 5 V), output drive strength, thermal resistance (150 °C/W for TSSOP-14), and AEC-Q100 qualification status for automotive use.
Technical Context
The NLV74LCX00DTR2G implements four independent 2-input NAND gates in a single monolithic CMOS die, with inputs rated for 5.5 V regardless of VCC level-enabling direct interfacing with legacy 5 V TTL logic while powered from 1.65–5.5 V supplies. Its rail-to-rail output swing and symmetrical sink/source capability support robust noise margins in high-speed digital interfaces.
Each gate exhibits matched propagation delays (tPLH/tPHL ≤4.2 ns at VCC = 4.5–5.5 V) and low output skew (≤1.0 ns between outputs), ensuring timing integrity across multiple channels. The device supports operation from −40 °C to +125 °C and meets AEC-Q100 Grade 1 requirements when ordered with the −Q suffix.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - Enables operation across 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains without level shifters. |
| Input Voltage Tolerance | −0.5 V to +6.5 V - Allows safe connection to 5 V drivers even when VCC = 1.65 V, eliminating external clamping diodes. |
| Output Drive Strength | ±24 mA at VCC = 3.0 V - Sufficient to drive standard TTL loads or multiple CMOS inputs without buffering. |
| Propagation Delay | ≤4.2 ns at VCC = 4.5–5.5 V - Supports >100 MHz toggle rates in critical control paths. |
| Quiescent Supply Current | 10 µA max - Minimizes standby power in battery-backed or energy-sensitive applications. |
| Operating Temperature | −40 °C to +125 °C - Validated for under-hood automotive and industrial environments. |
| ESD Rating | HBM >2000 V - Provides robust handling during board assembly and field service. |
Pinout & Package
Packaged in a 14-lead Thin Shrink Small Outline Package (TSSOP-14), case 948G, with 0.65 mm lead pitch and Pb-free finish. Thermal resistance θJA = 150 °C/W enables reliable operation at full load in compact PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 4, 5, 10, 12, 13 | A0/B0, A1/B1, A2/B2, A3/B3 | Four independent NAND input pairs - each pair drives one gate; unused inputs must be tied to VCC or GND. |
| 3, 6, 11, 8 | O0, O1, O2, O3 | Four complementary NAND outputs - actively driven HIGH/LOW; no internal pull-ups or pull-downs. |
| 7 | GND | Ground reference for all logic and power domains - requires low-impedance PCB plane connection. |
| 14 | VCC | Primary power supply - decoupling capacitor (0.1 µF ceramic) required within 5 mm of this pin. |
Key Features
| Feature | Design Value |
|---|---|
| 5 V-tolerant inputs | Enables seamless integration with legacy 5 V microcontrollers and peripherals without external level translators. |
| 24 mA balanced output drive | Supports fan-out of ≥10 LVTTL loads or direct driving of small-signal MOSFET gates in power control circuits. |
| 10 µA quiescent ICC | Reduces system-level standby current by >95% compared to standard 74HC-series equivalents. |
| AEC-Q100 qualified (−Q variant) | Validated for automotive applications including body control modules and lighting controllers requiring Grade 1 reliability. |
| Latchup immunity >100 mA | Ensures robustness against transient overvoltage events on I/O lines in noisy industrial environments. |
Applications
| Industrial PLC I/O Modules | Automotive Body Control Units |
|---|---|
|
Use Scenario: Signal conditioning and logic inversion for discrete sensor inputs (e.g., door switch, hood latch) before MCU sampling. IC Role / Device Role / Timing Role: Level-translating NAND gate providing 5 V-tolerant interface between mechanical switches and 3.3 V microcontroller GPIOs. Use Value: Eliminates need for discrete voltage dividers or dedicated level shifters, reducing BOM count and layout area by 30%. |
Use Scenario: Enabling/disabling LED driver enable lines based on CAN message status and ambient light sensor output. IC Role / Device Role / Timing Role: Combinatorial logic element implementing AND-NOT logic for multi-condition lamp activation. Use Value: Delivers sub-5 ns propagation delay to meet real-time response requirements (<100 µs) for safety-critical lighting functions. |
| Medical Diagnostic Equipment | Consumer IoT Hub Controllers |
|
Use Scenario: Debouncing and synchronizing push-button inputs in portable ultrasound devices with low-power ARM Cortex-M cores. IC Role / Device Role / Timing Role: Input conditioning gate filtering mechanical bounce while maintaining <10 µA sleep current. Use Value: Achieves >10-year battery life in standby mode due to ultra-low ICC and no external pull resistors required. |
Use Scenario: Managing power sequencing and reset coordination among Wi-Fi SoC, BLE co-processor, and sensor fusion ASIC. IC Role / Device Role / Timing Role: Glue logic performing NAND-based state encoding for multi-chip power-up handshake protocol. Use Value: Ensures deterministic boot order across heterogeneous voltage domains (1.8 V, 3.3 V, 5 V) without FPGA or CPLD overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NAND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC00APWR | Lower VIH threshold (0.7 × VCC vs. 0.7 × VCC at 4.5–5.5 V); identical 14-pin TSSOP package; no AEC-Q100 qualification. | Targeted at commercial-grade consumer and computing applications; not validated for automotive temperature range or stress testing. | Select when cost sensitivity outweighs automotive qualification needs and 5 V tolerance is not required. |
| 74AUP1G00GW,125 | Single-gate variant in 5-pin SC-70 package; lower ICC (0.9 µA), slower tPD (6.4 ns at 3.3 V); 5 V tolerant only up to 3.6 V input. | Suitable for space-constrained designs needing minimal logic per channel; lacks quad integration and full 5.5 V input rating. | Choose for ultra-low-power, single-function nodes where board area is premium and quad integration is unnecessary. |
Compared with SN74LVC00APWR and 74AUP1G00GW,125, the NLV74LCX00DTR2G uniquely combines quad integration, full 5.5 V input tolerance, AEC-Q100 readiness, and 24 mA drive-all in a standard TSSOP-14 footprint-making it optimal for automotive and industrial mixed-voltage control systems.
Availability
NLV74LCX00DTR2G is available at Aetrix Electronics and suitable for industrial PLC I/O modules, automotive body control units, and medical diagnostic equipment requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.
Supply support for NLV74LCX00DTR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NLV74LCX00DTR2G belongs to the LCX logic family-designed specifically for low-voltage, high-speed, mixed-supply digital interfacing with emphasis on 5 V tolerance, wide temperature operation, and automotive reliability.
FAQ
What is the maximum input voltage rating for NLV74LCX00DTR2G?
The NLV74LCX00DTR2G supports DC input voltages from −0.5 V to +6.5 V, enabling safe operation with 5 V TTL signals even when powered from as low as 1.65 V. This 5 V-tolerant feature is confirmed in the Absolute Maximum Ratings table of the official onsemi datasheet (Rev. 9, July 2024), and applies to all input pins (A0–B3) regardless of VCC level. Exceeding +6.5 V risks permanent damage.
Does NLV74LCX00DTR2G require external pull-up or pull-down resistors on unused inputs?
Yes - unused inputs on the NLV74LCX00DTR2G must be tied to either VCC or GND to prevent floating states that increase ICC and cause unpredictable output behavior. The datasheet explicitly warns "For ICC reasons, DO NOT FLOAT Inputs" and recommends hard-wiring unconnected inputs to defined logic levels. No internal pull resistors are integrated.
Is NLV74LCX00DTR2G pin-compatible with standard 74HC00 or 74LS00 packages?
No - while the NLV74LCX00DTR2G shares the same 14-pin TSSOP footprint as many 74-series logic ICs, its electrical characteristics (e.g., 5 V-tolerant inputs, 1.65–5.5 V supply range, 24 mA drive) differ significantly from 74HC00 (2–6 V) and 74LS00 (4.75–5.25 V). Pin numbering matches standard dual-in-line and TSSOP logic layouts, but functional substitution requires validation of voltage, timing, and loading requirements.
What is the thermal resistance (θJA) of NLV74LCX00DTR2G in its TSSOP-14 package?
The thermal resistance θJA for NLV74LCX00DTR2G in the TSSOP-14 package (case 948G) is 150 °C/W, as specified in the Maximum Ratings table of the onsemi datasheet. This value assumes JEDEC-standard test conditions (JESD51-7) on a 2-ounce copper FR4 board with no forced airflow. Layout practices such as thermal vias under the exposed pad (if present) or increased copper area can improve actual thermal performance.
Can NLV74LCX00DTR2G operate reliably at 125 °C ambient temperature?
Yes - the NLV74LCX00DTR2G is fully specified for continuous operation from −40 °C to +125 °C ambient temperature, with all AC and DC parameters guaranteed across this range per the Recommended Operating Conditions table. This makes it suitable for under-hood automotive and high-temperature industrial applications, provided PCB thermal design maintains junction temperature below +150 °C.
NLV74LCX00DTR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74LCX
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- NAND Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 2V ~ 3.6V
- Current - Quiescent (Max):
- 10 µA
- Current - Output High, Low:
- 24mA, 24mA
- Input Logic Level - Low:
- 0.7V ~ 0.8V
- Input Logic Level - High:
- 1.7V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 5.5ns @ 3.3V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
NLV74LCX00DTR2G FAQ
1.How can I place an order for NLV74LCX00DTR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV74LCX00DTR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV74LCX00DTR2G reliable?
The price and inventory of NLV74LCX00DTR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74LCX00DTR2G is usually 5 days.
3.What payment methods are accepted for NLV74LCX00DTR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74LCX00DTR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV74LCX00DTR2G?
NLV74LCX00DTR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV74LCX00DTR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV74LCX00DTR2G?
For technical support, including NLV74LCX00DTR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74LCX00DTR2G requirements.
6.How does Aetrix verify that NLV74LCX00DTR2G is sourced from the original manufacturer or authorized distributors?
All NLV74LCX00DTR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74LCX00DTR2G meets industry standards.
7.What is the process for return or replacement of NLV74LCX00DTR2G?
All NLV74LCX00DTR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74LCX00DTR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV74LCX00DTR2G part is unused and in its original packaging.
Return procedure for NLV74LCX00DTR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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