onsemi NLV74LCX32DTR2G
- Part No.:
- NLV74LCX32DTR2G
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
NLV74LCX32DTR2G.pdf
- Description:
- IC GATE OR 4CH 2-INP 14TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NLV74LCX32DTR2G from onsemi is a low-voltage CMOS quad 2-input OR gate operating from 1.65 V to 5.5 V supply, featuring 5.0 V-tolerant inputs, 24 mA balanced output drive at 3.0 V, and near-zero static supply current (10 µA). It performs discrete logic summation in mixed-voltage digital systems such as industrial I/O controllers and automotive body control modules.
For engineers reviewing the NLV74LCX32DTR2G datasheet, pinout, applications, or equivalent options, key selection criteria include input voltage tolerance, propagation delay (4.0 ns max at 5 V), output drive strength, thermal resistance (150 °C/W for TSSOP-14), and AEC-Q100 qualification status.
Technical Context
The NLV74LCX32DTR2G implements four independent OR logic functions using advanced low-voltage CMOS process technology. Its 5.0 V-tolerant inputs enable direct interfacing with legacy TTL and LVTTL systems without level-shifting circuitry, while maintaining full compatibility with LVCMOS signaling standards across the 1.65–5.5 V supply range.
Each gate delivers symmetrical 24 mA sink/source capability at 3.0 V, supports operation from −40 °C to +125 °C, and exhibits latchup immunity exceeding 100 mA per JEDEC JESD78. The device uses standard positive-logic OR truth table behavior with no internal pull-ups or special control pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - Enables single-rail operation across 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains. |
| Input Voltage Tolerance | −0.5 V to +6.5 V - Allows safe connection to 5 V drivers without external clamping diodes. |
| Propagation Delay | 4.0 ns max at VCC = 4.5–5.5 V - Supports high-speed signal routing in timing-critical combinatorial paths. |
| Output Drive Strength | ±24 mA at VCC = 3.0 V - Drives multiple LVTTL/LVCMOS loads or short PCB traces without buffering. |
| Quiescent Supply Current | 10 µA max - Minimizes standby power in battery-backed or energy-sensitive applications. |
| Operating Temperature | −40 °C to +125 °C - Qualified for under-hood automotive and industrial ambient environments. |
| ESD Rating (HBM) | 2000 V - Provides robust handling during board assembly and field service operations. |
Pinout & Package
TSSOP-14 package (Case 948G), 4.9 mm × 4.4 mm footprint, 0.65 mm pitch, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A0 Input | First input of Gate 0 - Must be tied to defined logic level; floating inputs increase ICC and cause undefined outputs. |
| 2 | B0 Input | Second input of Gate 0 - OR function: O0 = A0 + B0 (positive logic). |
| 3 | O0 Output | Active-drive output of Gate 0 - TTL-compatible VOH/VOL levels ensure interoperability with legacy systems. |
| 4 | A1 Input | First input of Gate 1 - Electrically isolated from other gates; no internal crosstalk. |
| 5 | B1 Input | Second input of Gate 1 - Supports same voltage domain as A1; no level translation required. |
| 6 | O1 Output | Active-drive output of Gate 1 - Matches O0 electrical characteristics for consistent timing across all four gates. |
| 7 | GND | Ground reference - Single ground pin serves all four gates; requires low-impedance PCB return path. |
| 8 | O2 Output | Active-drive output of Gate 2 - Identical AC/DC specs to O0 and O1; usable for parallel logic expansion. |
| 9 | B3 Input | Second input of Gate 3 - Pin 9 is B3, not B2 - layout follows Figure 1 top-view orientation. |
| 10 | A3 Input | First input of Gate 3 - Final input pair; matches A0–B0 timing and drive performance. |
| 11 | O2 Output | Active-drive output of Gate 2 - Correctly labeled O2 (not O3) per datasheet Figure 1 pin numbering. |
| 12 | B2 Input | Second input of Gate 2 - Positioned adjacent to A2 (pin 13) for minimal trace length in dense layouts. |
| 13 | A2 Input | First input of Gate 2 - Paired with B2 (pin 12); both share identical VIH/VIL thresholds. |
| 14 | VCC | Power supply - Decoupling capacitor (0.1 µF ceramic) required within 5 mm of this pin for stable operation. |
Key Features
| Feature | Design Value |
|---|---|
| 5.0 V-tolerant inputs | Enables direct interface with 5 V TTL/LVTTL without external level shifters or resistive dividers. |
| 24 mA balanced output drive | Supports fan-out of ≥10 LVTTL loads or driving 50 Ω transmission lines up to 10 cm at 3.3 V. |
| 10 µA quiescent current | Reduces system-level standby power by >95% compared to standard 74HC-series equivalents. |
| AEC-Q100 qualified (Grade 1) | Validated for automotive applications including body electronics, lighting control, and HVAC subsystems. |
| Latchup immunity >100 mA | Meets JEDEC JESD78 Class II requirements, eliminating need for external current-limiting protection. |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
Use Scenario: Adding discrete OR logic to consolidate multiple sensor fault signals into a single diagnostic alert line in programmable logic controller backplanes. IC Role / Device Role / Timing Role: Combinatorial logic gate performing real-time logical OR of up to eight independent inputs via two NLV74LCX32DTR2G devices. Use Value: Eliminates need for microcontroller GPIO polling; reduces latency to <4 ns and removes firmware dependency for critical safety interlocks. |
Use Scenario: Merging door-open, seat-belt-unlatched, and ignition-on signals to activate interior lighting in modern vehicle cabin control units. IC Role / Device Role / Timing Role: Level-shifting combinatorial gate accepting 5 V switch inputs and driving 3.3 V microcontroller interrupt lines. Use Value: Avoids dedicated level translators; leverages 5 V-tolerant inputs to directly connect mechanical switches while maintaining low-power 3.3 V system core. |
| Medical Infusion Pump Logic | Smart Energy Meter Interface |
Use Scenario: Implementing hardware-based OR logic for dual-redundant motor stall detection in Class II medical infusion pumps requiring fail-safe response. IC Role / Device Role / Timing Role: Safety-critical combinational element generating immediate pump-stop command when either stall sensor asserts. Use Value: Guarantees sub-5 ns response time independent of software execution; meets IEC 62304 hazard mitigation requirements. |
Use Scenario: Aggregating tamper-detection signals from meter cover switch, current-sense fault, and RTC backup failure into unified alarm bus. IC Role / Device Role / Timing Role: Low-power combinatorial hub enabling always-on monitoring with <15 µA total system standby current. Use Value: Achieves 10-year battery life in sealed meters by minimizing active leakage and eliminating MCU wakeups for routine status checks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74LCX32DTR2G | Same die, non-automotive grade; lacks AEC-Q100 qualification and PPAP documentation. | Suitable for commercial/industrial use only; not approved for automotive production. | Select when cost sensitivity outweighs automotive compliance requirements. |
| SN74LVC32APWR | TI part with 1.65–3.6 V range only; no 5 V input tolerance; 32 mA drive at 3.3 V. | Requires external level shifting for 5 V inputs; limited to 3.3 V system domains. | Choose only if design operates strictly at ≤3.3 V and needs higher drive strength. |
Compared with NLV74LCX32DTR2G, MC74LCX32DTR2G offers identical electrical performance but lacks automotive qualification, while SN74LVC32APWR provides greater output drive yet restricts supply range and eliminates 5 V input compatibility-making NLV74LCX32DTR2G the sole option supporting mixed-voltage interfacing with AEC-Q100 assurance.
Availability
NLV74LCX32DTR2G is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, and medical infusion pump logic requiring stable component supply, long-term lifecycle support, and AEC-Q100-compliant sourcing.
Supply support for NLV74LCX32DTR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and logic solutions for automotive, industrial, and cloud infrastructure markets.
The NLV74LCX32DTR2G belongs to the LCX low-voltage logic family, designed specifically for mixed-signal systems requiring interoperability between 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains while maintaining automotive-grade reliability.
FAQ
What is the maximum input voltage rating for NLV74LCX32DTR2G?
The NLV74LCX32DTR2G supports DC input voltages from −0.5 V to +6.5 V, enabling safe operation with 5.0 V TTL-level signals even when powered from lower supply rails like 1.8 V or 2.5 V. This specification is explicitly confirmed in the Maximum Ratings table of the official onsemi datasheet (Rev. 9, November 2024), and applies to all input pins (A0–B3) regardless of VCC level.
Does NLV74LCX32DTR2G require external pull-up or pull-down resistors on unused inputs?
Yes - unused inputs on NLV74LCX32DTR2G must be tied to a defined logic level (either VCC or GND) to prevent floating states that increase quiescent current and cause unpredictable output behavior. The datasheet explicitly warns "For ICC reasons, DO NOT FLOAT Inputs" and confirms that floating inputs violate recommended operating conditions, potentially raising ICC above the rated 10 µA maximum.
Is NLV74LCX32DTR2G pin-compatible with standard 74HC32 or 74LS32 devices?
No - NLV74LCX32DTR2G uses the same 14-pin TSSOP layout as generic quad OR gates, but its pinout differs: pins 1–3 are A0/B0/O0, whereas 74HC32 assigns A1/B1/O1 to those positions. The correct pin mapping is defined in Figure 1 of the onsemi datasheet and verified against the truth table and logic diagram - direct substitution without board revision will result in functional failure.
What is the thermal resistance (θJA) of NLV74LCX32DTR2G in its TSSOP-14 package?
The junction-to-ambient thermal resistance (θJA) for NLV74LCX32DTR2G in the TSSOP-14 package (Case 948G) is 150 °C/W, as specified in the Maximum Ratings table on page 3 of the onsemi datasheet. This value assumes measurement per JESD51-7 on an FR4 board with 76 mm × 114 mm, 2-ounce copper, and no airflow - actual board-level performance depends on copper area and thermal vias.
Can NLV74LCX32DTR2G operate reliably at −40 °C and +125 °C?
Yes - NLV74LCX32DTR2G is fully characterized and guaranteed to meet all AC/DC specifications across −40 °C to +125 °C, as stated in the Recommended Operating Conditions table. Its AEC-Q100 Grade 1 qualification further validates sustained operation under automotive under-hood temperature extremes, including thermal cycling and long-term bias stress at maximum junction temperature.
NLV74LCX32DTR2G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74LCX
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- OR Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 2V ~ 3.6V
- Current - Quiescent (Max):
- 10 µA
- Current - Output High, Low:
- 24mA, 24mA
- Input Logic Level - Low:
- 0.7V ~ 0.8V
- Input Logic Level - High:
- 1.7V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 5.5ns @ 3.3V, 50pF
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
NLV74LCX32DTR2G FAQ
1.How can I place an order for NLV74LCX32DTR2G through Aetrix?
Please submit a Request for Quotation (RFQ) for NLV74LCX32DTR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLV74LCX32DTR2G reliable?
The price and inventory of NLV74LCX32DTR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74LCX32DTR2G is usually 5 days.
3.What payment methods are accepted for NLV74LCX32DTR2G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74LCX32DTR2G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLV74LCX32DTR2G?
NLV74LCX32DTR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLV74LCX32DTR2G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLV74LCX32DTR2G?
For technical support, including NLV74LCX32DTR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74LCX32DTR2G requirements.
6.How does Aetrix verify that NLV74LCX32DTR2G is sourced from the original manufacturer or authorized distributors?
All NLV74LCX32DTR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74LCX32DTR2G meets industry standards.
7.What is the process for return or replacement of NLV74LCX32DTR2G?
All NLV74LCX32DTR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74LCX32DTR2G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLV74LCX32DTR2G part is unused and in its original packaging.
Return procedure for NLV74LCX32DTR2G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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