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Home > Products > Integrated Circuits (ICs) > Logic > Buffers, Drivers, Receivers, Transceivers

onsemi NLV74VHC125DTR2G

Name: NLV74VHC125DTR2G
Brand: onsemi
SKU: NLV74VHC125DTR2G
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: NLV74VHC125DTR2G

Manufacturer:: onsemi

Category:: Buffers, Drivers, Receivers, Transceivers

Package:: 14-TSSOP (0.173", 4.40mm Width)

Datasheet:: NLV74VHC125DTR2G.pdf

Description:: IC BUF NON-INVERT 5.5V 14TSSOP

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Product details

Overview

NLV74VHC125DTR2G from onsemi is a quad 3-state bus buffer IC designed for high-speed, low-power digital signal routing in mixed-voltage systems. It features four independent non-inverting buffers with active-high output enable (OE), operates from 2.0 V to 5.5 V, delivers 3.8 ns typical propagation delay at 5 V, and supports CMOS-level input compatibility with full 5.0 V output swing-enabling reliable 3.3 V ↔ 5.0 V level translation in data buses.

For engineers reviewing the NLV74VHC125DTR2G datasheet, pinout, applications, or equivalent options, key selection criteria include its 14-pin TSSOP package, ±25 mA output drive, 3-state leakage < ±2.5 µA, high noise immunity (28% V_CC), and automotive-grade AEC-Q100 qualification per −Q variant lineage.

Technical Context

The NLV74VHC125DTR2G implements four identical non-inverting buffer stages, each with a dedicated active-high 3-state control input (OE). Its silicon-gate CMOS architecture achieves TTL-compatible speed while maintaining sub-4 µA quiescent current at 25°C. Input structures tolerate up to 5.5 V, enabling safe interfacing between 3 V and 5 V domains without external level-shifting circuitry.

All outputs feature robust 3-state disable behavior with controlled rise/fall times, low dynamic noise (V_OLP ≤ 0.8 V), and balanced propagation delays. The device includes power-down protection on inputs and latchup immunity exceeding 100 mA per JESD78 Class II testing-critical for hot-swap and battery-backed system reliability.

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage Range	2.0 V to 5.5 V - Enables operation across 3.3 V and 5.0 V logic domains without voltage translation.
Propagation Delay (t_PLH/t_PHL)	3.8 ns (typ) at V_CC = 5.0 V, C_L = 15 pF - Supports >100 MHz bus clocking with deterministic timing margins.
Output Drive Strength	±8 mA at V_CC = 4.5 V - Sufficient to drive 10–15 cm PCB traces or multiple CMOS loads without signal degradation.
3-State Leakage Current	±2.5 µA max at V_CC = 5.5 V - Ensures minimal bus contention and power loss when outputs are disabled.
Noise Immunity	V_NIH/V_NIL = 28% V_CC - Provides robust rejection of EMI and crosstalk in noisy industrial environments.
Input Voltage Tolerance	−0.5 V to +6.5 V - Allows safe connection to overvoltage or floating inputs during power sequencing or fault conditions.
ESD Rating	Human Body Model > 2000 V - Meets IEC 61000-4-2 Level 2 requirements for board-level ESD robustness.

Pinout & Package

TSSOP-14 (Case 948G), 4.9 mm × 4.4 mm × 1.2 mm body, 0.65 mm pitch, Pb-free, RoHS-compliant surface-mount package optimized for high-density PCB layouts and automated assembly.

Pin/Terminal	Circuit Role	Design Meaning
1, 4, 10, 13	Buffer Input (A1–A4)	CMOS-compatible digital inputs accepting 0–5.5 V; tolerant of 3.3 V or 5 V logic levels.
2, 5, 11, 14	3-State Enable (OE1–OE4)	Active-high control: logic HIGH enables output; logic LOW forces high-impedance state.
3, 6, 12, 9	Buffer Output (Y1–Y4)	Non-inverting buffered outputs with full rail-to-rail swing (0 V to V_CC) and ±8 mA drive.
7	GND	Ground reference for all internal circuitry and I/O; must be low-impedance connection.
14	V_CC	Primary power supply (2.0–5.5 V); decoupling capacitor (0.1 µF) required within 5 mm.

Key Features

Feature	Design Value
Quad independent 3-state buffers	Four isolated channels allow selective bus segment enable/disable without affecting other data paths.
CMOS input compatibility	Accepts standard CMOS logic thresholds (VIH ≥ 3.85 V @ 5 V), eliminating need for external pull-ups or level shifters.
Full 5.0 V output swing	Drives legacy 5 V TTL/CMOS loads directly while powered from 3.3 V supply-enables seamless voltage domain bridging.
High noise immunity	28% V_CC noise margin ensures reliable operation in electrically noisy industrial or automotive environments.
AEC-Q100 qualified lineage	Shares design and qualification foundation with −Q automotive variants, supporting extended temperature (−55°C to +125°C) reliability.

Applications

Industrial PLC Backplane	Automotive Body Control Module
Use Scenario: Isolating and buffering address/data lines between microcontroller and peripheral ICs on a multi-drop CAN/LIN backplane. IC Role / Device Role / Timing Role: Quad buffer provides direction-controlled signal isolation with precise 3-state timing to prevent bus contention during arbitration. Use Value: 3.8 ns propagation delay and 1.0 ns output skew ensure deterministic timing alignment across four parallel data lanes under 5 V operation.	Use Scenario: Interfacing a 3.3 V MCU GPIO bank to 5 V sensor clusters (e.g., door lock actuators, mirror controls) in a body control unit. IC Role / Device Role / Timing Role: Level-translating buffer converts 3.3 V logic outputs to full 5 V swing while tolerating 5.5 V input transients. Use Value: Input overvoltage tolerance (−0.5 V to +6.5 V) and AEC-Q100-aligned reliability eliminate need for external clamping diodes or regulators.
Medical Diagnostic Equipment	Test & Measurement Instrumentation
Use Scenario: Routing configuration signals between FPGA-based control logic and analog front-end ASICs operating at different supply voltages. IC Role / Device Role / Timing Role: Non-inverting buffer with independent OE pins enables synchronized enable/disable of four calibration path selectors. Use Value: Low 0.8 V dynamic output noise (V_OLP) prevents false triggering in sensitive analog measurement circuits adjacent to digital routing.	Use Scenario: Driving multiple DUT interface points from a single pattern generator channel in automated test equipment (ATE). IC Role / Device Role / Timing Role: 3-state output capability allows time-multiplexed signal distribution across shared test fixtures without hardware reconfiguration. Use Value: ±25 mA output drive and 12 ns max disable time (t_PHZ) support fast switching between DUTs with minimal settling delay.

Industrial PLC Backplane

Automotive Body Control Module

Use Scenario: Isolating and buffering address/data lines between microcontroller and peripheral ICs on a multi-drop CAN/LIN backplane.

IC Role / Device Role / Timing Role: Quad buffer provides direction-controlled signal isolation with precise 3-state timing to prevent bus contention during arbitration.

Use Value: 3.8 ns propagation delay and 1.0 ns output skew ensure deterministic timing alignment across four parallel data lanes under 5 V operation.

Use Scenario: Interfacing a 3.3 V MCU GPIO bank to 5 V sensor clusters (e.g., door lock actuators, mirror controls) in a body control unit.

IC Role / Device Role / Timing Role: Level-translating buffer converts 3.3 V logic outputs to full 5 V swing while tolerating 5.5 V input transients.

Use Value: Input overvoltage tolerance (−0.5 V to +6.5 V) and AEC-Q100-aligned reliability eliminate need for external clamping diodes or regulators.

Medical Diagnostic Equipment

Test & Measurement Instrumentation

Use Scenario: Routing configuration signals between FPGA-based control logic and analog front-end ASICs operating at different supply voltages.

IC Role / Device Role / Timing Role: Non-inverting buffer with independent OE pins enables synchronized enable/disable of four calibration path selectors.

Use Value: Low 0.8 V dynamic output noise (V_OLP) prevents false triggering in sensitive analog measurement circuits adjacent to digital routing.

Use Scenario: Driving multiple DUT interface points from a single pattern generator channel in automated test equipment (ATE).

IC Role / Device Role / Timing Role: 3-state output capability allows time-multiplexed signal distribution across shared test fixtures without hardware reconfiguration.

Use Value: ±25 mA output drive and 12 ns max disable time (t_PHZ) support fast switching between DUTs with minimal settling delay.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad 3-state buffer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MC74VHCT125ADTR2G	TTL-compatible inputs (VIH = 2.0 V min @ 5 V), otherwise identical AC/DC specs and pinout.	Better suited for legacy 5 V TTL source interfaces where input threshold matching is critical.	Select when driving from 5 V TTL logic; retains same TSSOP-14 footprint and 3.8 ns speed.
SN74LVC125APW	Lower V_CC range (1.65–3.6 V), 3.3 V only; higher drive (±24 mA), but no 5 V tolerance.	Optimized for pure 3.3 V systems requiring lower power and higher fanout, not mixed-voltage translation.	Choose only for 3.3 V-only designs; incompatible with 5 V buses or overvoltage inputs.

Compared with MC74VHCT125ADTR2G, NLV74VHC125DTR2G offers superior 3.3 V → 5 V level translation via CMOS-input compatibility and 5.5 V input tolerance; versus SN74LVC125APW, it trades 3.3 V-only optimization for broader voltage interoperability and automotive-grade robustness.

Availability

NLV74VHC125DTR2G is available at Aetrix Electronics and suitable for industrial automation, automotive electronics, and medical instrumentation requiring stable component supply, long-term lifecycle support, and AEC-Q100-aligned reliability.

Supply support for NLV74VHC125DTR2G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, sensors, and logic solutions for automotive, industrial, and cloud infrastructure markets.

The NLV74VHC125DTR2G belongs to the VHC logic family-designed for high-speed, low-power digital interfacing in mixed-voltage embedded systems where reliability, noise immunity, and voltage translation are critical.

FAQ

What is the maximum operating temperature for NLV74VHC125DTR2G?

The NLV74VHC125DTR2G is rated for operation from −55°C to +125°C, meeting extended industrial and automotive temperature requirements. This specification is confirmed in the Recommended Operating Conditions table of the official onsemi datasheet (Rev. 11, April 2025), and aligns with the AEC-Q100 qualification baseline used for related −Q automotive variants.

Does NLV74VHC125DTR2G support 3.3 V to 5 V level translation?

Yes, NLV74VHC125DTR2G supports bidirectional 3.3 V ↔ 5 V level translation: its CMOS-compatible inputs accept 3.3 V logic levels while its outputs deliver full 5.0 V swing. The datasheet explicitly states this capability and confirms input tolerance up to 5.5 V-enabling safe interfacing without external components.

Is NLV74VHC125DTR2G pin-compatible with standard 74-series logic packages?

Yes, NLV74VHC125DTR2G uses the industry-standard 14-pin TSSOP footprint (Case 948G) and matches the pinout of MC74VHC125 and MC74VHCT125A devices. Pin functions-including A1–A4, OE1–OE4, Y1–Y4, V_CC, and GND-are identical across these variants, enabling drop-in replacement in existing designs.

What is the 3-state disable time for NLV74VHC125DTR2G?

The maximum 3-state disable time (t_PHZ/t_PLZ) for NLV74VHC125DTR2G is 12.0 ns at V_CC = 5.0 V and C_L = 50 pF, per the AC Electrical Characteristics table. This fast disable ensures minimal bus contention during dynamic enable/disable transitions in time-critical applications.

Does NLV74VHC125DTR2G require external pull-up or pull-down resistors on unused inputs?

Yes, per the datasheet's Recommended Operating Conditions (Note 5), all unused inputs of NLV74VHC125DTR2G must be tied to a valid logic level-either V_CC or GND-to prevent floating nodes, increased power consumption, and potential logic instability. No internal pull resistors are integrated.

NLV74VHC125DTR2G Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: 74VHC

Package/Case:: 14-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Logic Type:: Buffer, Non-Inverting

Number of Elements:: 4

Number of Bits per Element:: 1

Input Type:: -

Output Type:: 3-State

Current - Output High, Low:: 8mA, 8mA

Voltage - Supply:: 2V ~ 5.5V

Operating Temperature:: -55°C ~ 125°C (TA)

Grade:: Automotive

Qualification:: AEC-Q100

Mounting Type:: Surface Mount

Supplier Device Package:: 14-TSSOP

NLV74VHC125DTR2G FAQ

1.How can I place an order for NLV74VHC125DTR2G through Aetrix?

Please submit a Request for Quotation (RFQ) for NLV74VHC125DTR2G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for NLV74VHC125DTR2G reliable?

The price and inventory of NLV74VHC125DTR2G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLV74VHC125DTR2G is usually 5 days.

3.What payment methods are accepted for NLV74VHC125DTR2G?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLV74VHC125DTR2G transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for NLV74VHC125DTR2G?

NLV74VHC125DTR2G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your NLV74VHC125DTR2G order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for NLV74VHC125DTR2G?

For technical support, including NLV74VHC125DTR2G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLV74VHC125DTR2G requirements.

6.How does Aetrix verify that NLV74VHC125DTR2G is sourced from the original manufacturer or authorized distributors?

All NLV74VHC125DTR2G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLV74VHC125DTR2G meets industry standards.

7.What is the process for return or replacement of NLV74VHC125DTR2G?

All NLV74VHC125DTR2G units undergo pre-shipment inspection (PSI). If there is an issue with NLV74VHC125DTR2G, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The NLV74VHC125DTR2G part is unused and in its original packaging.

Return procedure for NLV74VHC125DTR2G:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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