onsemi NLVU1GT125AMUTCG
- Part No.:
- NLVU1GT125AMUTCG
- Manufacturer:
- onsemi
- Package:
- 6-UFDFN
- Datasheet:
-
NLVU1GT125AMUTCG.pdf
- Description:
- IC BUFFER NON-INVERT 5.5V 6UDFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,029
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Product details
Overview
NLVU1GT125AMUTCG from onsemi is an automotive-grade, single-channel non-inverting 3-state buffer with TTL-compatible inputs and full 5.0 V CMOS output swing, operating from 1.65 V to 5.5 V supply, featuring 3.8 ns typical propagation delay at 5.0 V, ±12.5 mA output drive, and AEC-Q100 qualification for under-hood control modules.
For engineers reviewing the NLVU1GT125AMUTCG datasheet, pinout, applications, or equivalent options, key selection considerations include its UDFN6 (1.45 × 1.0 mm) ultra-small footprint, OE-controlled 3-state operation, input overvoltage tolerance up to 7.0 V, and guaranteed performance across −55 °C to +125 °C.
Technical Context
This device implements a single high-speed CMOS buffer with active-high 3-state enable (OE), where logic HIGH on OE enables the non-inverting path from IN A to OUT Y, and logic LOW places OUT Y in high-impedance state. Input thresholds meet LSTTL levels (VIL = 0.8 V, VIH = 2.0 V), while output swing exceeds VOH > 0.8 VCC and VOL < 0.1 VCC under load.
Input and output structures are rated for ±20 mA diode current and withstand DC voltages from −0.5 V to +7.0 V independent of VCC, enabling robust interfacing in mixed-voltage domains. Propagation delays (tPLH/tPHL), enable/disable times (tPZL/tPLZ), and leakage currents (IOZ < ±2.5 µA) are fully characterized across automotive temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 5.5 V - supports dual-rail interface between 1.8 V, 3.3 V, and 5.0 V logic domains |
| Propagation Delay (tPD) | 3.8 ns (typ) @ VCC = 5.0 V, CL = 15 pF - enables timing-critical signal buffering in automotive serial buses |
| Output Drive | ±12.5 mA - sufficient to drive multiple LSTTL loads or moderate capacitive loads without external buffers |
| Input Thresholds | VIL = 0.8 V, VIH = 2.0 V - ensures reliable recognition of legacy TTL-level signals across temperature |
| Overvoltage Tolerance | Inputs/outputs withstand −0.5 V to +7.0 V - eliminates need for external clamping diodes in noisy environments |
| Operating Temperature | −55 °C to +125 °C - validated for engine control units, body controllers, and ADAS sensor interfaces |
| Quiescent Current | ICC ≤ 1.0 µA (max) @ TA = 25 °C - minimizes standby power in always-on vehicle subsystems |
Pinout & Package
Package: UDFN6 (1.45 mm × 1.0 mm, 0.5 mm pitch), case 517AQ, exposed Cu pad for thermal enhancement, Pb-free, MSL Level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - GND | Ground reference | Primary return path for all internal circuitry and output current sink |
| 2 - OE | 3-State enable input | Active-HIGH control: logic HIGH enables buffer; logic LOW forces high-impedance output |
| 3 - IN A | Non-inverting data input | Accepts TTL-level signals; internally protected to ±20 mA and 7.0 V |
| 4 - NC | No connect | Internally unconnected terminal; must be left floating or tied to GND per layout guidelines |
| 5 - OUT Y | Buffered non-inverting output | CMOS-level output capable of sourcing/sinking ±12.5 mA with rail-to-rail swing |
| 6 - VCC | Positive supply | Power supply input; decoupling capacitor required within 2 mm of this pin |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 qualified (Grade 1) | Validated for automotive applications requiring −40 °C to +125 °C ambient operation and PPAP compliance |
| TTL-compatible input thresholds | Ensures interoperability with legacy microcontrollers, FPGAs, and discrete logic without level-shifting |
| 7.0 V overvoltage tolerant I/O | Eliminates external protection components when interfacing with higher-voltage sensors or actuators |
| Ultra-small UDFN6 package | Reduces PCB area by >50% vs. SOIC-6; enables dense routing in space-constrained ECUs and ADAS modules |
| Low dynamic power (CPD = 14 pF) | Minimizes switching power at high frequencies: PD ≈ 14 pF × VCC² × fin + ICC × VCC |
Applications
| Engine Control Unit (ECU) Signal Isolation | Body Control Module (BCM) Bus Buffering |
|---|---|
|
Use Scenario: Isolating diagnostic communication lines (e.g., ISO 9141, K-Line) from MCU GPIOs during firmware updates or fault conditions. IC Role / Device Role / Timing Role: Non-inverting 3-state buffer providing controlled signal pass-through and high-impedance isolation during reprogramming. Use Value: Prevents bus contention during flash programming; OE control allows seamless integration into existing ECU reset sequences. |
Use Scenario: Driving multiple door lock actuator control lines from a single microcontroller port with shared enable logic. IC Role / Device Role / Timing Role: Single-channel buffer with OE enabling synchronized activation of parallel outputs across BCM sub-systems. Use Value: Reduces MCU pin count and simplifies firmware control while maintaining precise timing via 3.8 ns tPD. |
| ADAS Camera Interface Level Translation | Infotainment System Display Data Latching |
|
Use Scenario: Interfacing 1.8 V image sensor data lanes to 3.3 V video processor inputs in surround-view camera modules. IC Role / Device Role / Timing Role: Voltage-tolerant buffer translating TTL-level signals across supply domains without external biasing. Use Value: Enables direct connection between low-voltage sensors and higher-voltage processors, reducing BOM cost and board area. |
Use Scenario: Latching display configuration bits from an MCU to a TFT controller during system boot-up sequence. IC Role / Device Role / Timing Role: Non-inverting buffer with OE used as latch-enable signal to freeze display parameter settings. Use Value: Provides deterministic setup/hold timing margins (tPZL/tPLZ < 8.0 ns) for reliable register loading in infotainment SoCs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar non-inverting 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74VHC1G125DTT1G | Same UDFN6 package, but rated only to +85 °C; no AEC-Q100 qualification; slightly higher ICC (max 1 µA vs. 1 µA) | Suitable for industrial or consumer applications; not approved for automotive under-hood use | Select when automotive qualification is unnecessary and cost sensitivity outweighs temperature margin |
| SN74LVC1G125DBVR | Higher max output drive (±32 mA); wider VCC range (1.65–5.5 V); same pinout; no AEC-Q100 certification | Better suited for driving heavier capacitive loads or longer traces; lacks automotive traceability and PPAP support | Choose for non-automotive designs needing stronger drive capability and broader voltage flexibility |
Compared with MC74VHC1G125DTT1G and SN74LVC1G125DBVR, the NLVU1GT125AMUTCG uniquely delivers AEC-Q100 Grade 1 qualification, 7.0 V I/O tolerance, and guaranteed −55 °C to +125 °C operation-making it the only option qualified for safety-critical automotive signal routing where reliability and environmental resilience are mandatory.
Availability
NLVU1GT125AMUTCG is available at Aetrix Electronics and suitable for engine control units, body control modules, ADAS camera interfaces, and infotainment systems requiring stable component supply, long-term automotive lifecycle support, and traceable sourcing.
Supply support for NLVU1GT125AMUTCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient electronics, delivering silicon solutions for automotive, industrial, cloud, medical, and IoT applications.
The NLVU1GT125AMUTCG belongs to the MiniGate™ family of ultra-small logic devices, designed specifically for space-constrained automotive control modules requiring high reliability, low power, and robust signal integrity in harsh environments.
FAQ
What is the operating temperature range for NLVU1GT125AMUTCG?
The NLVU1GT125AMUTCG is specified for operation from −55 °C to +125 °C ambient temperature and is AEC-Q100 qualified for automotive Grade 1 applications. This range covers under-hood environments such as engine control units and transmission control modules where thermal stress is extreme. The NLVU1GT125AMUTCG maintains full electrical performance-including propagation delay, output drive, and leakage-across this entire range, as verified in the official onsemi datasheet revision 7.
Does NLVU1GT125AMUTCG support 1.8 V logic interfacing?
Yes, NLVU1GT125AMUTCG operates down to 1.65 V VCC and accepts TTL-compatible input thresholds (VIL = 0.8 V, VIH = 2.0 V), making it compatible with 1.8 V microcontrollers when VCC = 1.8 V. Its inputs tolerate up to 7.0 V regardless of supply voltage, allowing safe interfacing with higher-voltage peripherals. The NLVU1GT125AMUTCG output swing scales with VCC, delivering VOH > 0.8 × VCC and VOL < 0.1 × VCC under load.
What is the function of Pin 4 (NC) on NLVU1GT125AMUTCG?
Pin 4 on NLVU1GT125AMUTCG is designated NC (No Connect) and is internally unconnected. It must not be soldered to any net on the PCB; best practice is to leave it floating or tie it to GND only if required by board-level EMI mitigation strategies-per onsemi's layout guidance in the 517AQ package drawing. The NLVU1GT125AMUTCG functionality is fully defined by Pins 1 (GND), 2 (OE), 3 (IN A), 5 (OUT Y), and 6 (VCC); Pin 4 has no electrical role in the NLVU1GT125AMUTCG operation.
Is NLVU1GT125AMUTCG pin-compatible with NLU1GT125MUTCG?
No, NLVU1GT125AMUTCG is not pin-compatible with NLU1GT125MUTCG. While both share the UDFN6 footprint, NLVU1GT125AMUTCG uses case 517AQ (1.45 × 1.0 mm, 0.5 mm pitch), whereas NLU1GT125MUTCG uses case 517AA (1.2 × 1.0 mm, 0.4 mm pitch). Their pad layouts differ in dimensions and pitch, requiring separate land patterns. The NLVU1GT125AMUTCG also adds automotive-specific process controls and AEC-Q100 validation not present in the commercial NLU1GT125MUTCG variant.
What is the maximum output capacitive load supported by NLVU1GT125AMUTCG?
The NLVU1GT125AMUTCG is characterized for CL = 15 pF and CL = 50 pF in AC specifications, with propagation delay increasing from 3.8 ns to 5.3 ns at 5.0 V VCC. Its 3-state output capacitance (COUT) is 6 pF, and input capacitance (CIN) is 10 pF. While not explicitly rated for higher loads, stable operation up to ~75 pF is achievable with proper termination and layout; for loads exceeding 50 pF, the NLVU1GT125AMUTCG may require series damping or reduced edge rates to maintain signal integrity.
NLVU1GT125AMUTCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-UFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 8mA, 8mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-UDFN (1.45x1)
NLVU1GT125AMUTCG FAQ
1.How can I place an order for NLVU1GT125AMUTCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NLVU1GT125AMUTCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLVU1GT125AMUTCG reliable?
The price and inventory of NLVU1GT125AMUTCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLVU1GT125AMUTCG is usually 5 days.
3.What payment methods are accepted for NLVU1GT125AMUTCG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLVU1GT125AMUTCG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLVU1GT125AMUTCG?
NLVU1GT125AMUTCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLVU1GT125AMUTCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLVU1GT125AMUTCG?
For technical support, including NLVU1GT125AMUTCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLVU1GT125AMUTCG requirements.
6.How does Aetrix verify that NLVU1GT125AMUTCG is sourced from the original manufacturer or authorized distributors?
All NLVU1GT125AMUTCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLVU1GT125AMUTCG meets industry standards.
7.What is the process for return or replacement of NLVU1GT125AMUTCG?
All NLVU1GT125AMUTCG units undergo pre-shipment inspection (PSI). If there is an issue with NLVU1GT125AMUTCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLVU1GT125AMUTCG part is unused and in its original packaging.
Return procedure for NLVU1GT125AMUTCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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