My Inquiry
My Account
onsemi NLX1G10AMX1TCG
- Part No.:
- NLX1G10AMX1TCG
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 6-XFLGA
- Datasheet:
-
NLX1G10AMX1TCG.pdf
- Description:
- IC GATE NAND 1CH 3-INP 6ULLGA
- Quantity:
- Payment:
- Shipping:
Inventory:2,784
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NLX1G10AMX1TCG from onsemi is a 3-input CMOS NAND gate in an ultra-small ULLGA6 (1.45 × 1.0 mm) package, designed for high-speed logic interfacing in space-constrained applications. It operates from 1.65 V to 5.5 V, delivers 2.4 ns typical propagation delay at 5.0 V, supports ±24 mA balanced output drive, and features overvoltage-tolerant inputs up to 7.0 V - enabling robust level-shifting in mixed-voltage systems such as portable sensor hubs and battery-powered microcontroller peripherals.
For engineers reviewing the NLX1G10AMX1TCG datasheet, pinout, applications, or equivalent options, key selection criteria include its 3-input NAND function, OVT input capability, 1.45 × 1.0 mm ULLGA6 footprint, 2.4 ns propagation delay at 5 V, and operation across 1.65–5.5 V supply range - all critical for low-power, high-density digital signal conditioning and enable/control logic in embedded edge nodes.
Technical Context
The NLX1G10AMX1TCG implements a single 3-input NAND gate using advanced CMOS process technology optimized for speed and low static power. Its input structure incorporates overvoltage tolerance circuitry that clamps input voltages up to 7.0 V independently of VCC, allowing safe interfacing with higher-voltage signals without external protection components.
It exhibits balanced tPLH/tPHL propagation delays across supply voltages (e.g., 0.5 ns typical at 5.0 V with CL = 15 pF), supports rail-to-rail output swing, and maintains specified DC electrical characteristics over −55 °C to +125 °C - confirming suitability for industrial-grade logic buffering and combinatorial control in thermally demanding environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | 3-input NAND gate - performs Boolean Y = NOT(A AND B AND C); enables compact combinatorial logic without external gates |
| Propagation Delay | 2.4 ns typical @ VCC = 5.0 V, RL = 1 MΩ, CL = 15 pF - ensures sub-5 ns timing in high-frequency enable/control paths |
| Supply Voltage Range | 1.65 V to 5.5 V - supports direct interface with 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains |
| Input Voltage Tolerance | −0.5 V to +7.0 V - allows safe connection to signals exceeding VCC (e.g., 5 V inputs into 3.3 V system) |
| Output Drive | ±24 mA - provides sufficient sink/source current to drive multiple standard CMOS loads or small LEDs directly |
| Operating Temperature | −55 °C to +125 °C - qualified for extended industrial and automotive under-hood ambient conditions |
| ESD Rating | >2000 V HBM - enhances reliability during board handling and system integration |
Pinout & Package
Package: ULLGA6 (1.45 × 1.0 mm, 0.5 mm pitch), leadless land-grid array with exposed thermal pad; moisture sensitivity level 1; Pb-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Input A | First NAND input; accepts logic levels from 0 V to 7.0 V regardless of VCC |
| 2 | Input B | Second NAND input; overvoltage tolerant; must not be left floating |
| 3 | GND | Ground reference for logic and power; connects to PCB ground plane via exposed pad |
| 4 | VCC | Positive supply input; decoupling capacitor required within 2 mm for stable high-speed operation |
| 5 | Output Y | NAND result; rail-to-rail CMOS output capable of driving ≥2 LSTTL loads or 10 µA leakage-limited inputs |
| 6 | Input C | Third NAND input; identical OVT and voltage-range specs as Pins 1 and 2 |
Key Features
| Feature | Design Value |
|---|---|
| Overvoltage-Tolerant Inputs | Accepts up to 7.0 V independent of VCC - eliminates need for external level-shifters when interfacing legacy 5 V signals to modern low-voltage MCUs |
| Ultra-Small Footprint | ULLGA6 package (1.45 × 1.0 mm) saves >60% board area vs. standard SOT-363 - critical for wearables and miniaturized IoT sensors |
| Balanced Propagation Delays | tPLH and tPHL match within 0.2 ns typical - prevents duty-cycle distortion in clocked enable paths or pulse-width-sensitive control signals |
| Low Quiescent Current | ICC ≤ 1 µA max at TA = 25 °C - extends battery life in always-on sensor wake-up logic and low-power state machines |
| Pb-Free & RoHS Compliant | Meets IPC/JEDEC J-STD-020 reflow profile - supports lead-free manufacturing without solder joint reliability compromise |
Applications
| Industrial Sensor Interface | Portable Medical Device Logic |
|---|---|
Use Scenario: Combining three sensor fault flags (temperature, pressure, humidity) into a single hardware shutdown signal for a microcontroller. IC Role / Device Role / Timing Role: 3-input NAND gate acting as active-low OR-of-faults; outputs LOW only when all three sensors report normal status. Use Value: Reduces BOM count by replacing discrete diode-OR or additional logic IC; leverages OVT inputs to accept mixed 3.3 V and 5 V sensor outputs without level translation. | Use Scenario: Enabling a low-power Bluetooth LE transceiver only when button press, motion detection, and battery voltage are simultaneously valid. IC Role / Device Role / Timing Role: Combinatorial enable gate synchronizing three asynchronous user/system events before powering RF subsystem. Use Value: Achieves <1 µA quiescent current in standby; 2.4 ns delay ensures immediate response (<100 ns total) upon event alignment - critical for responsive patient-triggered alerts. |
| Automotive Body Control Module | Smart Home Hub Signal Conditioning |
Use Scenario: Generating a lamp driver enable signal requiring ignition ON, door open, and headlight switch activation - all sourced from different vehicle subnets. IC Role / Device Role / Timing Role: NAND-based safety interlock ensuring all three conditions are met before actuating 12 V load drivers. Use Value: −55 °C to +125 °C rating and 7.0 V OVT inputs tolerate automotive transients and mixed 5 V/12 V signal conditioning without external TVS or resistors. | Use Scenario: Consolidating occupancy, ambient light, and PIR motion signals to trigger smart lighting control in a compact wall-mounted hub. IC Role / Device Role / Timing Role: Low-latency combinatorial logic block feeding MCU interrupt pin; minimizes wake latency in energy-harvesting designs. Use Value: 1.65 V minimum VCC allows direct operation from harvested energy storage (e.g., supercapacitor at 1.8 V); ULLGA6 footprint fits within 8 mm² PCB real estate budget. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-input NAND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G10DBVR | Same 3-input NAND function; 1.65–5.5 V VCC; but only 5.5 ns typical tPD @ 3.3 V; no OVT inputs (max VIN = VCC + 0.5 V) | Requires external level shifters for >VCC inputs; unsuitable for direct 5 V signal injection into 3.3 V systems | Select when OVT is unnecessary and lower cost is prioritized over input flexibility |
| 74AUP1G10GW,125 | Lower ICC (0.9 µA typ), smaller UDFN6 (1.0 × 1.0 mm), but only 1.0–3.6 V VCC range and no OVT capability | Cannot operate at 5 V or accept 5 V inputs; limited to ultra-low-power 1.8/2.5/3.3 V-only designs | Select only for battery-critical applications where 5 V compatibility is excluded from system architecture |
Compared with SN74LVC1G10DBVR and 74AUP1G10GW,125, the NLX1G10AMX1TCG uniquely combines 7.0 V overvoltage-tolerant inputs with 2.4 ns speed and 1.45 × 1.0 mm footprint - making it the sole option among these three for mixed-voltage industrial or automotive signal consolidation without added protection circuitry.
Availability
NLX1G10AMX1TCG is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical device logic, and automotive body control modules requiring stable component supply, long-term lifecycle support, and guaranteed Pb-free compliance.
Supply support for NLX1G10AMX1TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and IoT applications.
The NLX1G10AMX1TCG belongs to the MiniGate™ family of ultra-small logic devices, engineered specifically for space-constrained, low-power digital signal conditioning and voltage-level interoperability in next-generation edge electronics.
FAQ
What is the maximum input voltage the NLX1G10AMX1TCG can tolerate?
The NLX1G10AMX1TCG supports DC input voltages from −0.5 V to +7.0 V on all inputs (A, B, C), regardless of the VCC supply voltage. This overvoltage tolerance is implemented via internal clamping structures and is validated per datasheet Maximum Ratings - enabling safe interfacing with signals exceeding VCC, such as 5 V sensor outputs connected to a 3.3 V system powered by NLX1G10AMX1TCG.
Does the NLX1G10AMX1TCG require external pull-up or pull-down resistors on unused inputs?
Yes - the NLX1G10AMX1TCG datasheet explicitly states that unused inputs must not be left open and must be tied to a defined logic HIGH or LOW voltage level. Floating inputs can cause increased ICC, erratic output behavior, or excessive power consumption due to intermediate input voltage states triggering both NMOS and PMOS transistors simultaneously in the input stage.
What is the thermal resistance (θJA) of the NLX1G10AMX1TCG in its ULLGA6 package?
The NLX1G10AMX1TCG has a junction-to-ambient thermal resistance (θJA) of 496 °C/W, measured on an FR4 board with minimum pad spacing, 10 mm × 1 inch 2-ounce copper trace, and no airflow. This value reflects worst-case still-air dissipation; actual θJA improves significantly with proper PCB copper pour under the exposed thermal pad and adjacent GND vias.
Can the NLX1G10AMX1TCG drive a standard LED directly?
Yes - the NLX1G10AMX1TCG provides ±24 mA balanced output drive capability, which exceeds the typical 10–20 mA forward current required for indicator LEDs. When configured as a low-side driver (LED anode to VCC, cathode to Y output), the NLX1G10AMX1TCG can sink up to 24 mA while maintaining VOL ≤ 0.22 V at 24 mA and VCC = 3.0 V, ensuring efficient LED illumination without external transistor buffering.
Is the NLX1G10AMX1TCG pin-compatible with other packages in the NLX1G10 family?
No - the NLX1G10AMX1TCG uses the ULLGA6 (1.45 × 1.0 mm, 0.5 mm pitch) package, while other variants like NLX1G10CMX1TCG use ULLGA6 (1.0 × 1.0 mm, 0.35 mm pitch) and NLX1G10MUTCG use UDFN6 (1.2 × 1.0 mm, 0.4 mm pitch). These differ in pad layout, pitch, and dimensions; PCB layout is not interchangeable between them despite identical logic function and pin numbering.
NLX1G10AMX1TCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-XFLGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- NAND Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Features:
- -
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 32mA, 32mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 7ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-ULLGA (1.45x1)
NLX1G10AMX1TCG FAQ
1.How can I place an order for NLX1G10AMX1TCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NLX1G10AMX1TCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLX1G10AMX1TCG reliable?
The price and inventory of NLX1G10AMX1TCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLX1G10AMX1TCG is usually 5 days.
3.What payment methods are accepted for NLX1G10AMX1TCG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLX1G10AMX1TCG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLX1G10AMX1TCG?
NLX1G10AMX1TCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLX1G10AMX1TCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLX1G10AMX1TCG?
For technical support, including NLX1G10AMX1TCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLX1G10AMX1TCG requirements.
6.How does Aetrix verify that NLX1G10AMX1TCG is sourced from the original manufacturer or authorized distributors?
All NLX1G10AMX1TCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLX1G10AMX1TCG meets industry standards.
7.What is the process for return or replacement of NLX1G10AMX1TCG?
All NLX1G10AMX1TCG units undergo pre-shipment inspection (PSI). If there is an issue with NLX1G10AMX1TCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLX1G10AMX1TCG part is unused and in its original packaging.
Return procedure for NLX1G10AMX1TCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NLX1G10AMX1TCG Tags
-
SN74LVC1G14DBVR
Texas Instruments
-
SN74LVC1G14DCKR
Texas Instruments
-
SN74AHC1G14DBVR
Texas Instruments
-
SN74LVC1G08DBVR
Texas Instruments
-
SN74LVC1G08DCKR
Texas Instruments
-
SN74LVC1G32DCKR
Texas Instruments
-
SN74LVC1G04DBVR
Texas Instruments
.jpg)
-
74LVC1G08GW,125
Nexperia USA Inc.
-
SN74LVC1G04DCKR
Texas Instruments
-
SN74AHC1G08DBVR
Texas Instruments
-
SN74LVC1G32DBVR
Texas Instruments
-
SN74AHCT1G08DBVR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
