onsemi NLX2GU04BMX1TCG
- Part No.:
- NLX2GU04BMX1TCG
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 6-XFLGA
- Datasheet:
-
NLX2GU04BMX1TCG.pdf
- Description:
- IC INVERTER 2CH 2-INP 6ULLGA
- Quantity:
- Payment:

- Shipping:

Inventory:42,000
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Product details
Overview
NLX2GU04BMX1TCG from onsemi is a dual unbuffered CMOS inverter in ULLGA6 (1.2 × 1.0 mm, 0.4 mm pitch) package, designed for crystal oscillator circuits, analog pulse shaping, and high-impedance amplifier interfaces. It operates from 1.65 V to 5.5 V, delivers ±16 mA balanced output drive, and features overvoltage-tolerant (OVT) I/O pins rated to 7.0 V independent of supply.
For engineers reviewing the NLX2GU04BMX1TCG datasheet, pinout, applications, or equivalent options, key selection criteria include unbuffered architecture for oscillator stability, OVT input/output tolerance, ultra-small footprint compatibility with space-constrained PCBs, and guaranteed propagation delay ≤4.5 ns at 3.3 V with 15 pF load.
Technical Context
The NLX2GU04BMX1TCG implements two independent unbuffered inverter stages-no internal buffering enables direct integration into Pierce oscillator topologies and analog signal inversion paths where phase linearity and minimal propagation skew are critical. Its input and output structures incorporate overvoltage protection diodes, allowing safe operation with input signals up to 7.0 V regardless of VCC level.
This device supports rail-to-rail digital logic operation across 1.65–5.5 V, with balanced tPLH/tPHL delays (≤4.1 ns typical at 3.3 V/15 pF), low input capacitance (7 pF), and output capacitance (8 pF). The unbuffered design avoids added gate delay and phase distortion common in buffered inverters, making it suitable for precision timing and analog feedback loops.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - Enables interoperability with 1.8 V, 2.5 V, 3.3 V, and 5 V logic domains without level shifters. |
| Output Drive | ±16 mA - Sufficient to directly drive crystal loads, small capacitive nodes, or interface with standard CMOS inputs. |
| OVT Rating | ±7.0 V on I/O - Permits use in mixed-voltage systems or with external analog signals exceeding VCC without clamping damage. |
| tPLH / tPHL | ≤4.5 ns max at 3.3 V/15 pF - Ensures fast, symmetrical switching for stable oscillator startup and low-jitter clock generation. |
| Input Capacitance | 7 pF - Minimizes loading on high-impedance oscillator nodes and preserves Q-factor in crystal resonator circuits. |
| Package | ULLGA6, 1.2 × 1.0 mm, 0.4 mm pitch - Ultra-compact land-grid array optimized for dense RF/analog PCB layouts. |
Pinout & Package
ULLGA6 (1.2 × 1.0 mm, 0.4 mm pitch) package with exposed thermal pad; solder-mask defined pads per CASE 613AE; moisture sensitivity level (MSL) 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | IN A2 | Inverter 2 input - Accepts unbuffered analog/digital signal; OVT protected to 7.0 V. |
| 2 | IN A1 | Inverter 1 input - Independent input path; identical electrical behavior to Pin 1. |
| 3 | GND | Ground reference - Shared return for both inverters; requires low-inductance connection to minimize noise coupling. |
| 4 | VCC | Supply voltage - Powers both inverters; decoupling capacitor recommended within 2 mm of this pin. |
| 5 | OUT Y2 | Inverter 2 output - Unbuffered output stage; drives crystal or downstream logic with matched source/sink capability. |
| 6 | OUT Y1 | Inverter 1 output - Electrically identical to Pin 5; enables dual-path oscillator or differential signal conditioning. |
Key Features
| Feature | Design Value |
|---|---|
| Unbuffered architecture | Enables direct crystal connection in Pierce oscillators without added phase shift or gain roll-off. |
| Overvoltage-tolerant I/O | Supports 7.0 V signal injection while powered from 1.65–5.5 V, eliminating external clamping diodes. |
| Balanced propagation delay | tPLH ≈ tPHL ensures symmetric waveform edges critical for low-jitter clock synthesis and pulse shaping. |
| Ultra-small ULLGA6 footprint | 1.2 × 1.0 mm area reduces PCB real estate by >50% vs. standard SOT-363, ideal for wearables and IoT sensors. |
| Pb-free construction | Complies with RoHS Directive 2011/65/EU and JEDEC J-STD-020 MSL 1 reflow profile. |
Applications
| Crystal Oscillator Circuit | Pulse Shaping Interface |
|---|---|
|
Use Scenario: Generating stable 1–20 MHz clock signals using a parallel-resonant quartz crystal in a Pierce configuration. IC Role / Device Role / Timing Role: Core inverter element providing 180° phase shift and gain in the oscillator loop; unbuffered design maintains crystal Q and start-up reliability. Use Value: Eliminates need for external bias resistors or discrete transistors; supports wide VCC range without recalibration. |
Use Scenario: Converting slow-rising or noisy digital edges into clean, fast-rising pulses for trigger inputs in data acquisition systems. IC Role / Device Role / Timing Role: High-speed inverter acting as edge accelerator and noise filter; OVT inputs tolerate overshoot on legacy bus lines. Use Value: Reduces jitter accumulation in timing-critical sampling clocks; ±16 mA drive ensures fast charging of 50 pF scope probe loads. |
| Analog Feedback Inversion | High-Z Signal Buffering |
|
Use Scenario: Inverting feedback path in op-amp-based active filters or phase-shift networks requiring precise 180° polarity reversal. IC Role / Device Role / Timing Role: Low-capacitance (7 pF) unbuffered inverter used as passive-like inversion node with minimal phase perturbation. Use Value: Preserves filter cutoff accuracy and group delay flatness; no internal buffering-induced peaking or instability. |
Use Scenario: Isolating high-impedance sensor outputs (e.g., piezoelectric, MEMS microphone) from downstream ADC input capacitance. IC Role / Device Role / Timing Role: Unity-gain inverter providing galvanic isolation and impedance transformation without loading the source. Use Value: Input leakage <±0.1 µA prevents DC offset drift; OVT tolerance accommodates sensor ESD transients up to ±7 V. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual unbuffered inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MC74VHC1G04DTT1G | Buffered architecture; higher typical propagation delay (5.5 ns @ 3.3 V); no OVT rating. | Suitable for general-purpose logic inversion but not crystal oscillator use due to added phase shift. | Select only when unbuffered operation is unnecessary and OVT tolerance is not required. |
| SN74LVC1G04DBVR | Buffered; supports 1.65–5.5 V; IOH/IOL = ±32 mA; no OVT; larger SOT-23-5 package (2.9 × 1.6 mm). | Better drive strength for fanout-heavy logic, but incompatible with crystal oscillator designs requiring unbuffered gain. | Prefer for digital-only applications needing higher current drive and board-level layout flexibility. |
Compared with MC74VHC1G04DTT1G and SN74LVC1G04DBVR, the NLX2GU04BMX1TCG uniquely combines unbuffered topology, OVT I/O, and sub-1.3 mm² footprint-making it irreplaceable in miniaturized oscillator and analog-signal conditioning roles where phase integrity and voltage robustness are non-negotiable.
Availability
NLX2GU04BMX1TCG is available at Aetrix Electronics and suitable for crystal oscillator modules, portable medical sensor interfaces, and industrial IoT timing subsystems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for NLX2GU04BMX1TCG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power management, analog, logic, and sensing solutions for automotive, industrial, cloud, and consumer markets.
The NLX2GU04BMX1TCG belongs to the MiniGate™ family of ultra-small logic devices engineered specifically for space-constrained analog-digital interface applications-including oscillator circuits, signal conditioning, and mixed-voltage system bridging.
FAQ
What is the primary function of the NLX2GU04BMX1TCG?
The NLX2GU04BMX1TCG is a dual unbuffered CMOS inverter optimized for crystal oscillator circuits and analog signal inversion. Its unbuffered design provides minimal phase shift and predictable gain-critical for stable oscillator operation-and its overvoltage-tolerant I/O pins allow safe interfacing with signals up to 7.0 V regardless of VCC level. This makes the NLX2GU04BMX1TCG distinct from buffered logic inverters intended solely for digital logic translation.
Can the NLX2GU04BMX1TCG be used in a Pierce oscillator configuration?
Yes-the NLX2GU04BMX1TCG is explicitly designed for Pierce oscillator use. Its unbuffered architecture avoids internal stage delays that degrade crystal Q and cause start-up failure. The datasheet confirms suitability for "oscillator, pulse-shaping and high input impedance amplifier applications," and the balanced ±16 mA output drive supports direct connection to standard 32.768 kHz or 1–20 MHz crystals with appropriate load capacitors. The NLX2GU04BMX1TCG's low input capacitance (7 pF) further preserves oscillator stability.
What is the maximum operating temperature range for the NLX2GU04BMX1TCG?
The NLX2GU04BMX1TCG is rated for continuous operation from −55 °C to +125 °C ambient temperature, as specified in the Recommended Operating Conditions table. This extended range supports deployment in harsh environments such as automotive engine compartments, industrial motor controls, and outdoor wireless infrastructure-where thermal cycling and sustained high temperatures demand robust silicon performance. The NLX2GU04BMX1TCG maintains full electrical specifications across this entire range.
Does the NLX2GU04BMX1TCG require external biasing components in oscillator applications?
No-unlike many discrete transistor-based oscillators, the NLX2GU04BMX1TCG integrates all necessary gain and phase inversion in a single die. Its internal structure eliminates the need for external bias resistors or feedback networks in standard Pierce configurations. The datasheet states it is "well suited for use in oscillator" applications without qualification, and the unbuffered design ensures predictable loop gain. External components remain limited to the crystal and two load capacitors-simplifying BOM and layout for the NLX2GU04BMX1TCG.
Is the NLX2GU04BMX1TCG pin-compatible with other MiniGate inverters like NLX2GU04AMX1TCG or NLX2GU04CMX1TCG?
No-while all NLX2GU04 variants share identical logic function and pin assignment (1: A2, 2: A1, 3: GND, 4: VCC, 5: Y2, 6: Y1), the NLX2GU04BMX1TCG uses the ULLGA6 1.2 × 1.0 mm package (CASE 613AE), whereas NLX2GU04AMX1TCG uses 1.45 × 1.0 mm (CASE 613AF) and NLX2GU04CMX1TCG uses 1.0 × 1.0 mm (CASE 613AD). Pad layouts differ in size and pitch; therefore, PCB redesign is required when substituting between these variants. The NLX2GU04BMX1TCG must be placed using its specific 0.4 mm pitch footprint.
NLX2GU04BMX1TCG Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 6-XFLGA
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 2
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 1.65V ~ 5.5V
- Current - Quiescent (Max):
- 1 µA
- Current - Output High, Low:
- 16mA, 16mA
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- 5.6ns @ 5V, 50pF
- Operating Temperature:
- -55°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-ULLGA (1.2x1)
NLX2GU04BMX1TCG FAQ
1.How can I place an order for NLX2GU04BMX1TCG through Aetrix?
Please submit a Request for Quotation (RFQ) for NLX2GU04BMX1TCG on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NLX2GU04BMX1TCG reliable?
The price and inventory of NLX2GU04BMX1TCG are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NLX2GU04BMX1TCG is usually 5 days.
3.What payment methods are accepted for NLX2GU04BMX1TCG?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NLX2GU04BMX1TCG transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NLX2GU04BMX1TCG?
NLX2GU04BMX1TCG orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NLX2GU04BMX1TCG order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NLX2GU04BMX1TCG?
For technical support, including NLX2GU04BMX1TCG datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NLX2GU04BMX1TCG requirements.
6.How does Aetrix verify that NLX2GU04BMX1TCG is sourced from the original manufacturer or authorized distributors?
All NLX2GU04BMX1TCG products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NLX2GU04BMX1TCG meets industry standards.
7.What is the process for return or replacement of NLX2GU04BMX1TCG?
All NLX2GU04BMX1TCG units undergo pre-shipment inspection (PSI). If there is an issue with NLX2GU04BMX1TCG, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NLX2GU04BMX1TCG part is unused and in its original packaging.
Return procedure for NLX2GU04BMX1TCG:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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