onsemi NOIX2SN8000B-LTI1
- Part No.:
- NOIX2SN8000B-LTI1
- Manufacturer:
- onsemi
- Category:
- Image Sensors, Camera
- Package:
- 163-BCLGA
- Datasheet:
-
NOIX2SN8000B-LTI1.pdf
- Description:
- IC IMAGE SENS 8MP MONO 163CLGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NOIX2SN8000B-LTI1 from onsemi is a monochrome, global shutter CMOS image sensor with 4096 × 2160 active pixels (8.8 Mp), 3.2 µm pixel pitch, and 1/1.1-inch optical format (14.8 mm diagonal). It delivers 128 fps at full 12-bit resolution using 24-lane HiSPi interface and supports configurable lane count (24/12/6) for bandwidth scalability in machine vision cameras.
For engineers reviewing the NOIX2SN8000B-LTI1 datasheet, pinout, applications, or equivalent options, this page provides verified technical context, validated pin functions, real-world use cases in industrial imaging, and two confirmed alternative parts with documented functional and interface differences.
Technical Context
The NOIX2SN8000B-LTI1 implements column-parallel 12-bit ADCs and pipelined global shutter operation-enabling simultaneous integration and sequential readout. Its on-chip sequencer supports up to 8 programmable regions of interest (ROI) and 3 register contexts for frame-by-frame switching via I²C or SPI.
It uses a 32.4 MHz external clock input to drive an internal PLL generating HiSPi timing, analog bias, and digital clocks. The 24-lane HiSPi interface operates at 777.6 Mbps/lane (LVDS differential), with scalable lane multiplexing (24/12/6) and configurable data pedestal and digital gain per color channel-even in monochrome mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 4096 (H) × 2160 (V) active pixels - supports 1080p-class imaging with overscan margin for lens shading correction |
| Pixel Size | 3.2 µm - balances sensitivity and spatial resolution for high-speed industrial inspection |
| Shutter Type | Global shutter - eliminates motion blur in fast-moving object capture without rolling shutter artifacts |
| Output Interface | HiSPi (24-lane LVDS) - delivers 12-bit data at 128 fps; lanes scalable to 12 or 6 for reduced FPGA I/O count |
| Frame Rate (12-bit) | 128 fps @ 24 lanes - enables real-time high-throughput inspection at full resolution |
| Read Noise | < 4 e⁻ (1× analog gain) - ensures low-noise performance for precision metrology applications |
| Dynamic Range | 68 dB - supports wide scene luminance variation without saturation or shadow loss |
| Operating Temp. | −40°C to +85°C junction - qualified for uncooled industrial camera enclosures |
Pinout & Package
NOIX2SN8000B-LTI1 is housed in a 163-pin Ceramic Land Grid Array (CLGA) package measuring 21 mm × 20 mm, optimized for thermal dissipation and mechanical stability in 29 mm × 29 mm camera modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DATA_[0:23]_P/N | HiSPi differential data lanes | 24 bidirectional LVDS pairs - support 777.6 Mbps/lane; unused lanes must float |
| D_CLK_[0:5]_P/N | HiSPi differential clock lanes | 6 clock pairs (2 active per 24-lane config); D_CLK_2/D_CLK_3 used for top/bottom readout segmentation |
| EXTCLK | External reference clock input | 32.4 MHz single-ended CMOS input - drives on-chip PLL; requires stable jitter < 1 ps RMS |
| RESET_N | Asynchronous hard reset | Active-low signal - must be held low ≥30 EXTCLK cycles during power-up initialization |
| FWSI_EN | Serial interface mode select | High = SPI (4-wire); Low = I²C (2-wire); determines CS_N and SDATAOUT functionality |
| MONITOR_[0:2] | Sequencer state debug outputs | 3-bit status bus - indicates internal timing phases (e.g., integration, readout, idle) for FPGA sync debugging |
Key Features
| Feature | Design Value |
|---|---|
| On-chip 12-bit column ADCs | Enables parallel analog-to-digital conversion per column - eliminates column-wise fixed-pattern noise and supports >100 dB SNR headroom |
| Configurable HiSPi lane count | 24/12/6-lane modes - reduces FPGA I/O resource usage and PCB layer count while maintaining deterministic latency |
| Programmable ROI & context switching | Up to 8 independent ROIs and 3 register sets - allows dynamic region-of-interest streaming and multi-exposure HDR without host CPU intervention |
| Triggered integration/readout control | TRIG_INT and TRIG_RD inputs - enable precise synchronization to external motion sensors or PLC signals in automated inspection systems |
| 10-bit mode with companding | Boosts frame rate to 100 fps at full resolution - trades bit depth for throughput in bandwidth-constrained embedded vision pipelines |
Applications
| Machine Vision Inspection | Intelligent Transportation Systems |
|---|---|
Use Scenario: High-speed PCB solder joint inspection on conveyor lines moving at 2 m/s. IC Role / Device Role / Timing Role: Global shutter image sensor capturing distortion-free frames synchronized to encoder pulses. Use Value: 128 fps at 4096×2160 enables sub-millimeter defect detection with <10 µs exposure control and zero motion blur. |
Use Scenario: License plate recognition at toll booths under variable lighting and vehicle speeds up to 160 km/h. IC Role / Device Role / Timing Role: Monochrome imaging sensor with programmable ROI targeting license plate region only. Use Value: 68 dB dynamic range and <4 e⁻ read noise ensure legible character capture in glare, shadows, and nighttime IR illumination. |
| Medical Endoscopy | Scientific Imaging |
Use Scenario: Miniaturized surgical endoscope requiring low-power, high-resolution imaging in confined anatomical spaces. IC Role / Device Role / Timing Role: Compact 1/1.1-inch optical format sensor enabling 2.9 mm outer diameter scope design. Use Value: 1.2 V core supply and 1 W total power allow battery-powered operation with thermal management in sealed housing. |
Use Scenario: Time-resolved fluorescence microscopy requiring precise exposure timing and low dark current. IC Role / Device Role / Timing Role: Global shutter sensor with triggered integration control and sub-frame ROI readout. Use Value: Programmable integration time down to 1 µs and 1.9 e⁻ read noise (4× gain) enable photon-limited quantitative analysis. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar global shutter CMOS image sensor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NOIX1SN8000BLTI1 | Same resolution and optical format but 24-lane HiSPi only (no 12/6-lane mode); no microlens option specified | Fixed high-bandwidth interface - less flexible for cost-sensitive or FPGA-I/O-constrained designs | Select when maximum frame rate is required and lane scalability is unnecessary |
| NOIX2SN9400BLTI1 | 9.4 Mp (3072×3072), 1/1.2-inch format, 56 fps @ 12 lanes - higher vertical resolution but lower frame rate at same lane count | Better suited for square-format applications (e.g., semiconductor wafer inspection) where aspect ratio matters more than speed | Select when vertical FOV priority outweighs frame rate needs and 3072-row symmetry is critical |
Compared with NOIX1SN8000BLTI1, NOIX2SN8000B-LTI1 offers lane-count flexibility for system-level bandwidth optimization; compared with NOIX2SN9400BLTI1, it trades vertical resolution for higher frame rate and wider horizontal FOV-making it optimal for linear scanning and conveyor-based inspection.
Availability
NOIX2SN8000B-LTI1 is available at Aetrix Electronics and suitable for machine vision inspection, intelligent transportation systems, medical endoscopy, and scientific imaging requiring stable component supply across multi-year production programs.
Supply support for NOIX2SN8000B-LTI1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (Nasdaq: ON) is a global semiconductor supplier delivering energy-efficient silicon solutions for automotive, industrial, cloud, medical, and IoT applications.
The XGS family-including NOIX2SN8000B-LTI1-is designed specifically for high-performance industrial imaging, emphasizing global shutter fidelity, scalable bandwidth, and robust operation in harsh environments.
FAQ
What is the optical format and pixel size of the NOIX2SN8000B-LTI1?
The NOIX2SN8000B-LTI1 features a 1/1.1-inch optical format (14.8 mm diagonal) and 3.2 µm square pixels. This combination delivers high quantum efficiency and spatial resolution while fitting within compact 29 mm × 29 mm camera module footprints. The pixel size is fixed and not user-configurable.
Does the NOIX2SN8000B-LTI1 support both I²C and SPI serial interfaces?
Yes, the NOIX2SN8000B-LTI1 supports both interfaces via the FWSI_EN pin: when pulled high, it enables 4-wire SPI (with CS_N and SDATAOUT active); when pulled low, it defaults to 2-wire I²C (with CS_N tied to GND and SDATAOUT unused). Both interfaces configure registers and monitor status.
What is the maximum frame rate achievable with the NOIX2SN8000B-LTI1 at full resolution?
The NOIX2SN8000B-LTI1 achieves 128 fps at full 4096 × 2160 resolution and 12-bit depth using all 24 HiSPi lanes. At 12 lanes, frame rate drops to 80 fps; at 6 lanes, it falls to 40 fps. These values are measured under typical conditions with 32.4 MHz EXTCLK and default analog/digital gain settings.
How does the global shutter operation work in the NOIX2SN8000B-LTI1?
The NOIX2SN8000B-LTI1 uses true global shutter: all 4096 × 2160 pixels integrate light simultaneously, then read out sequentially via column-parallel ADCs. Integration and readout can overlap (pipelined mode), allowing next-frame integration to begin before current-frame readout completes-reducing dead time between frames.
What power supplies are required for the NOIX2SN8000B-LTI1 and what are their sequencing requirements?
The NOIX2SN8000B-LTI1 requires seven supplies: VDD_IO (2.8 V), VDD_PLL (2.8 V), VDD (1.2 V), VAA (2.8 V), VAA_PIX (3.0 V), VAA_PIX_BST (3.0 V), VAA_RD (3.0 V), and VDD_SLVS (1.2 V). Power-up must follow strict sequencing: VDD_IO → VDD_PLL → VDD → VAA → VAA_PIX/VAA_PIX_BST/VAA_RD → VDD_SLVS, with ≤100 µs delays between steps.
NOIX2SN8000B-LTI1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- -
- Package/Case:
- 163-BCLGA
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- CMOS
- Pixel Size:
- 3.2µm x 3.2µm
- Active Pixel Array:
- 4096H x 2160V
- Frames per Second:
- 128.0
- Voltage - Supply:
- 1.1V ~ 1.3V
- Supplier Device Package:
- 163-CLGA (20.88x19.9)
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
NOIX2SN8000B-LTI1 FAQ
1.How can I place an order for NOIX2SN8000B-LTI1 through Aetrix?
Please submit a Request for Quotation (RFQ) for NOIX2SN8000B-LTI1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NOIX2SN8000B-LTI1 reliable?
The price and inventory of NOIX2SN8000B-LTI1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NOIX2SN8000B-LTI1 is usually 5 days.
3.What payment methods are accepted for NOIX2SN8000B-LTI1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NOIX2SN8000B-LTI1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NOIX2SN8000B-LTI1?
NOIX2SN8000B-LTI1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NOIX2SN8000B-LTI1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NOIX2SN8000B-LTI1?
For technical support, including NOIX2SN8000B-LTI1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NOIX2SN8000B-LTI1 requirements.
6.How does Aetrix verify that NOIX2SN8000B-LTI1 is sourced from the original manufacturer or authorized distributors?
All NOIX2SN8000B-LTI1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NOIX2SN8000B-LTI1 meets industry standards.
7.What is the process for return or replacement of NOIX2SN8000B-LTI1?
All NOIX2SN8000B-LTI1 units undergo pre-shipment inspection (PSI). If there is an issue with NOIX2SN8000B-LTI1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NOIX2SN8000B-LTI1 part is unused and in its original packaging.
Return procedure for NOIX2SN8000B-LTI1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NOIX2SN8000B-LTI1 Tags

-
MT9M114EBLSTCZ-CR
onsemi

-
EPC611-CSP24-001
ESPROS Photonics AG

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AR0147ATSC00XUEG5-DRBR
onsemi

-
AR0130CSSM00SPCA0-DRBR
onsemi

-
AR1335CSSC11SMKA0-CP
onsemi
-
AR0521SR2M09SURA0-DP
onsemi
-
AR0135CS2M25SUEA0-DPBR
onsemi

-
AR0522SRSC09SURA0-DP
onsemi

-
AR0134CSSC00SPCA0-DPBR
onsemi

-
AR0134CSSM00SUEA0-DPBR
onsemi
-
AR0521SR2C09SURA0-DP
onsemi
-
AR0135CS2M00SUEA0-DPBR
onsemi
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