NXP Semiconductors NTS0101GM,115
- Part No.:
- NTS0101GM,115
- Manufacturer:
- NXP Semiconductors
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
NTS0101GM,115.pdf
- Description:
- IC TRANSLTR BIDIRECTIONAL 6XSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NTS0101GM,115 from NXP Semiconductors is a 1-bit dual-supply auto-direction-sensing voltage-level translating transceiver with open-drain I/O, supporting bidirectional translation between 1.65 V–3.6 V (VCC(A)) and 2.3 V–5.5 V (VCC(B)). It features active HIGH OE control, IOFF partial power-down protection, and operates across −40 °C to +125 °C. It is used in I²C/SMBus interconnects between mixed-voltage microcontrollers and peripherals.
For engineers reviewing the NTS0101GM,115 datasheet, NTS0101GM,115 pinout, NTS0101GM,115 application, or NTS0101GM,115 equivalent, key selection considerations include its auto-direction sensing capability, 50 Mbps push-pull data rate, IOFF-enabled safe power sequencing, ESD robustness (8 kV HBM on B port), and compatibility with 1.8 V/2.5 V/3.3 V/5.0 V node translation.
Technical Context
The NTS0101GM,115 implements a switch-type architecture using an N-channel pass-gate transistor (T3) biased ~1 VTH above the lower supply rail, enabling passive bidirectional conduction without direction-control pins. Its output edge-rate accelerator (one-shot circuit) detects input transitions at ~VCCI/2 and temporarily activates PMOS drivers (T1/T2) to bypass internal 10 kΩ pull-ups, reducing tTLH and tTHL.
It supports true open-drain operation with internal 10 kΩ pull-up resistors on both A and B ports referenced to their respective supplies. The IOFF circuit disables outputs when either VCC(A) or VCC(B) = 0 V, preventing backflow current during partial power-down - critical for hot-swap and battery-backed systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC(A) Range | 1.65 V to 3.6 V - enables interface with 1.8 V or 2.5 V logic domains while maintaining compatibility with 3.3 V controllers. |
| VCC(B) Range | 2.3 V to 5.5 V - supports translation to legacy 3.3 V, 5.0 V peripherals and industrial I/O without level-shifter ICs. |
| Max Data Rate | 50 Mbps - sufficient for high-speed I²C Fast-mode Plus (1 Mbps) and UART up to 25 Mbps with proper layout. |
| IOFF Leakage | <±12 µA at −40 °C to +125 °C - ensures negligible current flow during power-down, preserving battery life and system safety. |
| ESD Robustness | HBM 8 kV on B port, 2.5 kV on A port - meets IEC 61000-4-2 Level 4 for system-level surge immunity in industrial environments. |
| Operating Temp | −40 °C to +125 °C - qualified for under-hood automotive, motor control, and industrial PLC applications. |
| Propagation Delay | 2.4 ns to 7.3 ns (A↔B) - low-latency translation preserves timing margins in real-time sensor or actuator interfaces. |
Pinout & Package
XSON6 package (SOT886): plastic extremely thin small outline, no leads, 6-terminal body measuring 1.0 mm × 1.45 mm × 0.5 mm, moisture sensitivity level 1, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC(A) | Supply for A-side logic and I/O reference | Must be ≤ VCC(B); powers internal bias circuitry and defines VIH/VIL thresholds for A and OE pins. |
| GND | Common ground reference | Single shared ground plane required; no separate analog/digital GND pins. |
| A | Bidirectional I/O referenced to VCC(A) | Connects to 1.65–3.6 V domain; includes internal 10 kΩ pull-up to VCC(A). |
| B | Bidirectional I/O referenced to VCC(B) | Connects to 2.3–5.5 V domain; includes internal 10 kΩ pull-up to VCC(B); handles up to 5.5 V inputs. |
| OE | Output enable (active HIGH) | Referenced to VCC(A); LOW forces A/B into high-impedance state; requires pull-down for power-up safety. |
| VCC(B) | Supply for B-side logic and I/O reference | Defines VOH/VOL levels for B port; must be ≥ VCC(A) during normal operation per datasheet constraint. |
Key Features
| Feature | Design Value |
|---|---|
| Auto-direction sensing | Eliminates need for external direction-control signals or GPIOs, reducing PCB routing complexity and firmware overhead in bidirectional buses like I²C. |
| IOFF partial power-down | Prevents damaging back-current when one supply is off - essential for modular systems with independent power domains or hot-plug modules. |
| Integrated 10 kΩ pull-ups | Reduces external component count on both sides; pull-ups are disabled when OE = LOW, avoiding contention during disable. |
| Edge-rate acceleration | One-shot circuit cuts tTLH by up to 40% vs. passive resistor-based translators, enabling reliable 50 Mbps operation without external active drivers. |
| Wide VCC(A)/VCC(B) independence | Supports asymmetric supply combinations (e.g., 1.8 V ↔ 5.0 V) without external voltage dividers or additional regulators. |
Applications
| I²C Bus Translation | UART Voltage Interface |
|---|---|
Use Scenario: Interfacing a 1.8 V microcontroller I²C master with a 3.3 V EEPROM slave in an industrial sensor node. IC Role / Device Role / Timing Role: Bidirectional open-drain translator enabling clock/data line level shifting while preserving I²C timing requirements and bus arbitration. Use Value: Eliminates need for discrete MOSFET translators or dual-supply buffers; maintains Fast-mode Plus (1 Mbps) compliance with <2.5 ns propagation delay. |
Use Scenario: Connecting a 2.5 V SoC UART TX/RX to a 5.0 V RS-232 transceiver in a medical diagnostic device. IC Role / Device Role / Timing Role: Asymmetric voltage translator handling unidirectional or bidirectional UART signals with automatic direction detection on shared lines. Use Value: Supports 50 Mbps data rate margin - well above typical UART speeds (≤3 Mbps) - ensuring signal integrity over long traces or noisy environments. |
| GPIO Expansion Interface | Hot-Swappable Module Communication |
Use Scenario: Extending GPIOs from a 3.3 V host MCU to control 5.0 V relays and optocouplers in a programmable logic controller. IC Role / Device Role / Timing Role: General-purpose bidirectional level shifter for control/status lines, leveraging OE pin for software-controlled isolation. Use Value: Internal 10 kΩ pull-ups simplify design; IOFF prevents backfeed when module is removed while host remains powered. |
Use Scenario: Enabling communication between a mainboard (3.3 V) and hot-pluggable daughter card (5.0 V) in telecom base station equipment. IC Role / Device Role / Timing Role: Safe voltage translator with power-fail immunity - automatically enters high-Z state if either supply drops, preventing bus contention. Use Value: Meets −40 °C to +125 °C operating range and 8 kV HBM on B port, satisfying NEBS GR-63-CORE shock/vibration and ESD requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar voltage translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXS0101DCUR | Single-channel auto-direction translator with 1.65–5.5 V VCCA and 1.65–5.5 V VCCB; no IOFF; max 60 Mbps; 6-pin X2SON package (1.0 × 1.0 × 0.5 mm). | Lacks IOFF circuitry - unsuitable for partial power-down scenarios where back-current must be blocked. | Select NTS0101GM,115 when IOFF and guaranteed safe power sequencing are required; choose TXS0101DCUR only for cost-sensitive, full-power designs. |
| SN74AVC1T45DBVR | Direction-controlled (DIR pin required), push-pull outputs, 1.2–3.6 V I/O range, 500 Mbps data rate, SOT-23-6 package. | Requires external direction control logic and pull-up resistors; not compatible with open-drain buses like I²C without additional components. | Choose SN74AVC1T45DBVR for high-speed unidirectional or direction-managed interfaces; NTS0101GM,115 remains preferred for I²C/SMBus and auto-direction use cases. |
Compared with TXS0101DCUR and SN74AVC1T45DBVR, the NTS0101GM,115 uniquely combines auto-direction sensing, IOFF protection, and open-drain compatibility - making it the only option among the three qualified for robust, standards-compliant I²C translation across wide voltage nodes and temperature extremes.
Availability
NTS0101GM,115 is available at Aetrix Electronics and suitable for industrial automation, automotive body electronics, and medical diagnostics requiring stable component supply, extended temperature operation, and certified ESD resilience.
Supply support for NTS0101GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The NTS0101GM,115 belongs to NXP's voltage translation portfolio, designed specifically for robust, low-power, mixed-voltage interconnect in space-constrained and thermally demanding environments.
FAQ
What is the maximum allowable voltage difference between VCC(A) and VCC(B) for reliable operation of the NTS0101GM,115?
The NTS0101GM,115 requires VCC(A) ≤ VCC(B) during normal operation per datasheet Section 10, Table 6 footnote [2]. While VCC(A) may transiently exceed VCC(B) during power-up without damage, sustained operation outside this constraint risks incorrect biasing of the pass-gate transistor and unreliable translation. For example, 3.3 V on VCC(A) and 2.5 V on VCC(B) violates specification and must be avoided.
Does the NTS0101GM,115 support I²C Fast-mode Plus (1 Mbps) timing requirements?
Yes, the NTS0101GM,115 supports I²C Fast-mode Plus. With propagation delays as low as 2.4 ns (A→B, VCC(A)=3.3 V, VCC(B)=3.3 V) and rise/fall times under 10 ns, it preserves timing margins even with standard 10 kΩ pull-ups. Its auto-direction sensing and open-drain compatibility ensure full protocol compliance without external direction logic or bus arbitration interference.
Can the NTS0101GM,115 be used with push-pull drivers, or is it limited to open-drain applications?
The NTS0101GM,115 is optimized for open-drain interfaces like I²C and SMBus but can interface with push-pull drivers. However, Section 14.1 notes that the NTB0101 may be more suitable for pure push-pull use due to different internal architecture. When using push-pull sources, ensure driver output impedance stays below 50 Ω to meet specified tPHL/tPLH and data rate limits.
How does the IOFF feature of the NTS0101GM,115 protect the system during partial power-down?
The IOFF circuit in the NTS0101GM,115 disables all outputs when either VCC(A) or VCC(B) falls to GND, limiting leakage current to ±12 µA across −40 °C to +125 °C. This prevents backflow current from an active supply domain into a powered-down domain - protecting downstream ICs, preserving battery charge, and meeting IEC 62368-1 safety requirements for fault conditions.
What are the thermal limitations of the NTS0101GM,115 in its XSON6 (SOT886) package?
In the XSON6 (SOT886) package, the NTS0101GM,115 has a total power dissipation limit of 250 mW at Tamb ≤ 118 °C. Above 118 °C, Ptot derates linearly at 7.8 mW/K. At maximum ambient temperature (+125 °C), usable power is reduced to ~244 mW. Layout must ensure adequate copper area and thermal vias beneath the exposed pad (if present) to maintain junction temperature within −40 °C to +150 °C limits.
NTS0101GM,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 1
- Voltage - VCCA:
- 1.65 V ~ 3.6 V
- Voltage - VCCB:
- 2.3 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Tri-State
- Data Rate:
- 50Mbps
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Auto-Direction Sensing
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XFDFN
NTS0101GM,115 FAQ
1.How can I place an order for NTS0101GM,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for NTS0101GM,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NTS0101GM,115 reliable?
The price and inventory of NTS0101GM,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NTS0101GM,115 is usually 5 days.
3.What payment methods are accepted for NTS0101GM,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NTS0101GM,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NTS0101GM,115?
NTS0101GM,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NTS0101GM,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NTS0101GM,115?
For technical support, including NTS0101GM,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NTS0101GM,115 requirements.
6.How does Aetrix verify that NTS0101GM,115 is sourced from the original manufacturer or authorized distributors?
All NTS0101GM,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NTS0101GM,115 meets industry standards.
7.What is the process for return or replacement of NTS0101GM,115?
All NTS0101GM,115 units undergo pre-shipment inspection (PSI). If there is an issue with NTS0101GM,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NTS0101GM,115 part is unused and in its original packaging.
Return procedure for NTS0101GM,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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