NXP Semiconductors NTS0101GW,125
- Part No.:
- NTS0101GW,125
- Manufacturer:
- NXP Semiconductors
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
NTS0101GW,125.pdf
- Description:
- IC TRANSLTR BIDIRECTIONAL 6TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NTS0101GW,125 from NXP Semiconductors is a 1-bit dual-supply auto-direction-sensing voltage-level translating transceiver in SC-88 (SOT363) package, supporting bidirectional translation between 1.65 V–3.6 V (VCC(A)) and 2.3 V–5.5 V (VCC(B)), with 50 Mbps push-pull data rate, IOFF partial power-down protection, and −40 °C to +125 °C operation. It enables I²C/SMBus interconnection between mixed-voltage microcontrollers and peripherals.
For engineers reviewing the NTS0101GW,125 datasheet, NTS0101GW,125 pinout, NTS0101GW,125 application, or NTS0101GW,125 equivalent, key selection factors include its open-drain-compatible auto-direction architecture, guaranteed 50 Mbps performance across full temperature range, IOFF-enabled safe power sequencing, and dual-rail ESD robustness (8 kV HBM on B port).
Technical Context
The NTS0101GW,125 implements a switch-type voltage translator using an N-channel pass-gate transistor (T3) biased ~1 VTH above the lower supply rail, enabling passive bidirectional conduction without external direction control. Its output edge-rate accelerator employs one-shot triggered PMOS drivers (T1/T2) to bypass internal 10 kΩ pull-ups during rising edges, reducing tTLH to ≤7.6 ns (B port, 5 V) while maintaining <50 Ω effective drive impedance during acceleration.
Direction sensing is fully autonomous: signal flow (A→B or B→A) is determined by relative voltage transitions at either port, with no clock or control overhead. The device enters high-impedance OFF-state when OE is LOW, and supports partial power-down via IOFF circuitry that disables outputs and blocks backflow current when either VCC(A) or VCC(B) = 0 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC(A) Range | 1.65 V to 3.6 V - powers A-port logic and OE input; sets VIH/VIL thresholds for A/OE pins |
| VCC(B) Range | 2.3 V to 5.5 V - powers B-port logic; must be ≥ VCC(A); defines VOH min (0.67×VCC(B)) |
| Data Rate | 50 Mbps - maximum guaranteed push-pull throughput across −40 °C to +125 °C |
| Propagation Delay | A↔B: 2.4–7.3 ns - worst-case tPHL/tPLH at VCC(A)=3.3 V / VCC(B)=5.0 V / +125 °C |
| ESD Robustness | B port: 8 kV HBM (JESD22-A114E Class 3B); A port: 2.5 kV HBM - enables direct interface to noisy system buses |
| IOFF Leakage | ±12 µA max (−40 °C to +125 °C) - prevents damaging back-current when either supply is off |
| Operating Temp | −40 °C to +125 °C - qualified for automotive under-hood and industrial motor-control environments |
Pinout & Package
NTS0101GW,125 uses SC-88 (SOT363) package: 6-pin plastic surface-mount, 2.1 mm × 1.25 mm × 1.1 mm body, gull-wing leads, pin 1 indicator at lower-left corner below marking code "s1".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC(A) | Supply for A-side logic | Reference for A port and OE input; must be ≤ VCC(B); powers internal 10 kΩ pull-up to A |
| GND | Common ground reference | 0 V return path for both supplies; required for proper IOFF and ESD clamp operation |
| A | Bidirectional I/O (A side) | Open-drain compatible; referenced to VCC(A); includes internal 10 kΩ pull-up to VCC(A) |
| B | Bidirectional I/O (B side) | Open-drain compatible; referenced to VCC(B); includes internal 10 kΩ pull-up to VCC(B) |
| OE | Output enable (active HIGH) | Referenced to VCC(A); LOW forces A/B into high-Z; requires pull-down for safe power-up |
| VCC(B) | Supply for B-side logic | Reference for B port; defines VOH/VOL limits; must be ≥ VCC(A) for reliable translation |
Key Features
| Feature | Design Value |
|---|---|
| Auto-direction sensing | Eliminates external direction-control signals and timing constraints; enables true plug-and-play level translation |
| Edge-rate acceleration | Reduces B-port tTLH to 1.8 ns (min) at 5 V, enabling clean 50 Mbps rise/fall without external active drivers |
| IOFF partial power-down | Blocks >99% of backflow current when either VCC is off, protecting powered subsystems during hot-swap or brownout |
| Dual-rail ESD protection | 8 kV HBM on B port (I²C bus side) and 2.5 kV on A port (MCU side) meets IEC 61000-4-2 Level 4 system requirements |
| Integrated pull-up resistors | 10 kΩ internal pull-ups on both A and B ports eliminate external components for standard I²C/SMBus termination |
Applications
| I²C Bus Translation | UART Voltage Interface |
|---|---|
Use Scenario: Interfacing a 1.8 V microcontroller I²C master to a 3.3 V sensor slave in an automotive cabin controller. IC Role / Device Role / Timing Role: Bidirectional open-drain translator with auto-direction detection and integrated 10 kΩ pull-ups on both sides. Use Value: Eliminates external direction logic and discrete pull-ups; maintains I²C timing compliance up to 400 kHz with <7.3 ns propagation delay. |
Use Scenario: Connecting a 2.5 V UART peripheral to a 5.0 V host processor in an industrial PLC module. IC Role / Device Role / Timing Role: Asymmetric voltage translator enabling full-duplex UART signaling without handshake inversion or level-shifter sequencing. Use Value: Supports 50 Mbps data rate margin over standard UART baud rates; IOFF prevents bus contention during processor reset. |
| GPIO Voltage Bridging | System Management Bus (SMBus) |
Use Scenario: Isolating GPIO lines between a 3.3 V FPGA bank and 5.0 V power-management IC in a server motherboard. IC Role / Device Role / Timing Role: Single-bit bidirectional translator with independent supply domains and OE-controlled isolation. Use Value: Enables safe hot-plug of 5 V PMIC without risking FPGA I/O damage; OE allows software-controlled GPIO disable during configuration. |
Use Scenario: Translating SMBus alerts and status signals between a 1.8 V baseband processor and 3.3 V battery gauge IC in a mobile device. IC Role / Device Role / Timing Role: Open-drain SMBus-compliant translator with guaranteed 100 kHz timing margins and 8 kV B-port ESD protection. Use Value: Meets SMBus 3.0 electrical specs without external clamps; internal pull-ups ensure bus idle state integrity across voltage domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-supply translating transceiver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXS0101DCUR | TI part; same 1-bit, dual-supply, auto-direction architecture; VCC(A): 1.2–3.6 V, VCC(B): 1.65–5.5 V; 6-pin X2SON package (1.0 × 1.0 × 0.5 mm) | Wider VCC(A) range enables 1.2 V MCU interfacing; smaller footprint but no SC-88 compatibility | Select TXS0101DCUR for space-constrained designs requiring 1.2 V support; verify PCB layout change for X2SON vs SOT363 |
| PCA9306DCUR | NXP part; 2-bit, dual-supply translator; VCC(A): 1.2–3.6 V, VCC(B): 1.8–5.5 V; includes automatic direction control but no edge acceleration | Supports two channels per package; lacks one-shot driver → slower tTLH (typ. 15 ns at 5 V); rated for 400 kHz I²C only | Select PCA9306DCUR when multi-bit translation is needed and 50 Mbps is not required; retains NXP ecosystem compatibility |
Compared with TXS0101DCUR and PCA9306DCUR, the NTS0101GW,125 delivers superior high-speed performance (50 Mbps vs 400 kHz) and faster edge response due to its one-shot accelerator, while offering proven robustness in automotive-grade thermal and ESD conditions.
Availability
NTS0101GW,125 is available at Aetrix Electronics and suitable for automotive infotainment, industrial PLC I/O modules, and server power management systems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for NTS0101GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with core expertise in mixed-signal IC design and automotive qualification.
The NTS0101GW,125 belongs to NXP's voltage translation product line, engineered specifically for robust, low-latency bidirectional level shifting in harsh-environment systems where supply sequencing, ESD immunity, and thermal stability are critical.
FAQ
What is the maximum allowable voltage difference between VCC(A) and VCC(B) for reliable operation of the NTS0101GW,125?
The NTS0101GW,125 requires VCC(A) ≤ VCC(B) at all times during active operation. While VCC(A) may temporarily exceed VCC(B) during power-up without damage, sustained violation causes undefined translation behavior and potential latch-up. The absolute maximum ratings allow both supplies up to +6.5 V, but functional operation mandates VCC(B) ≥ VCC(A) - e.g., 1.8 V/3.3 V or 2.5 V/5.0 V pairs are valid; 3.3 V/2.5 V is not.
Does the NTS0101GW,125 support push-pull drivers on both A and B ports, or is it limited to open-drain configurations?
The NTS0101GW,125 supports both open-drain and push-pull drivers on A and B ports. Its architecture relies on detecting voltage transitions to determine direction, making it compatible with either topology. However, for push-pull use, NXP recommends the NTB0101 variant - the NTS0101GW,125 remains fully functional with push-pull sources but achieves optimal timing and noise immunity with open-drain drivers typical of I²C/SMBus.
How does the IOFF feature of the NTS0101GW,125 protect downstream circuitry during partial power-down?
The IOFF circuitry in the NTS0101GW,125 actively disables the output stage and isolates the A and B ports when either VCC(A) or VCC(B) drops to GND. This prevents reverse current flow - for example, if VCC(B) remains active while VCC(A) is off, IOFF blocks current from B port into the unpowered A-side logic, limiting leakage to ±12 µA max and avoiding unintended MCU wake-up or latch-up in the powered domain.
Can the NTS0101GW,125 be used without external pull-up resistors in I²C applications?
Yes - the NTS0101GW,125 integrates 10 kΩ pull-up resistors to VCC(A) on the A port and to VCC(B) on the B port. These satisfy standard-mode (100 kHz) and fast-mode (400 kHz) I²C bus requirements when used with typical bus capacitance (<400 pF). For high-speed mode (3.4 MHz) or heavy capacitive loads, external lower-value pull-ups may be added in parallel to reduce rise time, but are not required for baseline operation.
What is the significance of the "125" suffix in the NTS0101GW,125 part number?
The "125" suffix in NTS0101GW,125 denotes the extended temperature grade: −40 °C to +125 °C. This qualifies the device for under-hood automotive, industrial motor drives, and other high-ambient-temperature applications. It is distinct from the commercial-grade NTS0101GW (−40 °C to +85 °C) and reflects additional screening, characterization, and reliability validation across the full extended range.
NTS0101GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 1
- Voltage - VCCA:
- 1.65 V ~ 3.6 V
- Voltage - VCCB:
- 2.3 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain, Tri-State
- Data Rate:
- 50Mbps
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- Auto-Direction Sensing
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP, SC-88, SOT-363
NTS0101GW,125 FAQ
1.How can I place an order for NTS0101GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for NTS0101GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NTS0101GW,125 reliable?
The price and inventory of NTS0101GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NTS0101GW,125 is usually 5 days.
3.What payment methods are accepted for NTS0101GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NTS0101GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NTS0101GW,125?
NTS0101GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NTS0101GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NTS0101GW,125?
For technical support, including NTS0101GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NTS0101GW,125 requirements.
6.How does Aetrix verify that NTS0101GW,125 is sourced from the original manufacturer or authorized distributors?
All NTS0101GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NTS0101GW,125 meets industry standards.
7.What is the process for return or replacement of NTS0101GW,125?
All NTS0101GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with NTS0101GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NTS0101GW,125 part is unused and in its original packaging.
Return procedure for NTS0101GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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