NXP Semiconductors NX30P6093AUKAZ
- Part No.:
- NX30P6093AUKAZ
- Manufacturer:
- NXP Semiconductors
- Package:
- 20-UFBGA, WLCSP
- Datasheet:
-
NX30P6093AUKAZ.pdf
- Description:
- HIGH-VOLTAGE I2C CONTROLLED OVER
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NX30P6093AUKAZ from NXP Semiconductors is a high-voltage, I²C-controlled overvoltage protection (OVP) load switch designed for USB Type-C and Power Delivery systems. It delivers 5.6 A continuous current in OVP mode, features 16 mΩ typical RON, supports 1.5 A USB OTG operation, and integrates VIN impedance detection for moisture/short-circuit monitoring in portable devices.
For engineers reviewing the NX30P6093AUKAZ datasheet, NX30P6093AUKAZ pinout, NX30P6093AUKAZ application, or NX30P6093AUKAZ equivalent, key selection criteria include adjustable OVLO (4 V–23 V), I²C-configurable slew rate (0.42–5.6 ms), -40 °C to +85 °C operation, WLCSP20 package, and integrated fault reporting via INT pin.
Technical Context
The NX30P6093AUKAZ implements an N-channel MOSFET power switch with programmable overvoltage lockout (OVLO) settable via external resistor divider on ADJ or I²C registers (0x05h, 0x0Eh), including ±800 mV fine-tuning. It combines three core functions: OVP isolation, VIN impedance detection using a programmable 0–10 mA current source, and bidirectional USB OTG support when VOUT is powered at 5 V.
Protection logic includes undervoltage lockout (VUVLO), overtemperature shutdown (140 °C trip, 115 °C release), short-circuit cutoff (10.5 A typ.), and robust surge/ESD resilience (IEC61000-4-5 ±100 V, IEC61000-4-2 ±15 kV air). All fault flags (OV_FLG, OC_FLG, OT_FLG) are latched and reported via INT pin and register 0x03h.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Operating Range | 2.8 V to 20.0 V - Enables direct integration into USB PD input rails up to 20 V without external regulation. |
| Continuous Switch Current (OVP) | 5.6 A - Sustains full-load charging paths for tablets and notebooks with minimal thermal derating at +85 °C ambient. |
| RON (typ.) | 16 mΩ - Limits conduction loss to <100 mW at 2.5 A, reducing self-heating and improving efficiency. |
| OVLO Threshold Range | 4 V to 23 V - Configurable via ADJ pin resistor divider or I²C (register 0x05h/0x0Eh) to match diverse USB PD voltage profiles. |
| I²C Interface Speed | Up to 1000 kbit/s (Fast-mode Plus) - Supports real-time configuration and status polling without bus contention in high-speed host systems. |
| Temperature Range | -40 °C to +85 °C - Qualified for consumer mobile applications including smartphones, tablets, and ultrabooks. |
| VIN Surge Tolerance | ±100 V (IEC61000-4-5) - Eliminates need for external TVS diodes in USB-C port ESD/surge protection schemes. |
Pinout & Package
Package: WLCSP20 - 20-bump wafer-level chip-scale package, 1.7 mm × 2.16 mm, 0.4 mm pitch, 0.525 mm body height with backside coating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (B3, B4, B5, C3, C4, C5) | Power Input | High-side input node; must be shorted together on PCB; rated to 29 V absolute max and ±100 V surge. |
| VOUT (A3, A4, A5, D3, D4, D5) | Power Output / OTG Input | Bidirectional node: supplies load in OVP mode; accepts 5 V source in USB OTG mode (max 1.5 A). |
| GND (B2, C2) | Ground Reference | Dual ground pins for low-impedance return path; critical for surge current discharge and thermal stability. |
| EN (A1) | Enable Control | Active-low enable with internal 1 MΩ pull-down; ensures fail-safe conduction during dead-battery conditions. |
| INT (B1) | Interrupt Output | Open-drain output signaling OV/OC/OT faults; requires external pull-up; asserts low on flag latch. |
| VDD (C1) | System Supply | 3.0–4.5 V bias rail for internal logic; independent of VIN, enabling control during low-input conditions. |
| SDA (D2) | I²C Data | Bi-directional I²C data line; supports Standard/Fast/Fast-mode Plus; no clock stretching or general call. |
| SCL (D1) | I²C Clock | Input-only I²C clock; synchronizes register reads/writes and status updates. |
| ADJ (A2) | OVLO Adjustment | Analog input for external resistor divider; sets initial OVLO threshold; grounded for default 6.8 V setting. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable OVLO with dual adjustment | Set via ADJ pin resistor (4–23 V) or I²C registers (0x05h/0x0Eh) with ±800 mV fine-tune - enables precise matching to USB PD voltage negotiation. |
| VIN impedance detection | Configurable 0–10 mA current source (register 0x06h) with 200 μs–10 s pulse width (0x07h) - detects moisture or short circuits before system damage occurs. |
| USB OTG support | 1.5 A bidirectional current capability when VOUT is supplied with 5 V and EN/VOUT_EN = LOW - enables accessory power delivery without external switches. |
| Integrated slew rate control | 7-step I²C-adjustable turn-on time (0.42–5.6 ms via register 0x0Fh) - eliminates inrush-induced voltage droop and reduces EMI in compact layouts. |
| Comprehensive fault reporting | Three latched flags (OV/OC/OT) in register 0x03h plus interrupt pin (INT) - allows host processor to diagnose root cause without polling overhead. |
Applications
| Smartphones | Tablets & eReaders |
|---|---|
Use Scenario: Protecting USB-C port power path against overvoltage events during hot-plug or adapter mismatch in slim-profile handsets. IC Role / Device Role / Timing Role: High-side OVP load switch isolating VBUS from system PMIC; responds within microseconds to OVLO threshold breach. Use Value: Prevents catastrophic failure of baseband SoC and battery charger ICs by disconnecting at 6.8 V (default) or user-defined thresholds. |
Use Scenario: Managing power routing between USB-C PD input and internal battery during simultaneous charge-and-use operation. IC Role / Device Role / Timing Role: Bidirectional load switch enabling OTG mode (VOUT→VIN) and OVP mode (VIN→VOUT); controlled via I²C for dynamic reconfiguration. Use Value: Delivers 1.5 A OTG power while maintaining 5.6 A charging capability - eliminates need for separate OTG switch ICs. |
| Notebooks | USB-C Docking Stations |
Use Scenario: Securing main system rail against transient overvoltage from multi-port USB-C chargers or faulty cables. IC Role / Device Role / Timing Role: Primary OVP guard on 20 V PD input rail; monitors VIN continuously and triggers INT on fault. Use Value: Withstands ±100 V IEC61000-4-5 surges and reports faults via I²C - reduces BOM count and improves field reliability. |
Use Scenario: Enabling intelligent port power management across multiple downstream USB-C ports with shared upstream PD input. IC Role / Device Role / Timing Role: Per-port OVP and impedance monitor; each NX30P6093AUKAZ independently configurable via unique I²C address (0x6C). Use Value: Detects moisture ingress or shorted pins before connection - prevents dock-wide shutdown and enhances user safety. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar OVP load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TPS259472L | Fixed 6.1 V OVLO; no ADJ pin; 4.5 A max current; no VIN impedance detection. | Lacks moisture sensing and fine-grained OVLO tuning; suitable only for fixed-threshold USB-C protection. | Select when simplicity and cost outweigh programmability and diagnostic features. |
| ON Semi FPF2195 | 5.5 V fixed OVLO; 5 A rating; no I²C interface; no OTG mode or impedance detection. | Pin-compatible but functionally limited - provides basic OVP only, no firmware-configurable behavior. | Choose for legacy designs requiring drop-in replacement without firmware changes. |
Compared with TPS259472L and FPF2195, the NX30P6093AUKAZ uniquely combines I²C-programmable OVLO, VIN impedance detection, and USB OTG support in a single WLCSP20 device - enabling adaptive protection and diagnostics unattainable with fixed-function alternatives.
Availability
NX30P6093AUKAZ is available at Aetrix Electronics and suitable for smartphone, tablet, and notebook applications requiring stable component supply, high-reliability USB-C port protection, and programmable fault response.
Supply support for NX30P6093AUKAZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company specializing in secure connectivity solutions for automotive, industrial, and consumer electronics.
The NX30P6093AUKAZ belongs to NXP's USB Power Delivery Protection portfolio, engineered specifically to safeguard next-generation USB-C interfaces against overvoltage, overtemperature, short circuits, and moisture ingress in space-constrained mobile platforms.
FAQ
What is the default overvoltage protection threshold for the NX30P6093AUKAZ?
The NX30P6093AUKAZ has a default overvoltage protection (OVLO) threshold of 6.8 V when the ADJ pin is grounded or left floating. This value is stored in register 0x05h (OV[1:0] = 00) and serves as the factory-set trip point unless modified via external resistor divider or I²C write. The device supports adjustment from 4 V to 23 V using either method.
How does the NX30P6093AUKAZ support USB On-The-Go (OTG) functionality?
The NX30P6093AUKAZ supports USB OTG when a 5 V source is applied to the VOUT pin and both the EN pin and VOUT_EN bit (register 0x01h) are set LOW. In this mode, it delivers up to 1.5 A bidirectionally. If EN or VOUT_EN is HIGH, conduction occurs through the body diode - causing excessive heating and disabling overtemperature shutdown, so proper configuration is mandatory for safe OTG operation.
Can the NX30P6093AUKAZ detect moisture or short circuits on the USB-C port?
Yes, the NX30P6093AUKAZ implements VIN impedance detection using a programmable current source (0–10 mA, register 0x06h) to measure ZIN = VIN/ISOURCE. When the measured voltage falls below a user-defined tag voltage (TVIN, register 0x09h), the OVER_TAG_STS flag asserts and triggers an interrupt. This feature activates only when EN = LOW and VIN < VUVLO, providing early warning of moisture or shorts before system damage.
What is the purpose of the ADJ pin on the NX30P6093AUKAZ?
The ADJ pin on the NX30P6093AUKAZ sets the initial overvoltage lockout (OVLO) threshold at power-up via an external resistor divider. When connected, it allows analog adjustment from 4 V to 23 V per the datasheet equation. If ADJ is grounded or floating, the device defaults to 6.8 V OVLO. After startup, the threshold can be overridden or fine-tuned via I²C registers (0x05h, 0x0Eh, and RNG bits), making ADJ optional for fully software-configured systems.
Does the NX30P6093AUKAZ require external components for basic operation?
Yes - the NX30P6093AUKAZ requires external 4.7 kΩ pull-up resistors on SCL and SDA lines for I²C communication, input/output capacitors (≥1 μF each) near VIN/VOUT pins for stability, and optionally an ADJ pin resistor divider for non-default OVLO. The EN pin may be tied directly to GND for always-on operation, leveraging its internal 1 MΩ pull-down. No external TVS is needed due to built-in ±100 V surge tolerance.
NX30P6093AUKAZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 20-UFBGA, WLCSP
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- USB Switch
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- -
- Output Type:
- P-Channel
- Interface:
- I2C
- Voltage - Load:
- 2.8V ~ 20V
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 4.5V
- Current - Output (Max):
- 5.6A
- Rds On (Typ):
- 16mOhm
- Input Type:
- Non-Inverting
- Features:
- Slew Rate Controlled
- Fault Protection:
- Over Temperature, Over Voltage, UVLO
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-WLCSP (2.16x1.7)
NX30P6093AUKAZ FAQ
1.How can I place an order for NX30P6093AUKAZ through Aetrix?
Please submit a Request for Quotation (RFQ) for NX30P6093AUKAZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NX30P6093AUKAZ reliable?
The price and inventory of NX30P6093AUKAZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NX30P6093AUKAZ is usually 5 days.
3.What payment methods are accepted for NX30P6093AUKAZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NX30P6093AUKAZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NX30P6093AUKAZ?
NX30P6093AUKAZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NX30P6093AUKAZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NX30P6093AUKAZ?
For technical support, including NX30P6093AUKAZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NX30P6093AUKAZ requirements.
6.How does Aetrix verify that NX30P6093AUKAZ is sourced from the original manufacturer or authorized distributors?
All NX30P6093AUKAZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NX30P6093AUKAZ meets industry standards.
7.What is the process for return or replacement of NX30P6093AUKAZ?
All NX30P6093AUKAZ units undergo pre-shipment inspection (PSI). If there is an issue with NX30P6093AUKAZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NX30P6093AUKAZ part is unused and in its original packaging.
Return procedure for NX30P6093AUKAZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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