NXP Semiconductors NX30P6093UKAZ
- Part No.:
- NX30P6093UKAZ
- Manufacturer:
- NXP Semiconductors
- Package:
- 20-UFBGA, WLCSP
- Datasheet:
-
NX30P6093UKAZ.pdf
- Description:
- IC PWR SWITCH P-CHAN 1:1 20WLCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NX30P6093UKAZ from NXP Semiconductors is an I²C-controlled 8 A overvoltage protection load switch for USB Type-C and Power Delivery systems. It integrates programmable OVLO (adjustable from 4 V to 23 V), VIN impedance detection, undervoltage/overtemperature/short-circuit protection, and soft-start slew-rate control. It operates from 2.8 V to 20.0 V input and delivers ultra-low 8.95 mΩ ON-resistance in a compact WLCSP20 package - deployed in portable power path protection for smartphones and notebooks.
For engineers reviewing the NX30P6093UKAZ datasheet, NX30P6093UKAZ pinout, NX30P6093UKAZ application, or NX30P6093UKAZ equivalent, key selection criteria include its dual-mode OVLO adjustment (external resistor + I²C register 0x05h), VIN pin impedance detection capability (via ISRC current source and ADC register 0x08h), 22.5 ms enable debounce, and ±100 V IEC61000-4-5 surge tolerance on VIN.
Technical Context
The NX30P6093UKAZ implements an integrated N-channel MOSFET power switch with charge-pump driver and I²C slave interface (address 0x6C write / 0x6D read) supporting Standard-, Fast-, and Fast-mode Plus (2 Mbit/s) speeds. Its protection logic autonomously disables the switch upon OVLO (>6.8 V default), UVLO (<2.8 V), OTP (>140 °C), or short-circuit (>12 A), latching fault flags (OV_FLG, OT_FLG, OC_FLG) in register 0x03h and asserting INT pin low.
VIN impedance detection operates only when VIN < VUVLO and EN = LOW, using programmable current sources (0–10 mA via register 0x06h) and configurable timing (tDET up to 10 s, tDUTY up to 300 s via registers 0x07h). Detection results are stored in 8-bit ADC register 0x08h, with comparison against user-defined tag voltage (register 0x09h) triggering OVER_TAG_STS.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.8 V to 20.0 V - supports full USB PD 3.0 voltage range and legacy 5 V/9 V/15 V/20 V profiles. |
| Continuous Current | 8 A - enables high-power charging paths without external heatsinking in portable devices. |
| ON Resistance | 8.95 mΩ (typ) - minimizes conduction loss and thermal rise at 8 A (ΔV ≈ 71.6 mV). |
| OVLO Threshold | Adjustable 4 V–23 V - set by ADJ pin resistor divider or I²C register 0x05h (6.8 V/11.5 V/17 V/23 V base + ±800 mV fine-tune). |
| Slew Rate Control | Configurable 0.85–11 ms turn-on - prevents inrush current damage to capacitive loads via register 0x0F SRT[2:0]. |
| Surge Tolerance | ±100 V IEC61000-4-5 on VIN - eliminates need for external TVS diodes in USB-C port designs. |
| Operating Temp | −40 °C to +85 °C - qualified for consumer and industrial portable electronics environments. |
Pinout & Package
Package: WLCSP20 (1.7 mm × 2.16 mm, 0.4 mm pitch, 20-bump wafer-level chip-scale package with backside coating).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (B3,B4,B5,C3,C4,C5) | Power Input | High-voltage input node; must be shorted together on PCB; rated to 29 V and ±100 V surge. |
| VOUT (A3,A4,A5,D3,D4,D5) | Power Output | Switched output to downstream load; shares same current path as VIN through internal MOSFET. |
| GND (B2,C2) | Ground Reference | Dual ground pins for low-impedance return path and robust surge discharge current handling. |
| EN (A1) | Enable Input | Active-low enable with 1 MΩ internal pull-down; ensures fail-safe conduction during dead-battery conditions. |
| INT (B1) | Interrupt Output | Open-drain active-low flag signaling OVLO, OTP, or OC events per register 0x03h status bits. |
| VDD (C1) | System Supply | 3.0–4.5 V bias rail for internal logic; independent of VIN, enabling operation during low-VIN detection mode. |
| SDA (D2) | I²C Data I/O | Bi-directional serial data line; requires external pull-up to VDD; supports 2 Mbit/s Fast-mode Plus. |
| SCL (D1) | I²C Clock Input | Serial clock input; requires external pull-up to VDD; no clock stretching supported. |
| ADJ (A2) | OVLO Adjustment | Analog input for external resistor divider; floating or grounded selects internal OVLO default (6.8 V). |
Key Features
| Feature | Design Value |
|---|---|
| VIN Impedance Detection | Programmable current source (0–10 mA) and ADC-based monitoring to identify shorted or misconnected USB-C power pins before enabling VOUT. |
| Dual-Mode OVLO Configuration | Hardware (ADJ pin resistor divider) and software (I²C registers 0x05h/0x0Eh/0x0Fh) control enable dynamic threshold adaptation across multiple PD profiles. |
| Integrated Surge Protection | IEC61000-4-5 ±100 V tolerance on VIN eliminates discrete TVS requirements and reduces BOM count in USB-C ESD/surge protection stages. |
| Comprehensive Fault Flagging | Separate OV_FLG, OC_FLG, and OT_FLG bits in register 0x03h with interrupt assertion on INT pin - enables real-time system-level fault diagnosis and recovery. |
| ESD Robustness | 8 kV contact / 15 kV air IEC61000-4-2 on VIN; 3 kV HBM on all pins - meets stringent USB-C port reliability standards without external clamping. |
Applications
| Smartphones | Notebooks |
|---|---|
Use Scenario: Protecting USB-C port power path during hot-plug of high-voltage PD adapters or faulty cables. IC Role / Device Role / Timing Role: Load switch with autonomous OVLO/OTP/OC shutdown and VIN impedance pre-check before power delivery handshake. Use Value: Prevents permanent damage to PMIC and battery charger ICs by isolating >23 V transients and detecting shorted VBUS pins prior to enable. | Use Scenario: Managing dual-role USB-C ports that support both host and device modes with variable input voltages. IC Role / Device Role / Timing Role: High-side power switch with I²C-configurable OVLO thresholds and real-time VIN status reporting for dynamic PD negotiation. Use Value: Enables safe 20 V operation while avoiding false trips during transient voltage overshoots via adjustable 22.5 ms debounce and fine-tuned OVLO. |
| Tablets | eBooks |
Use Scenario: Securing battery charging circuitry against reverse-connected chargers or damaged cables in thin-profile designs. IC Role / Device Role / Timing Role: Compact WLCSP20 load switch providing surge immunity, soft-start, and thermal foldback in space-constrained layouts. Use Value: Delivers 8 A continuous current with 8.95 mΩ RDS(on) and −40 °C to +85 °C operation - sustaining performance without derating in sealed enclosures. | Use Scenario: Enabling USB-C fast charging in low-power, always-on portable readers with minimal standby current draw. IC Role / Device Role / Timing Role: Low-quiescent I²C-controlled switch with EN pin pull-down and automatic UVLO disable below 2.8 V. Use Value: Reduces system-level power loss during sleep mode via hardware-enforced disconnect and <1 µA shutdown current. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar overvoltage protection load switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TUSB544RGET | USB-C 3.1 Gen 2 redriver with integrated load switch; 5 A max, fixed 6.2 V OVLO, no VIN impedance detection. | Targeted at signal integrity enhancement, not primary power path protection; lacks programmable OVLO and ADC-based diagnostics. | Select when signal equalization is required alongside basic switching; avoid when autonomous fault isolation or VIN status monitoring is needed. |
| TPS25750RWER | USB PD controller with integrated 6.5 A load switch; supports PD 3.1, includes VCONN, but OVLO fixed at 22.5 V and no ADJ pin. | Designed for full PD policy engine implementation; higher integration but less flexibility in OVLO tuning and no VIN impedance sensing. | Choose for end-to-end PD 3.1 compliance; use NX30P6093UKAZ where standalone, I²C-tunable protection with diagnostic capability is prioritized over protocol stack integration. |
Compared with TUSB544RGET and TPS25750RWER, the NX30P6093UKAZ uniquely combines field-adjustable OVLO (4–23 V), VIN impedance detection for pre-connection safety, and ±100 V surge tolerance - making it optimal for cost-sensitive, high-reliability USB-C power path protection without requiring full PD controller functionality.
Availability
NX30P6093UKAZ is available at Aetrix Electronics and suitable for smartphone, tablet, and notebook USB-C power path protection requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for NX30P6093UKAZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and consumer applications, with core expertise in power management and USB interface ICs.
The NX30P6093UKAZ belongs to NXP's high-voltage USB-C protection portfolio, engineered specifically to replace discrete MOSFET + protection IC combinations in portable electronics - delivering enhanced reliability, smaller footprint, and intelligent diagnostics via I²C.
FAQ
What is the default overvoltage lockout (OVLO) threshold for the NX30P6093UKAZ?
The NX30P6093UKAZ has a default OVLO threshold of 6.8 V when the ADJ pin is grounded or floating. This value can be adjusted to 11.5 V, 17 V, or 23 V via I²C register 0x05h bits OV[1:0], and further fine-tuned by ±800 mV using RNG[2:0] bits in the same register. The ADJ pin allows hardware-based adjustment from 4 V to 23 V using an external resistor divider.
How does the VIN impedance detection function work in the NX30P6093UKAZ?
The NX30P6093UKAZ activates VIN impedance detection only when EN = LOW and VIN < VUVLO. It sources a programmable current (0–10 mA via register 0x06h) into VIN, measures resulting voltage via internal ADC, and stores the 8-bit result in register 0x08h. The detected value is compared against a user-defined tag voltage (register 0x09h) to trigger OVER_TAG_STS - enabling pre-connection short-circuit identification before enabling VOUT.
What I²C address does the NX30P6093UKAZ use, and what speeds does it support?
The NX30P6093UKAZ uses I²C write address 0x6C and read address 0x6D. It supports Standard-mode (100 kbit/s), Fast-mode (400 kbit/s), and Fast-mode Plus (2 Mbit/s) data transfer rates. It does not support I²C General Call, clock stretching, Software Reset, or 10-bit addressing - ensuring compatibility with standard microcontroller I²C peripherals while maintaining deterministic timing.
Does the NX30P6093UKAZ require external components for basic operation?
Yes - the NX30P6093UKAZ requires external 4.7 kΩ pull-up resistors on SCL and SDA lines to VDD, a minimum 1 µF input capacitor (CIN) and output capacitor (COUT), and either a grounded ADJ pin (for default 6.8 V OVLO) or an external resistor divider (R1+R2 > 1 MΩ) if adjustable OVLO is needed. No external TVS diode is required due to its integrated ±100 V IEC61000-4-5 surge protection on VIN.
What protection features are integrated into the NX30P6093UKAZ?
The NX30P6093UKAZ integrates five core protections: (1) Overvoltage lockout (OVLO) with dual-mode adjustment, (2) Undervoltage lockout (UVLO) below 2.8 V, (3) Overtemperature protection (OTP) tripping at 140 °C with auto-recovery at 120 °C, (4) Short-circuit protection activating above 12 A peak current, and (5) ±100 V IEC61000-4-5 surge immunity on VIN - all autonomously enforced without host intervention.
NX30P6093UKAZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 20-UFBGA, WLCSP
- Series:
- NX3
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- USB Switch
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- -
- Output Type:
- P-Channel
- Interface:
- I2C
- Voltage - Load:
- 2.8V ~ 20V
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 4.5V
- Current - Output (Max):
- 8A
- Rds On (Typ):
- 8.95mOhm
- Input Type:
- -
- Features:
- Slew Rate Controlled
- Fault Protection:
- Over Temperature, Over Voltage, UVLO
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-WLCSP (2.16x1.7)
NX30P6093UKAZ FAQ
1.How can I place an order for NX30P6093UKAZ through Aetrix?
Please submit a Request for Quotation (RFQ) for NX30P6093UKAZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NX30P6093UKAZ reliable?
The price and inventory of NX30P6093UKAZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NX30P6093UKAZ is usually 5 days.
3.What payment methods are accepted for NX30P6093UKAZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NX30P6093UKAZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NX30P6093UKAZ?
NX30P6093UKAZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NX30P6093UKAZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NX30P6093UKAZ?
For technical support, including NX30P6093UKAZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NX30P6093UKAZ requirements.
6.How does Aetrix verify that NX30P6093UKAZ is sourced from the original manufacturer or authorized distributors?
All NX30P6093UKAZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NX30P6093UKAZ meets industry standards.
7.What is the process for return or replacement of NX30P6093UKAZ?
All NX30P6093UKAZ units undergo pre-shipment inspection (PSI). If there is an issue with NX30P6093UKAZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NX30P6093UKAZ part is unused and in its original packaging.
Return procedure for NX30P6093UKAZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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