NXP Semiconductors NX3L4684TK,115
- Part No.:
- NX3L4684TK,115
- Manufacturer:
- NXP Semiconductors
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
NX3L4684TK,115.pdf
- Description:
- IC SWITCH SPDTX2 750MOHM 10HVSON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
NX3L4684TK,115 from NXP Semiconductors is a dual low-ohmic SPDT analog switch optimized for signal routing in portable audio and data interfaces. It features 0.3 Ω typical ON resistance (Y0 port at VCC = 2.3 V), break-before-make switching, and 1.4 V to 4.3 V supply operation - enabling bidirectional 4.3 V signal switching with 1.8 V logic control in battery-powered mobile devices.
For engineers reviewing the NX3L4684TK,115 datasheet, NX3L4684TK,115 pinout, NX3L4684TK,115 application, or NX3L4684TK,115 equivalent, this page delivers verified package mapping (HVSON10), temperature-rated performance (−40 °C to +125 °C), ESD robustness (6 kV IEC61000-4-2), dynamic timing specs (20 ns enable time at 3.6 V), and real-world use-case validation for audio path selection and USB signal multiplexing.
Technical Context
The NX3L4684TK,115 implements two independent CMOS SPDT switches with Schmitt-trigger digital inputs, supporting rail-to-rail analog signal transmission up to VCC without level translation. Its architecture enforces guaranteed break-before-make timing (≤10 ns at VCC ≥ 3.6 V) and maintains channel isolation >90 dB at 100 kHz.
Each switch exhibits voltage-dependent ON resistance flatness (≤0.25 Ω for Y0 port across full input range at VCC = 4.3 V) and ultra-low charge injection (≤50 pC at VCC = 4.3 V), critical for minimizing glitch-induced distortion in audio and sensor front-ends.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.4 V to 4.3 V - supports direct integration into 1.8 V, 2.5 V, 3.3 V, and 4.2 V Li-ion systems without external regulators. |
| ON Resistance (Y0) | 0.3 Ω typical at VCC = 2.3 V - ensures minimal insertion loss (<0.02 dB) in 32 Ω audio paths and preserves signal integrity in high-fidelity playback. |
| ON Resistance Flatness (Y0) | 0.1 Ω max at VCC = 4.3 V - guarantees consistent gain and phase response across full analog input swing, reducing harmonic distortion. |
| Enable Time (ten) | 20 ns typical at VCC = 3.6 V - enables fast reconfiguration for time-multiplexed sensor or ADC channel switching in real-time systems. |
| ESD Robustness | 6 kV IEC61000-4-2 contact discharge on switch ports - eliminates need for external TVS diodes in handheld device I/O protection schemes. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive infotainment and industrial portable equipment deployment. |
| Switch Current Rating | 350 mA continuous - sustains reliable operation driving headphone amplifiers or USB D+/D− lines without thermal derating. |
Pinout & Package
HVSON10 package: plastic thermal-enhanced very thin small outline, no leads, 10 terminals, 3.0 × 3.0 × 0.85 mm body height.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VCC | Main power supply input - accepts 1.4 V to 4.3 V; powers internal logic and switch FETs; decoupling capacitor required at pin. |
| 2 | 1S | Digital select input for Switch 1 - Schmitt-triggered; compatible with 1.8 V logic even at 3.6 V VCC; no level shifter needed. |
| 3 | 1Z | Common terminal for Switch 1 - bidirectional signal path; connects to nY0 or nY1 based on 1S state; handles full VCC-amplitude signals. |
| 4 | 2Y0 | Independent I/O for Switch 2 - routed to 2Z when 2S = LOW; supports audio line, USB, or sensor signal routing with <0.02% THD. |
| 5 | 1Y0 | Independent I/O for Switch 1 - selected when 1S = LOW; lowest ON resistance path (0.3 Ω typ); preferred for high-current or low-distortion paths. |
| 6 | GND | Analog/digital ground reference - must be low-impedance connection; shared return for all switch currents and logic inputs. |
| 7 | 2Y1 | Independent I/O for Switch 2 - selected when 2S = HIGH; higher ON resistance than 2Y0 (0.5 Ω typ), suited for lower-sensitivity signal paths. |
| 8 | 2S | Digital select input for Switch 2 - identical electrical behavior to 1S; enables independent control of second SPDT channel. |
| 9 | 2Z | Common terminal for Switch 2 - bidirectional; matches 1Z functionality; allows simultaneous dual-path routing without crosstalk (>90 dB isolation). |
| 10 | 1Y1 | Independent I/O for Switch 1 - selected when 1S = HIGH; complements 1Y0; used for alternate signal source or redundant path selection. |
Key Features
| Feature | Design Value |
|---|---|
| 1.8 V logic compatibility at 3.6 V VCC | Eliminates level translators in mixed-voltage SoC designs - reduces BOM count and PCB area in smartphone audio subsystems. |
| Break-before-make switching | Guaranteed 1–10 ns dead time prevents momentary short-circuit between Y0/Y1 paths - essential for avoiding signal corruption during channel switching. |
| Ultra-low charge injection (≤50 pC) | Minimizes voltage glitches on high-impedance nodes (e.g., MEMS microphone bias lines), preserving DC accuracy and preventing pop/click artifacts. |
| High OFF-state isolation (−90 dB) | Blocks leakage between active and inactive channels at 100 kHz - critical for maintaining SNR in multi-source audio mixers and RF front-end switching. |
| Wide temperature range (−40 °C to +125 °C) | Validated performance across automotive cabin and industrial field environments - no derating required up to maximum ambient rating. |
Applications
| Smartphone Audio Routing | USB 2.0 Data Multiplexing |
|---|---|
|
Use Scenario: Selecting between stereo headset output and mono speaker output in space-constrained mobile handsets. IC Role / Device Role: Dual SPDT analog switch managing bidirectional audio signal paths with zero DC offset and minimal THD. Use Value: Enables single codec to drive multiple transducers using one NX3L4684TK,115 - saves 2.5 mm² PCB area versus discrete solutions and cuts THD to 0.02% at 20 kHz. |
Use Scenario: Sharing USB D+ and D− lines between host controller and peripheral IC in dual-role OTG devices. IC Role / Device Role: Low-capacitance (65 pF OFF-state) analog switch ensuring signal integrity across full USB 2.0 bandwidth (480 Mbps). Use Value: Maintains <−90 dB crosstalk and 15 MHz −3 dB bandwidth - meets USB eye diagram mask requirements without equalization. |
| Portable Media Player Line-Out | Industrial Sensor Signal Conditioning |
|
Use Scenario: Routing line-level analog outputs from DAC to either 3.5 mm jack or internal amplifier in battery-powered media players. IC Role / Device Role: Rail-to-rail SPDT switch handling ±2 Vpp signals with 0.3 Ω ON resistance and 0.1 Ω flatness. Use Value: Delivers <0.02% THD at 1 kHz and preserves dynamic range - avoids audible distortion during volume transitions and source switching. |
Use Scenario: Multiplexing outputs from multiple precision temperature or pressure sensors to a shared ADC input in compact IoT edge nodes. IC Role / Device Role: Low-leakage (±10 nA OFF-state at 85 °C) analog switch minimizing measurement error from channel crosstalk. Use Value: Limits added offset error to <1 µV over full temperature range - enables 16-bit effective resolution without calibration overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TXS0108E | 8-bit level-translating bus switch; open-drain logic; no analog signal pass-through capability. | Designed for digital I²C/SPI level translation only - unsuitable for audio or sensor analog routing. | Select only if digital signal translation (not analog switching) is required; incompatible pinout and function. |
| ADG732BRUZ | 32-channel CMOS analog multiplexer; 4.5 Ω typical ON resistance; 16-bit SPI interface; larger TSSOP-48 package. | Targeted at high-channel-count test equipment - excessive complexity and cost for dual-path portable applications. | Choose only for multi-channel scanning systems; not drop-in replaceable due to pin count, interface, and size mismatch. |
Compared with TXS0108E and ADG732BRUZ, the NX3L4684TK,115 uniquely combines ultra-low ON resistance (0.3 Ω), HVSON10 footprint (3 × 3 mm), and 1.8 V logic compatibility - making it the only viable solution for space-constrained, low-distortion analog routing in portable consumer electronics.
Availability
NX3L4684TK,115 is available at Aetrix Electronics and suitable for smartphone audio routing, USB 2.0 multiplexing, and portable media player line-out applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for NX3L4684TK,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and mobile applications - with core expertise in analog, RF, and mixed-signal IC design.
The NX3L4684TK,115 belongs to NXP's NX3L low-voltage analog switch family, engineered specifically for energy-efficient signal routing in battery-powered portable electronics operating down to 1.4 V supply.
FAQ
What is the maximum analog signal voltage the NX3L4684TK,115 can switch?
The NX3L4684TK,115 supports analog signal amplitudes up to VCC on all switch terminals (nZ, nY0, nY1). With a maximum rated supply voltage of 4.3 V, it can reliably pass bidirectional signals from 0 V to 4.3 V without clipping or distortion - confirmed per Table 6 (Recommended Operating Conditions) and Figure 7 (ON resistance test circuit).
Does the NX3L4684TK,115 require external level shifters when driven by 1.8 V logic at 3.6 V VCC?
No. The NX3L4684TK,115 features low-threshold digital inputs that accept 1.8 V logic levels directly at VCC = 3.6 V, eliminating the need for external level shifters. This is validated in Section 2 ("Features and benefits") and Table 7 (VIH/VIL specifications), where VIH = 1.3 V min at VCC = 2.7 V to 3.6 V.
What is the guaranteed break-before-make time for the NX3L4684TK,115?
The NX3L4684TK,115 guarantees break-before-make timing of ≤10 ns at VCC = 3.6 V to 4.3 V, as specified in Table 9 (Dynamic characteristics). This is ensured by internal design - not just typical behavior - and prevents signal shorting during channel transitions in audio and data routing applications.
How does the NX3L4684TK,115 perform in high-temperature environments?
The NX3L4684TK,115 is fully specified from −40 °C to +125 °C, with ON resistance, leakage current, and timing parameters validated across this range (see Tables 8 and 9). At +125 °C, RON(peak) for Y0 remains ≤0.5 Ω at VCC = 4.3 V, and isolation stays >−90 dB - meeting automotive and industrial thermal requirements without derating.
Can the NX3L4684TK,115 be used in USB 2.0 signal paths?
Yes. The NX3L4684TK,115 delivers 15 MHz −3 dB bandwidth (nY0 port) and <−90 dB isolation at 100 kHz, satisfying USB 2.0 signal integrity requirements for full-speed (12 Mbps) and high-speed (480 Mbps) data lines. Its 65 pF OFF-state capacitance and low crosstalk ensure compliance with USB eye diagram masks when properly laid out.
NX3L4684TK,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Circuit:
- SPDT
- Multiplexer/Demultiplexer Circuit:
- 2:1
- Number of Circuits:
- 2
- On-State Resistance (Max):
- 750mOhm
- Channel-to-Channel Matching (ΔRon):
- 40mOhm
- Voltage - Supply, Single (V+):
- 1.4V ~ 4.3V
- Voltage - Supply, Dual (V±):
- -
- Switch Time (Ton, Toff) (Max):
- 45ns, 20ns
- -3db Bandwidth:
- 20MHz
- Charge Injection:
- 50pC
- Channel Capacitance (CS(off), CD(off)):
- 35pF
- Current - Leakage (IS(off)) (Max):
- 10nA
- Crosstalk:
- -90dB @ 100kHz
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-HVSON (3x3)
NX3L4684TK,115 FAQ
1.How can I place an order for NX3L4684TK,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for NX3L4684TK,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NX3L4684TK,115 reliable?
The price and inventory of NX3L4684TK,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NX3L4684TK,115 is usually 5 days.
3.What payment methods are accepted for NX3L4684TK,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NX3L4684TK,115 transactions.
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4.How is shipping managed for NX3L4684TK,115?
NX3L4684TK,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NX3L4684TK,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NX3L4684TK,115?
For technical support, including NX3L4684TK,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NX3L4684TK,115 requirements.
6.How does Aetrix verify that NX3L4684TK,115 is sourced from the original manufacturer or authorized distributors?
All NX3L4684TK,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NX3L4684TK,115 meets industry standards.
7.What is the process for return or replacement of NX3L4684TK,115?
All NX3L4684TK,115 units undergo pre-shipment inspection (PSI). If there is an issue with NX3L4684TK,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NX3L4684TK,115 part is unused and in its original packaging.
Return procedure for NX3L4684TK,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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