Nexperia USA Inc. NXS0101GWH

Overview

NXS0101 from Nexperia is a 1-bit dual-supply auto-sensing bidirectional voltage-level transceiver with open-drain I/O, supporting translation between 1.8 V/2.5 V/3.3 V and 5.0 V domains. It features independent VCC(A) (1.65–3.6 V) and VCC(B) (2.3–5.5 V) supplies, OE-controlled high-impedance state, and integrated 10 kΩ pull-ups on both A and B ports. It enables I²C and 1-wire bus interfacing in smartphone and tablet power-domain isolation circuits.

For engineers reviewing the NXS0101 datasheet, NXS0101 pinout, NXS0101 application, or NXS0101 equivalent, this device is selected for its auto-direction sensing capability, IOFF partial power-down protection, ±1 μA leakage at 25 °C, 24 Mbps max data rate (push-pull), and guaranteed operation from –40 °C to +125 °C in TSSOP6 and XSON6 packages.

Technical Context

The NXS0101 implements a switch-type architecture using an N-channel pass-gate transistor biased ~1 V_TH above VCC(A), enabling passive level translation without external direction control. Its one-shot edge-acceleration circuit activates on input transitions crossing 0.5×VCCI, delivering low output impedance (50–70 Ω) for ≤10 ns during rising edges.

Direction sensing is fully autonomous: data flow (A↔B) is determined dynamically by relative voltage slew and internal biasing-no external DIR signal required. The IOFF circuit enforces <±12 μA power-off leakage when either supply is at 0 V, preventing backflow current during partial power-down sequences.

Key Specifications

Pinout & Package

TSSOP6 (SOT363-2) package: plastic thin shrink small outline, 6-lead, 1.25 mm body width, lead pitch 0.65 mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bidirectional voltage translation applications.

Compared with NXH0101DP and TXS0101, the NXS0101 uniquely combines open-drain compatibility, integrated pull-ups, IOFF protection, and 8 kV HBM on the B port-making it the only choice for robust I²C translation in thermally demanding, mixed-rail embedded systems.

Availability

NXS0101 is available at Aetrix Electronics and suitable for smartphone sensor interfaces, tablet power-domain isolation, desktop PC SMBus expansion, and industrial HMI touch controller links requiring stable component supply across extended temperature ranges.

Supply support for NXS0101 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert specializing in high-performance logic, analog, and MOSFET solutions, with leadership in automotive-grade reliability and energy-efficient design.

The NXS series targets ultra-low-power, auto-direction bidirectional level translation for I²C, SMBus, and 1-wire protocols in space-constrained portable and industrial electronics.

FAQ

Can NXS0101 translate between 1.8 V and 5.0 V without external components?

Yes. With VCC(A) = 1.8 V and VCC(B) = 5.0 V, the NXS0101 performs bidirectional level translation using its internal 10 kΩ pull-ups on both ports. No external resistors are needed for basic I²C operation, though system-level pull-up values may require adjustment for timing compliance at higher speeds.

What happens if VCC(A) exceeds VCC(B) during normal operation?

VCC(A) must not exceed VCC(B) during active operation per datasheet Section 8 and Table 4 footnote [1]. Doing so risks violating the internal gate bias condition, potentially causing unreliable direction sensing or increased leakage. However, power-up sequencing is unrestricted-either supply may ramp first.

Does NXS0101 support hot-swap or live-insertion scenarios?

Yes. The IOFF circuit ensures that when either VCC(A) or VCC(B) is at 0 V, output leakage remains ≤±12 μA, preventing back-current into powered domains. This enables safe insertion/removal of modules with mismatched power states, such as hot-pluggable sensor daughterboards.

How does the one-shot circuit affect PCB layout requirements?

The one-shot pulse duration (~10 ns) dictates layout constraints: trace lengths must ensure round-trip reflection delay stays within that window to prevent re-triggering. Keep A/B traces short (<5 cm), avoid stubs, and minimize total load capacitance to ≤15 pF-including probe/jig contributions-to maintain signal integrity and edge acceleration efficacy.