Nexperia USA Inc. NXU0304BQX

Overview

NXU0304BQX from Nexperia is a 4-bit dual-supply voltage level translating buffer with Schmitt-trigger inputs and 3-state outputs, designed for bidirectional asynchronous bus translation between independent 0.9 V–5.5 V domains. It supports fixed-direction data flow (A→B on three channels, B→A on one channel), features integrated 6.5 MΩ input pull-down resistors, and delivers up to 250 Mbps data rate at ≥1.8 V translation. It enables robust I/O interfacing in mixed-voltage systems such as UART/SPI/JTAG bridges.

For engineers reviewing the NXU0304BQX datasheet, NXU0304BQX pinout, NXU0304BQX application, or NXU0304BQX equivalent, key selection criteria include its dual-rail supply flexibility (VCCA/VCCB = 0.9–5.5 V), Schmitt-trigger noise immunity, IOFF-enabled partial power-down protection, OE pin domain independence, and guaranteed high-impedance isolation during power-up/down transitions.

Technical Context

The device implements four independent translation paths: A1→YB1, A2→YB2, A3→YB3 (unidirectional A-to-B), and B4→YA4 (unidirectional B-to-A). Each input incorporates a Schmitt-trigger with VT+ and VT− thresholds varying by supply (e.g., VT+ = 1.05 V / VT− = 0.46 V at VCCA = VCCB = 1.65 V), enabling reliable operation with slow or noisy signals.

Output enable (OE) is referenced to either VCCA or VCCB via internal VCC(MIN) circuitry; asserting OE LOW places all outputs in high-impedance state regardless of supply sequencing. The IOFF circuit activates when either VCCA or VCCB drops below 100 mV or floats, blocking backflow current and eliminating need for power supply coordination.

Key Specifications

Pinout & Package

DHVQFN14 package (SOT762-1): 2.5 mm × 3 mm × 0.85 mm body, 14-terminal leadless thermal-enhanced quad flat design with exposed thermal pad (GND-connected recommended).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-supply level translation applications.

Compared with NXU0104, NXU0304BQX doubles channel density without increasing footprint; versus NXU0204, it trades per-pin direction flexibility for lower static current and deterministic unidirectional latency-ideal for UART/SPI where direction is statically assigned.

Availability

NXU0304BQX is available at Aetrix Electronics and suitable for UART interface bridges, SPI bus translation, JTAG debug adapters, and noisy industrial I/O expansion requiring stable component supply across automotive, industrial automation, and embedded computing programs.

Supply support for NXU0304BQX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable components including logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The NXU series targets mixed-voltage system interfacing, emphasizing robustness in partial-power-down conditions, noise immunity, and JEDEC-compliant interoperability across legacy and next-generation logic families.

FAQ

Can NXU0304BQX translate between 0.9 V and 5.5 V simultaneously?

Yes. VCCA may be set to 0.9 V while VCCB operates at 5.5 V, enabling direct translation from ultra-low-voltage logic to 5 V TTL levels. The device guarantees correct Schmitt-trigger thresholds and output drive capability across this full range, with maximum data rate reduced to 100 Mbps in this extreme case per datasheet Table 12.

What happens if OE is left unconnected during power-up?

The OE pin has no internal pull-up; leaving it floating results in indeterminate logic level until VCCA/VCCB stabilize. However, the datasheet explicitly permits this: OE will default to HIGH once supplies reach operational voltage, enabling outputs. For guaranteed Hi-Z at power-up, tie OE to GND via 10 kΩ resistor or use an active-low reset signal.

Does NXU0304BQX support I²C bidirectional translation?

No. Its fixed-direction architecture (three A→B, one B→A) lacks the per-pin direction control required for open-drain I²C bus arbitration. Use NXU0204 or dedicated I²C translators like PCA9306 for true bidirectional, multi-master applications.

How does the IOFF circuit prevent backflow current?

When either VCCA or VCCB falls below 100 mV or floats, internal transistors disconnect the powered domain from the unpowered one. This creates high-impedance isolation between A- and B-side I/O structures, limiting leakage to ±2 μA even with 5.5 V applied to inputs/outputs-eliminating risk of latch-up or damage during hot-swap or brownout.