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Texas Instruments OMAPL138AZWTA3
- Part No.:
- OMAPL138AZWTA3
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- -
- Datasheet:
-
OMAPL138AZWTA3.pdf
- Description:
- DIGITAL SIGNAL PROCESSOR, 16-BIT
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Product details
Overview
OMAPL138AZWTA3 from Texas Instruments is a dual-core C6-Integra™ DSP+ARM® system-on-chip integrating a 456-MHz ARM926EJ-S RISC processor and a 456-MHz TMS320C674x fixed/floating-point VLIW DSP, with 256KB L2 unified RAM/cache, 128KB shared RAM, and 1.8V/3.3V I/O support. It targets embedded industrial control, audio/video processing, and communications infrastructure requiring real-time co-processing.
For engineers reviewing the OMAPL138AZWTA3 datasheet, OMAPL138AZWTA3 pinout, OMAPL138AZWTA3 application, or OMAPL138AZWTA3 equivalent, key selection criteria include dual-core clock synchronization, EDMA3 bandwidth allocation across ARM/DSP domains, SATA I/II (1.5/3.0 Gbps) storage interface compliance, and PRUSS subsystem programmability for deterministic I/O offload.
Technical Context
The OMAPL138AZWTA3 implements a tightly coupled dual-core architecture where the ARM926EJ-S handles OS services, user interfaces, and peripheral management while the C674x DSP executes high-throughput signal processing tasks-both sharing access to 256KB L2 memory and 128KB dedicated shared RAM. Cache coherency is maintained via explicit software-managed barriers and EDMA3-controlled data movement.
Its peripheral subsystem includes a 10/100-Mb/s Ethernet MAC with MII/RMII support, USB 2.0 OTG + USB 1.1 OHCI controllers with integrated PHYs, two MMC/SD interfaces, SATA I/II controller, LCD controller, VPIF, uPP, McASP, McBSP, eHRPWM/eCAP timers, and a programmable PRUSS with two 32-bit RISC cores-each with 4KB instruction RAM and 512B data RAM.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | ARM926EJ-S @ 456 MHz (1.3V core) + C674x DSP @ 456 MHz (1.3V core) |
| Memory Architecture | L1P/L1D: 32KB each (direct-mapped / 2-way set-associative); L2: 256KB unified mapped RAM/cache; 128KB shared RAM accessible by both cores |
| External Memory Support | DDR2/mDDR: 16-bit bus, up to 156 MHz (DDR2) or 150 MHz (mDDR); EMIFA: 8/16-bit NAND/NOR/SDRAM |
| Connectivity Peripherals | 1× 10/100-Mb/s EMAC (MII/RMII), 1× USB 2.0 OTG + 1× USB 1.1 OHCI (both with integrated PHY), 2× MMC/SD, 1× SATA I/II (1.5/3.0 Gbps) |
| DSP Acceleration Features | EDMA3: 64 independent channels + 16 QDMA channels; C674x ISA supports IEEE SP/DP floating point, mixed-precision multiply, bit-counting, saturation |
| I/O Voltage | 1.8V or 3.3V LVCMOS (excluding DDR2/USB physical layers) |
| Package | 361-ball PBGA (ZWT suffix), 16 mm × 16 mm, 0.80-mm ball pitch, RoHS-compliant |
Pinout & Package
OMAPL138AZWTA3 uses a 361-ball Pb-free plastic ball grid array (PBGA) package with 0.80-mm ball pitch (ZWT suffix), designed for high-density PCB layouts and thermal reliability in industrial environments. Ball mapping follows TI's standardized OMAP-L138 pin multiplexing scheme supporting dynamic function assignment per bank.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDA_12_PLL0 | Analog PLL0 power supply | 1.2V analog rail for PLL0 clock generation; requires low-noise decoupling to minimize jitter on ARM/DSP clocks |
| CLKIN | Primary oscillator input | Accepts 24–38.4 MHz crystal or external clock; feeds PLLs for system clock derivation (ARM/DSP/DDR/USB) |
| EMAC_RXD[3:0] | Ethernet receive data bus | 4-bit MII interface signals; timing-critical path requiring controlled impedance routing and length matching |
| USB0_DP / USB0_DM | USB 2.0 OTG differential pair | Full-speed/high-speed differential signals routed as 90Ω controlled-impedance pair; internal PHY eliminates need for external transceiver |
| DDR2_DQ[15:0] | DDR2 data bus | 16-bit bidirectional data lines; require on-die termination, fly-by topology, and strict setup/hold timing relative to DDR2_CLK |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core cache-coherent memory map | ARM and DSP share visibility into L2 and 128KB RAM without hardware cache coherency engine-enables deterministic inter-processor communication via mailbox registers and EDMA3 descriptors |
| Programmable Real-Time Unit Subsystem (PRUSS) | Two independent 32-bit RISC cores (4KB IRAM + 512B DRAM each) execute real-time I/O tasks (e.g., PWM capture, GPIO bit-banging) without CPU intervention or latency jitter |
| Flexible video/audio interface suite | VPIF supports BT.656 8-bit SD video capture/display; McASP provides 16 serializers with TDM/I2S/AC97 support and FIFO buffering for low-CPU-audio streaming |
| SATA I/II host controller | Hardware-assisted Native Command Queuing (NCQ) for up to 32 commands, port multiplier support, and full SATA power management-enables local mass storage in headless industrial recorders |
| Configurable EMIFA and DDR2/mDDR controllers | EMIFA supports NAND boot and legacy peripherals; DDR2/mDDR controller delivers 1.2 GB/s peak bandwidth at 156 MHz-critical for video frame buffering and DSP algorithm data throughput |
Applications
| Industrial HMI Controller | Audio Signal Processor |
|---|---|
|
Use Scenario: Programmable logic controller with touchscreen GUI, real-time motion control, and local data logging via SATA SSD. IC Role / Device Role / Timing Role: OMAPL138AZWTA3 serves as main SoC executing Linux RT kernel on ARM core while offloading servo loop calculations and encoder interpolation to C674x DSP; PRUSS handles quadrature decoding and PWM generation. Use Value: Dual-core deterministic execution enables <50 µs servo update cycles and 60 Hz GUI refresh simultaneously-no external FPGA required for I/O timing. |
Use Scenario: Professional audio mixer with 16-channel analog input, effects processing, and USB audio class streaming. IC Role / Device Role / Timing Role: OMAPL138AZWTA3 runs real-time audio framework on ARM; McASP routes 16-channel I2S to codec; C674x DSP applies FIR filters, dynamics processing, and sample-rate conversion. Use Value: 456-MHz C674x delivers >1200 MFLOPS for 96 kHz/24-bit processing-supports 32 simultaneous 5-band parametric EQs with headroom for reverb algorithms. |
| Video Surveillance Encoder | Communications Gateway |
|
Use Scenario: IP camera with dual-stream H.264 encoding (main stream + thumbnail), motion detection, and ONVIF compliance. IC Role / Device Role / Timing Role: ARM core manages network stack, web server, and motion analytics; C674x DSP executes H.264 baseline profile encode using optimized codecs from TI's DSP library. Use Value: Integrated VPIF captures BT.656 video directly; 256KB L2 cache minimizes DDR2 traffic during encode-enables 1080p@30fps with <120 ms end-to-end latency. |
Use Scenario: Cellular backhaul gateway aggregating RS-485 fieldbus, Ethernet LAN, and LTE modem via USB. IC Role / Device Role / Timing Role: OMAPL138AZWTA3 acts as protocol translator: ARM runs Modbus TCP/RTU stack; PRUSS bit-bangs RS-485 timing; USB0 connects to LTE module; EMAC bridges LAN. Use Value: PRUSS eliminates need for external UART-to-RS485 transceivers and ensures precise half-duplex turnaround timing-reducing BOM cost and board area by 30%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core DSP+ARM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OMAPL138AZWT | Same ZWT package and pinout; rated for commercial temperature range (0°C to 90°C) vs. OMAPL138AZWTA3's extended range (–40°C to 105°C) | Not suitable for outdoor or uncontrolled-temperature industrial enclosures where thermal cycling exceeds 90°C ambient | Select OMAPL138AZWTA3 when operating in extended temperature environments requiring guaranteed functionality at –40°C startup and 105°C sustained operation. |
| AM1808ZWT | ARM9-only variant (no C674x DSP); identical package, peripheral set, and memory map-but lacks VLIW DSP core and associated L1/L2 cache hierarchy | Cannot execute real-time signal processing workloads (e.g., FFT, filtering, encode) without external accelerator or performance penalty on ARM | Choose AM1808ZWT only if application requires only ARM-based control and connectivity-avoid when DSP compute or low-latency I/O offload (PRUSS) is needed. |
Compared with OMAPL138AZWT, OMAPL138AZWTA3 guarantees extended-temperature operation critical for factory-floor automation; versus AM1808ZWT, it retains full DSP acceleration and PRUSS real-time I/O capability-making it the sole option for mixed-signal edge devices needing both rich OS support and hard real-time processing.
Availability
OMAPL138AZWTA3 is available at Aetrix Electronics and suitable for industrial HMI controllers, professional audio signal processors, video surveillance encoders, and communications gateways requiring stable component supply across multi-year production cycles.
Supply support for OMAPL138AZWTA3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.
The OMAP-L138 product line was engineered to bridge the gap between general-purpose application processors and dedicated DSPs-delivering deterministic real-time performance alongside Linux-capable ARM execution for cost-sensitive, power-constrained edge devices.
FAQ
What is the maximum DDR2 clock frequency supported by OMAPL138AZWTA3?
OMAPL138AZWTA3 supports DDR2 memory operation up to 156 MHz, delivering a theoretical peak bandwidth of 1.248 GB/s on its 16-bit bus. This frequency is validated under recommended operating conditions (1.8V I/O, junction temperature ≤105°C) and requires proper PCB layout adherence to TI's DDR2 timing and termination guidelines in the SPRS586C datasheet.
Does OMAPL138AZWTA3 include an integrated USB PHY?
Yes, OMAPL138AZWTA3 integrates a full-speed/high-speed USB 2.0 OTG PHY (USB0) and a full-speed USB 1.1 OHCI PHY (USB1). Both eliminate the need for external transceivers, reducing BOM count and PCB area. The USB0 PHY supports host/device roles with built-in VBUS sensing and ID pin detection per USB OTG specification.
Can the PRUSS on OMAPL138AZWTA3 be used for real-time PWM generation?
Yes, the Programmable Real-Time Unit Subsystem (PRUSS) on OMAPL138AZWTA3 supports deterministic PWM generation via its eHRPWM modules. Each eHRPWM provides 16-bit time-base counters, dead-band control, and trip-zone inputs-enabling sub-microsecond timing resolution for motor control, lighting, or power conversion without ARM or DSP core involvement.
What boot sources are supported by OMAPL138AZWTA3?
OMAPL138AZWTA3 supports multiple boot modes including NAND flash, NOR flash, MMC/SD card, SPI serial flash, and UART download. Boot configuration is selected via strap pins (SYSBOOT[4:0]) at power-on reset. The internal ROM bootloader validates image integrity and loads firmware into L2 or DDR2 memory before transferring control to user code.
Is OMAPL138AZWTA3 pin-compatible with other OMAP-L138 variants?
Yes, all OMAP-L138 devices-including OMAPL138AZWTA3, OMAPL138AZWT, and OMAPL138AZCE-share identical 361-ball PBGA footprints and pin functions. The ZWT package (0.80-mm pitch) is mechanically and electrically compatible across speed grades (375/456 MHz) and temperature grades (commercial/extended), enabling single PCB design reuse across performance and environmental requirements.
OMAPL138AZWTA3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- -
- Series:
- *
- Packaging:
- Bulk
- Product Status:
- Active
- Core Processor:
- -
- Number of Cores/Bus Width:
- -
- Speed:
- -
- Co-Processors/DSP:
- -
- RAM Controllers:
- -
- Graphics Acceleration:
- -
- Display & Interface Controllers:
- -
- Ethernet:
- -
- SATA:
- -
- USB:
- -
- Voltage - I/O:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Security Features:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
- Additional Interfaces:
- -
OMAPL138AZWTA3 FAQ
1.How can I place an order for OMAPL138AZWTA3 through Aetrix?
Please submit a Request for Quotation (RFQ) for OMAPL138AZWTA3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OMAPL138AZWTA3 reliable?
The price and inventory of OMAPL138AZWTA3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OMAPL138AZWTA3 is usually 5 days.
3.What payment methods are accepted for OMAPL138AZWTA3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OMAPL138AZWTA3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OMAPL138AZWTA3?
OMAPL138AZWTA3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OMAPL138AZWTA3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OMAPL138AZWTA3?
For technical support, including OMAPL138AZWTA3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OMAPL138AZWTA3 requirements.
6.How does Aetrix verify that OMAPL138AZWTA3 is sourced from the original manufacturer or authorized distributors?
All OMAPL138AZWTA3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OMAPL138AZWTA3 meets industry standards.
7.What is the process for return or replacement of OMAPL138AZWTA3?
All OMAPL138AZWTA3 units undergo pre-shipment inspection (PSI). If there is an issue with OMAPL138AZWTA3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OMAPL138AZWTA3 part is unused and in its original packaging.
Return procedure for OMAPL138AZWTA3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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