Texas Instruments OMAPL138EZWT3

Overview

OMAPL138EZWT3 from Texas Instruments is a dual-core C6000™ DSP + ARM® SoC integrating a 456-MHz ARM926EJ-S RISC MPU and a 456-MHz C674x VLIW DSP, with 256KB L2 unified RAM/cache, 128KB shared RAM, and 1.8-V/3.3-V LVCMOS I/Os. It targets industrial portable navigation, smart grid substation protection, and biometric identification systems requiring deterministic real-time signal processing and robust OS support.

For engineers reviewing the OMAPL138EZWT3 datasheet, OMAPL138EZWT3 pinout, OMAPL138EZWT3 application, or OMAPL138EZWT3 equivalent, key selection criteria include dual-core clock synchronization, DDR2/mDDR memory controller timing compliance, EMAC MII/RMII interface configuration, and PRUSS subsystem power-gating control in low-power embedded deployments.

Technical Context

The OMAPL138EZWT3 implements tightly coupled ARM926EJ-S and C674x cores sharing a 256KB L2 memory space configurable as RAM, cache, or hybrid, while maintaining separate 32KB L1P/L1D caches per core. Its EDMA3 controller supports 64 independent DMA channels with programmable burst sizes for zero-copy data movement between peripherals like McASP, McBSP, and uPP.

Peripheral coherency is managed via a switched central resource (SCR) and pin-multiplexing control logic that resolves functional overlap among UARTs, SPIs, I²C, USB OTG/Host, SATA, and VPIF - all accessible through a 361-ball NFBGA package with 0.80-mm pitch and 16.0 mm × 16.0 mm body size.

Key Specifications

Pinout & Package

OMAPL138EZWT3 uses a 361-ball Pb-free plastic ball grid array (PBGA) package with 0.80-mm ball pitch and 16.0 mm × 16.0 mm body size. Pin assignments are defined in TI SPRS586J Section 3.6–3.8, supporting multiplexed functions across 9 GPIO banks (16 pins each), dual McASP/McBSP serial ports, and dedicated VPIF video I/O lanes.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core DSP+ARM applications.

Compared with OMAPL138ZCE, the OMAPL138EZWT3 offers superior thermal performance and relaxed PCB layout constraints due to its larger pad pitch, while retaining identical functionality and software compatibility; versus AM1808ZCE0, it delivers essential C674x DSP compute and PRUSS determinism required for closed-loop industrial control.

Availability

OMAPL138EZWT3 is available at Aetrix Electronics and suitable for industrial portable navigation devices, smart grid substation protection relays, and biometric identification terminals requiring stable component supply across extended product lifecycles.

Supply support for OMAPL138EZWT3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets.

The OMAP-L138 product line was designed for low-power, high-performance embedded applications requiring integrated DSP and ARM processing - specifically targeting industrial automation, energy infrastructure, and portable intelligent devices.

FAQ

What is the maximum operating frequency of the OMAPL138EZWT3 and under what voltage conditions?

The OMAPL138EZWT3 operates at up to 456 MHz for both the ARM926EJ-S and C674x cores, requiring a 1.3V core supply voltage. This frequency is validated per TI SPRS586J Section 3.1 and supported across commercial and industrial temperature ranges. The 456-MHz mode consumes higher dynamic power than the 375-MHz variant but enables tighter real-time loop deadlines in motor control and audio processing applications using the OMAPL138EZWT3.

Does the OMAPL138EZWT3 support secure boot, and what cryptographic algorithms are implemented?

Yes, the OMAPL138EZWT3 implements TI Basic Secure Boot with hardware-accelerated AES-128 for boot image decryption and SHA-256 for signature validation. These functions are enforced during cold reset before ARM9 execution begins, using keys derived from a NIST-800-22 certified RNG. The secure boot flow in the OMAPL138EZWT3 protects against firmware tampering and ensures trusted code execution from first power-on.

How many independent DMA channels does the EDMA3 controller in the OMAPL138EZWT3 support?

The EDMA3 controller in the OMAPL138EZWT3 supports 64 independent DMA channels plus 16 quick-DMA (QDMA) channels, managed by two channel controllers and three transfer controllers. This architecture enables concurrent data movement between multiple peripherals - such as simultaneous McASP audio capture, uPP FPGA transfers, and DDR2 memory writes - without CPU overhead, a key capability for real-time workloads on the OMAPL138EZWT3.

What video interface standards does the VPIF in the OMAPL138EZWT3 support?

The Video Port Interface (VPIF) in the OMAPL138EZWT3 supports BT.656 standard-definition video capture and display (dual 8-bit), as well as raw video formats with 8-, 10-, or 12-bit depth. It does not support HDMI, MIPI CSI-2, or DisplayPort. The VPIF is optimized for direct connection to analog video decoders or CMOS image sensors in machine vision and surveillance applications using the OMAPL138EZWT3.

Can the PRUSS subsystem in the OMAPL138EZWT3 be disabled to reduce power consumption?

Yes, the Programmable Real-Time Unit Subsystem (PRUSS) in the OMAPL138EZWT3 can be fully disabled via software-controlled power-state commands issued to the Power and Sleep Controller (PSC). When disabled, both PRU cores, their instruction/data RAM, and associated interrupt resources are powered down - reducing active current by ~12 mA typical. This feature is documented in SPRS586J Section 6.33 and is commonly used in battery-powered OMAPL138EZWT3 deployments during idle periods.