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Texas Instruments OMAPL138EZWTA3R
- Part No.:
- OMAPL138EZWTA3R
- Manufacturer:
- Texas Instruments
- Category:
- Microprocessors
- Package:
- 361-LFBGA
- Datasheet:
-
OMAPL138EZWTA3R.pdf
- Description:
- IC MPU OMAP-L1X 375MHZ 361NFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:951
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Product details
Overview
OMAPL138EZWTA3R from Texas Instruments is a dual-core C6000™ DSP + ARM® SoC integrating a 456-MHz ARM926EJ-S RISC MPU and a 456-MHz C674x VLIW DSP, with 256KB L2 unified RAM/cache, 128KB shared RAM, and 1.8-/3.3-V LVCMOS I/Os. It targets industrial portable navigation, smart grid substation protection, and biometric identification systems requiring deterministic real-time signal processing and rich OS support.
For engineers reviewing the OMAPL138EZWTA3R datasheet, OMAPL138EZWTA3R pinout, OMAPL138EZWTA3R application, or OMAPL138EZWTA3R equivalent, key selection criteria include dual-core clock frequency (456 MHz), DDR2/mDDR memory controller support, integrated PRUSS for offloading time-critical tasks, and TI Basic Secure Boot with AES-128/SHA-256 for firmware integrity in safety-aware deployments.
Technical Context
The OMAPL138EZWTA3R implements a tightly coupled ARM926EJ-S and C674x DSP subsystem sharing memory via a 128KB dedicated RAM and configurable L2 cache partitioning. Its EDMA3 controller provides 64 independent DMA channels with programmable burst size, enabling zero-copy data movement between peripherals like McASP, McBSP, and EMAC without CPU intervention.
Peripherals are multiplexed across 361-ball PBGA pins with dedicated clock domains: USB 2.0 OTG (USB0) and USB 1.1 OHCI (USB1) each integrate PHYs; SATA I/II (1.5/3.0 Gbps) supports NCQ up to 32 entries; and the PRUSS delivers deterministic I/O control via two 32-bit RISC cores with 4KB instruction RAM and 512B data RAM per core.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Frequency | 456 MHz ARM926EJ-S and 456 MHz C674x DSP - enables simultaneous high-throughput control and floating-point signal processing at full speed under 1.3V core supply. |
| L2 Memory | 256KB unified mapped RAM/cache - configurable as RAM, cache, or hybrid; accessible by both ARM and DSP without performance penalty. |
| Shared RAM | 128KB on-chip RAM - dedicated inter-processor communication buffer, isolated from DSP L1/L2 to avoid contention during intensive FFT or filtering. |
| Memory Interfaces | DDR2/mDDR (16-bit, 256MB address space) + EMIFA (NOR/NAND/SDRAM) - supports boot from NAND and high-bandwidth streaming from DDR2 in video capture applications. |
| Security | TI Basic Secure Boot with AES-128 encryption and SHA-256 validation - protects boot image integrity; JTAG locked by default, unlocked only during authenticated secure boot flow. |
| PRUSS | Two 32-bit PRU cores with 4KB IRAM + 512B DRAM each - executes real-time I/O protocols (e.g., custom encoder interfaces or PWM synchronization) independently of ARM/DSP. |
| USB | USB 2.0 OTG (USB0) + USB 1.1 OHCI host (USB1), both with integrated PHYs - eliminates external transceivers, reducing BOM and layout complexity for field-upgradable devices. |
Pinout & Package
OMAPL138EZWTA3R is housed in a 361-ball NFBGA package (ZWT suffix) with 0.80-mm ball pitch and 16.0 mm × 16.0 mm body size. Pin assignments follow TI's OMAP-L138 ZWT mechanical drawing and functional mapping per Section 3.6–3.8 of SPRS586J.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ARM_CLKOUT | ARM subsystem clock output | Provides buffered 456-MHz reference for external logic analyzers or synchronous peripherals; phase-aligned to ARM core clock. |
| DSP_CLKOUT | DSP subsystem clock output | Delivers 456-MHz DSP clock to external ADCs or FPGAs requiring precise timing correlation with C674x processing cycles. |
| USB0_DP / USB0_DM | USB 2.0 OTG differential pair | Integrated PHY supports high/full/low-speed operation; requires only series 27-Ω resistors and ESD protection diodes for direct PCB routing. |
| EMAC_RXD[3:0] | Ethernet MAC receive data bus | 4-bit nibble interface for RMII mode; enables 10/100 Mbps MII/RMII flexibility with minimal pin count and reduced trace length vs. full MII. |
| VPIF_VD[7:0] | Video Port Interface data input | 8-bit parallel BT.656 video capture channel; supports SD video input directly from camera modules without external FIFO buffering. |
| PRU0_R30 / PRU1_R30 | PRU subsystem exported register | GPIO-like general-purpose outputs from PRU cores; used for real-time status signaling or hardware handshake with external ASICs/FPGAs. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core deterministic execution | ARM926EJ-S handles Linux-based UI and network stack while C674x runs real-time DSP algorithms (e.g., FFT, FIR) with guaranteed cycle count - no OS scheduling interference. |
| Configurable L2 memory partitioning | Allows dynamic allocation of 256KB L2 between ARM code/data, DSP code/data, and shared buffers - optimizes cache hit rate for mixed workloads without hardware changes. |
| PRUSS real-time I/O offload | Two independent PRU cores execute bit-banged protocols (e.g., SPI master for sensor arrays or custom encoder interfaces) at sub-microsecond latency, freeing ARM/DSP for higher-layer tasks. |
| Secure boot with hardware root-of-trust | AES-128 decryption and SHA-256 authentication occur in ROM before any user code executes - prevents unauthorized firmware injection even if flash memory is physically accessed. |
| Integrated SATA controller with NCQ | Hardware-assisted Native Command Queuing for up to 32 commands reduces storage I/O latency in data-logging applications where sequential write throughput must exceed 100 MB/s. |
Applications
| Industrial Portable Navigation Devices | Smart Grid Substation Protection |
|---|---|
Use Scenario: Rugged handheld units performing real-time GPS/INS fusion, map rendering, and wireless telemetry in utility field operations. IC Role / Device Role / Timing Role: OMAPL138EZWTA3R serves as main applications processor - ARM runs Linux with Qt UI and TCP/IP stack; C674x executes Kalman filter and RF interference mitigation algorithms. Use Value: Dual-core architecture enables concurrent navigation computation and encrypted cellular reporting without frame drops; 128KB shared RAM accelerates sensor data exchange between cores. | Use Scenario: Digital protective relays monitoring voltage/current waveforms and executing trip logic within 10 ms of fault detection in high-voltage substations. IC Role / Device Role / Timing Role: OMAPL138EZWTA3R acts as intelligent relay controller - PRUSS captures synchronized 16-bit ADC samples at 10 kHz; C674x performs harmonic analysis and impedance calculation; ARM validates results and logs events. Use Value: PRUSS guarantees sub-1-μs GPIO response for breaker control signals; integrated RTC with 32-kHz oscillator ensures timestamp accuracy across power cycles for event sequence recording. |
| Biometric Identification Terminals | Remote Radio Unit (RRU) Baseband Processing |
Use Scenario: Embedded fingerprint/vein scanners in access control systems requiring local template matching and anti-spoofing analysis without cloud dependency. IC Role / Device Role / Timing Role: OMAPL138EZWTA3R functions as biometric co-processor - ARM manages secure credential storage and USB HID interface; C674x runs proprietary feature extraction and liveness detection kernels. Use Value: 456-MHz C674x delivers >2 GFLOPS peak performance for real-time image warping and neural net inference; TI Basic Secure Boot prevents tampering with biometric templates stored in encrypted flash. | Use Scenario: Outdoor macrocell RRUs digitizing and pre-processing baseband IQ data before transmission to centralized BBU over CPRI. IC Role / Device Role / Timing Role: OMAPL138EZWTA3R operates as front-haul baseband engine - McASP receives 16-channel 24-bit IQ data from ADCs; C674x performs digital up/down conversion and crest factor reduction. Use Value: McASP's 16 serializers and FIFO buffers absorb jitter from RF sampling clocks; eHRPWM generates precise DAC control signals for analog front-end calibration without ARM intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core DSP+ARM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OMAPL138CZCEA3 | Same dual-core architecture and peripheral set but in 13×13 mm, 0.65-mm pitch ZCE package; rated for 375 MHz max (1.2V core). | Lower thermal envelope and smaller PCB footprint; suitable for space-constrained designs where 456 MHz performance is not required. | Select OMAPL138CZCEA3 when board area is critical and 375 MHz ARM/DSP frequency suffices for target workload. |
| AM1808BZWT4 | ARM9-only variant (no C674x DSP); identical ZWT package, pin-compatible footprint, and shared peripherals (EMAC, USB, McASP), but lacks L2 cache and PRUSS. | Cost-optimized for Linux-based control applications without intensive signal processing; cannot execute C6000 DSP libraries or run PRU firmware. | Choose AM1808BZWT4 only if application relies solely on ARM software stacks and does not require hardware-accelerated math or real-time I/O offload. |
Compared with OMAPL138CZCEA3, OMAPL138EZWTA3R delivers 21% higher compute throughput at 456 MHz and supports higher DDR2 bandwidth for video streaming; versus AM1808BZWT4, it adds full C674x DSP capability and PRUSS for deterministic edge processing - essential for closed-loop industrial control or multi-sensor fusion.
Availability
OMAPL138EZWTA3R is available at Aetrix Electronics and suitable for industrial portable navigation devices, smart grid substation protection relays, biometric identification terminals, and remote radio unit baseband processing requiring stable component supply across extended product lifecycles.
Supply support for OMAPL138EZWTA3R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, designing analog, embedded processing, and connectivity solutions for industrial, automotive, and communications markets.
The OMAP-L138 product line was engineered for low-power, high-integration applications demanding both real-time DSP performance and robust OS support - targeting industrial automation, energy infrastructure, and portable professional equipment.
FAQ
What is the maximum operating frequency of the OMAPL138EZWTA3R?
The OMAPL138EZWTA3R operates at a maximum frequency of 456 MHz for both the ARM926EJ-S core and the C674x DSP core, achieved at 1.3V core supply voltage. This frequency rating is validated across the industrial temperature range and documented in Section 3.1 of the SPRS586J datasheet. The device also supports a 375 MHz configuration at 1.2V for lower-power operation.
Does the OMAPL138EZWTA3R support secure boot functionality?
Yes, the OMAPL138EZWTA3R implements TI Basic Secure Boot using AES-128 for image decryption and SHA-256 for signature validation. Boot code is authenticated before execution from external flash, and the JTAG port remains locked until successful secure boot completion. This capability is inherent to the OMAPL138EZWTA3R silicon and requires no external security IC.
What package type and dimensions does the OMAPL138EZWTA3R use?
The OMAPL138EZWTA3R uses a 361-ball NFBGA package (ZWT suffix) with 0.80-mm ball pitch and a 16.0 mm × 16.0 mm body size. This package is specified in TI's OMAP-L138 packaging documentation (Section 8.3 of SPRS586J) and is distinct from the smaller 13×13 mm ZCE variant used in lower-frequency versions.
Can the OMAPL138EZWTA3R interface directly with DDR2 SDRAM?
Yes, the OMAPL138EZWTA3R integrates a dedicated DDR2/mDDR memory controller supporting 16-bit bus width, 256-MB address space, and data rates up to 156 MHz for DDR2. It requires no external memory controller logic and supports standard JEDEC DDR2 timing parameters as defined in Section 6.11 of the datasheet.
What development tools are officially supported for the OMAPL138EZWTA3R?
Texas Instruments provides Code Generation Tools (C/C++ compiler, assembler), DSP/BIOS Real-Time Kernel, Chip Support Library, and peripheral-specific drivers for the OMAPL138EZWTA3R. Debugging is supported via XDS100v3 or XDS200 emulators connected to the JTAG interface, with full integration into Code Composer Studio v6+ IDE.
OMAPL138EZWTA3R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Package/Case:
- 361-LFBGA
- Series:
- OMAP-L1x
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM926EJ-S
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 375MHz
- Co-Processors/DSP:
- Signal Processing; C674x, System Control; CP15
- RAM Controllers:
- SDRAM
- Graphics Acceleration:
- No
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100Mbps (1)
- SATA:
- SATA 3Gbps (1)
- USB:
- USB 1.1 + PHY (1), USB 2.0 + PHY (1)
- Voltage - I/O:
- 1.8V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- Boot Security, Cryptography
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 361-NFBGA (16x16)
- Additional Interfaces:
- HPI, I2C, McASP, McBSP, MMC/SD, SPI, UART
OMAPL138EZWTA3R FAQ
1.How can I place an order for OMAPL138EZWTA3R through Aetrix?
Please submit a Request for Quotation (RFQ) for OMAPL138EZWTA3R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OMAPL138EZWTA3R reliable?
The price and inventory of OMAPL138EZWTA3R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OMAPL138EZWTA3R is usually 5 days.
3.What payment methods are accepted for OMAPL138EZWTA3R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OMAPL138EZWTA3R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OMAPL138EZWTA3R?
OMAPL138EZWTA3R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OMAPL138EZWTA3R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OMAPL138EZWTA3R?
For technical support, including OMAPL138EZWTA3R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OMAPL138EZWTA3R requirements.
6.How does Aetrix verify that OMAPL138EZWTA3R is sourced from the original manufacturer or authorized distributors?
All OMAPL138EZWTA3R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OMAPL138EZWTA3R meets industry standards.
7.What is the process for return or replacement of OMAPL138EZWTA3R?
All OMAPL138EZWTA3R units undergo pre-shipment inspection (PSI). If there is an issue with OMAPL138EZWTA3R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OMAPL138EZWTA3R part is unused and in its original packaging.
Return procedure for OMAPL138EZWTA3R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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