Texas Instruments OMAPL138EZWTD4

Overview

OMAPL138EZWTD4 from Texas Instruments is a dual-core C6000™ DSP + ARM® SoC integrating a 456-MHz ARM926EJ-S RISC MPU and a 456-MHz C674x VLIW DSP, with 256KB L2 unified RAM/cache, 128KB shared RAM, and 1.8-V/3.3-V LVCMOS I/Os. It targets industrial automation, smart grid protection, and remote radio units requiring deterministic real-time processing and rich peripheral integration.

For engineers reviewing the OMAPL138EZWTD4 datasheet, OMAPL138EZWTD4 pinout, OMAPL138EZWTD4 application, or OMAPL138EZWTD4 equivalent, key selection criteria include dual-core clock synchronization, DDR2/mDDR memory controller support, secure boot (AES-128/SHA-256), and peripheral concurrency across EMAC, USB2.0 OTG, SATA, McASP, and PRUSS.

Technical Context

The OMAPL138EZWTD4 implements tightly coupled ARM926EJ-S and C674x cores sharing a 128KB dedicated SRAM and accessing a unified 256KB L2 memory space configurable as RAM/cache. Its EDMA3 subsystem features two channel controllers and 64 independent DMA channels for concurrent data movement between peripherals including EMAC, McASP, McBSP, and uPP.

Peripheral coexistence is managed via pin multiplexing and power domains: the PRUSS provides two 32-bit RISC coprocessors with 4KB instruction RAM each, while the DDR2/mDDR controller supports 16-bit bus width at up to 156 MHz, and the SATA controller handles 1.5/3.0 Gbps with hardware-assisted NCQ for up to 32 entries.

Key Specifications

Pinout & Package

OMAPL138EZWTD4 is housed in a 361-ball NFBGA package (ZWT suffix) with 0.80-mm ball pitch and 16.0 mm × 16.0 mm body size. Pin assignments follow TI's standardized OMAP-L138 ball map, supporting full peripheral concurrency under defined multiplexing rules.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core DSP+ARM applications.

Compared with OMAPL138EZWTD4, OMAPL138CZCEA trades peak compute for lower power and smaller footprint, while AM1808BZWT4 removes DSP capability entirely to reduce cost and BOM count-neither is pin-compatible, and both require PCB redesign due to differing ball maps and power delivery requirements.

Availability

OMAPL138EZWTD4 is available at Aetrix Electronics and suitable for industrial automation PLCs, smart grid substation relays, and remote radio head designs requiring stable component supply across extended product lifecycles.

Supply support for OMAPL138EZWTD4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, and communications markets since 1930.

The OMAP-L138 product line was engineered for cost-sensitive, power-efficient industrial and communications edge devices requiring heterogeneous processing-combining ARM application control with C6000 DSP signal processing in a single-package SoC.

FAQ

What is the maximum operating frequency of the OMAPL138EZWTD4?

The OMAPL138EZWTD4 operates at a maximum frequency of 456 MHz for both the ARM926EJ-S core and the C674x DSP core. This speed is achieved at a core supply voltage of 1.3 V, as specified in the recommended operating conditions. The device also supports a 375-MHz configuration at 1.2 V for lower-power applications. Frequency selection is determined by hardware configuration and voltage regulation, not runtime software control.

Does the OMAPL138EZWTD4 support secure boot, and what cryptographic algorithms does it use?

Yes, the OMAPL138EZWTD4 implements TI Basic Secure Boot using AES-128 for boot image encryption and SHA-256 for image authentication. The secure boot flow starts from a hardware root-of-trust, validates the encrypted image before loading, and locks the JTAG port by default to prevent debug attacks. This capability is inherent to the OMAPL138EZWTD4 silicon and requires no external secure element.

What memory interfaces are supported by the OMAPL138EZWTD4, and what are their address spaces?

The OMAPL138EZWTD4 supports two external memory interfaces: EMIFA (for NOR/NAND flash and 16-bit SDRAM with 128-MB address space) and a DDR2/mDDR controller (for 16-bit DDR2 or mobile DDR SDRAM with 256-MB address space). It also integrates 256KB of unified L2 RAM/cache and 128KB of dedicated shared RAM, all accessible by both ARM and DSP cores without arbitration delay.

How many USB interfaces does the OMAPL138EZWTD4 include, and what are their roles?

The OMAPL138EZWTD4 integrates two USB interfaces: USB0 is a USB 2.0 On-The-Go (OTG) controller with integrated PHY supporting high/full/low-speed device and host modes; USB1 is a USB 1.1 Open Host Controller Interface (OHCI) host controller with integrated PHY for full-speed peripheral attachment. Both interfaces operate independently and can be used simultaneously-for example, USB0 as a device for host PC connection and USB1 as a host for USB flash drives.

Is the OMAPL138EZWTD4 pin-compatible with other OMAP-L138 variants such as OMAPL138ZCE or OMAPL138ZWT?

No, the OMAPL138EZWTD4 is not pin-compatible with OMAPL138ZCE or OMAPL138ZWT. While all share the same 361-ball NFBGA footprint, the ZCE package uses 0.65-mm pitch and 13×13 mm body size, whereas OMAPL138EZWTD4 uses the ZWT package with 0.80-mm pitch and 16×16 mm body size. Ball mapping differs between ZCE and ZWT, requiring distinct PCB layouts and power delivery networks.