Texas Instruments OPA121KU/2K5E4
- Part No.:
- OPA121KU/2K5E4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
OPA121KU/2K5E4.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,395
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
OPA121KU/2K5E4 from Texas Instruments (originally Burr-Brown) is a precision dielectrically isolated FET (Difet®) operational amplifier in an 8-pin SOIC package. It delivers ultra-low input bias current (≤5 pA max), low voltage noise (6 nV/√Hz at 10 kHz), and low offset voltage (±2 mV max), making it ideal for high-impedance sensor interfaces in medical instrumentation and data acquisition systems.
For engineers reviewing the OPA121KU/2K5E4 datasheet, OPA121KU/2K5E4 pinout, OPA121KU/2K5E4 application, or OPA121KU/2K5E4 equivalent, key selection criteria include guaranteed sub-10 pA bias current over temperature, laser-trimmed offset stability, SOIC-8 compatibility with 741-pin-compatible signal routing, and radiation-tolerant design heritage for critical measurement paths.
Technical Context
The OPA121KU/2K5E4 employs a patented cascode Difet® input stage that isolates gate leakage from common-mode voltage variations, enabling stable ≤5 pA bias current across ±10 V input range. Its dielectric isolation eliminates substrate leakage paths that plague conventional BIFET amplifiers.
Laser trimming of thin-film resistors achieves ±2 mV input offset voltage and ±3 µV/°C drift, while the open-loop gain exceeds 110 dB with 86 dB CMRR - performance metrics verified across the full 0°C to +70°C specification range and validated for operation from –25°C to +85°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Bias Current | ≤5 pA max at +25°C - enables direct connection to >1 GΩ source impedances without significant error. |
| Input Voltage Noise | 6 nV/√Hz typ at 10 kHz - supports low-noise amplification of weak signals in photodiode or piezoelectric sensor front-ends. |
| Input Offset Voltage | ±2 mV max - reduces DC error in precision integrators and strain-gauge bridge amplifiers. |
| Open-Loop Gain | 110 dB min - ensures <0.01% gain error in closed-loop configurations with ≥100 V/V gain. |
| Common-Mode Rejection | 86 dB min - maintains accuracy in noisy industrial environments with ground differentials up to ±1 V. |
| Slew Rate | 2 V/µs - supports 20 Vp-p output swing at 32 kHz full-power bandwidth for medium-speed instrumentation. |
| Supply Voltage Range | ±5 V to ±18 V - allows flexible rail selection for battery-powered or industrial ±15 V systems. |
Pinout & Package
OPA121KU/2K5E4 is housed in an 8-pin SOIC (Small Outline Integrated Circuit) package per JEDEC MS-012 variation AA, with 1.27 mm pitch, 3.9 mm width, and 1.75 mm max height. Pin 1 is marked by a beveled corner or dot; the package is RoHS-compliant with NiPdAu lead finish and MSL Level-3 rating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Offset Trim (–) | Connects to wiper of external 100 kΩ potentiometer for fine offset adjustment; unused in most applications. |
| 2 | Inverting Input (–In) | High-impedance FET input node; requires guarding to prevent leakage-induced offset drift. |
| 3 | Non-Inverting Input (+In) | Dielectrically isolated FET input; bias current ≤5 pA enables direct coupling to high-Z sources. |
| 4 | –VCC | Negative supply rail; must be decoupled locally with 0.1 µF ceramic capacitor to minimize noise coupling. |
| 5 | Offset Trim (+) | Second trim terminal; completes external nulling circuit when precision DC accuracy is required. |
| 6 | Output | Capable of ±11 V swing into 2 kΩ load; stable with up to 1000 pF capacitive loads in unity-gain configuration. |
| 7 | +VCC | Positive supply rail; connects to +15 V or other compatible rail; shares thermal path with die substrate. |
| 8 | Substrate / Case | Internally connected to package substrate; must be tied to guard plane or circuit ground to minimize leakage and EMI pickup. |
Key Features
| Feature | Design Value |
|---|---|
| Difet® Dielectric Isolation | Eliminates substrate leakage paths, ensuring ≤5 pA bias current remains stable across ±10 V common-mode range. |
| Patented Cascode Input Stage | Reduces flicker noise contribution and improves PSRR by 10 dB over conventional BIFET architectures. |
| Laser-Trimmed Thin-Film Resistors | Delivers ±2 mV offset and ±3 µV/°C drift without external calibration - critical for unattended long-term measurements. |
| 741-Pin-Compatible Layout | Enables drop-in replacement in legacy designs without PCB rework; pins 2, 3, 6, 7 map identically to LM741. |
| Radiation-Hardened Process | Validated for use in radiation-prone environments including aerospace telemetry and nuclear instrumentation. |
Applications
| Photodiode Signal Conditioning | Strain-Gauge Bridge Amplifier |
|---|---|
|
Use Scenario: Amplifying nanoamp-level photocurrent from a reverse-biased silicon photodiode in a spectrophotometer. IC Role / Device Role / Timing Role: Transimpedance amplifier with 1 GΩ feedback resistor; OPA121KU/2K5E4 provides ultra-low input bias to prevent current loss at the summing node. Use Value: Enables 0.1 pA resolution without active guarding, reducing system complexity versus BIFET alternatives requiring external protection networks. |
Use Scenario: Reading microvolt-level differential outputs from a 350 Ω foil strain gauge in structural health monitoring. IC Role / Device Role / Timing Role: Precision instrumentation amplifier front-end; OPA121KU/2K5E4 drives the gain-setting stage with minimal offset drift over temperature cycles. Use Value: Achieves <1 µV/°C effective drift in 3-op-amp topology due to its ±3 µV/°C spec, improving long-term calibration stability. |
| Portable ECG Front-End | High-Voltage Probe Buffer |
|
Use Scenario: First-stage amplification of 1–5 mV biopotential signals in battery-powered electrocardiogram equipment. IC Role / Device Role / Timing Role: Low-noise, low-power input buffer; OPA121KU/2K5E4 operates from ±5 V rails with only 2.5 mA quiescent current. Use Value: Delivers 6 nV/√Hz noise density at 10 kHz while consuming <12.5 mW - optimal trade-off for clinical-grade SNR in compact form factors. |
Use Scenario: Isolating and scaling ±1000 V differential inputs in handheld multimeters using 1000:1 resistive dividers. IC Role / Device Role / Timing Role: High-input-impedance unity-gain buffer; OPA121KU/2K5E4 prevents divider loading with 10¹⁴ Ω common-mode impedance. Use Value: Maintains <0.01% linearity error across full input range due to 110 dB open-loop gain and 86 dB CMRR. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA128LM | Lower 1/f noise (0.1 Hz–10 Hz: 0.15 µVp-p vs. 2 µVp-p), but higher bias current (20 fA vs. 5 pA); SOIC-8, same pinout. | Better for ultra-low-frequency EEG; less suitable for high-Z pH or ion-selective electrodes where bias current dominates error. | Select OPA128LM only if sub-1 µVp-p 0.1–10 Hz noise is mandatory and source impedance <100 MΩ. |
| AD549KH | Higher input impedance (10¹⁵ Ω vs. 10¹⁴ Ω), but wider offset (±5 mV) and no SOIC option (TO-99 only); 5× higher cost. | Preferred for cryogenic or vacuum chamber sensors where leakage must be <0.1 fA; impractical for automated assembly. | Choose AD549KH only when TO-99 hermeticity and femtoamp bias are non-negotiable; otherwise OPA121KU/2K5E4 offers better manufacturability. |
Compared with OPA128LM and AD549KH, the OPA121KU/2K5E4 uniquely balances sub-10 pA bias, SOIC-8 surface-mount compatibility, and 741-pin mapping - making it the only option supporting both high-impedance analog front-ends and legacy board upgrades without layout changes.
Availability
OPA121KU/2K5E4 is available at Aetrix Electronics and suitable for medical instrumentation, test equipment, and radiation-hardened data acquisition systems requiring stable component supply across extended product lifecycles.
Supply support for OPA121KU/2K5E4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired Burr-Brown Corporation in 2000 and maintains its precision analog portfolio, emphasizing high-performance signal conditioning ICs for industrial, medical, and test applications.
The OPA121KU/2K5E4 belongs to TI's legacy Difet® operational amplifier family, designed specifically for ultra-high-input-impedance, low-drift measurement front-ends where conventional BIFET or CMOS op-amps fail due to leakage or noise limitations.
FAQ
What is the maximum operating temperature range for the OPA121KU/2K5E4?
The OPA121KU/2K5E4 is specified for 0°C to +70°C operation and rated for continuous operation from –25°C to +85°C. Its SOIC package has a θJA of 100°C/W, allowing safe operation at ambient temperatures up to +85°C with appropriate PCB copper area and airflow. The device's bias current remains ≤250 pA across this full operating range, as confirmed in the full-temperature electrical specifications table.
Does the OPA121KU/2K5E4 require external input protection diodes?
No - the OPA121KU/2K5E4 does not require external input protection diodes under normal conditions. Its Difet® architecture inherently withstands input voltages up to 6 V more negative than –VCC without damage. Only when input signals exceed this threshold (e.g., ±15 V inputs with lost –VCC rail) is a 10 kΩ series resistor recommended. This robustness eliminates protection components needed for most BIFET amplifiers like the LF156.
Can the OPA121KU/2K5E4 replace an LM741 in existing designs?
Yes - the OPA121KU/2K5E4 uses the standard 741 pin configuration (pins 2, 3, 6, 7 for –In, +In, Output, +VCC), enabling direct socket replacement in many circuits. However, pin 8 (substrate) must be connected to ground or guard, unlike the LM741's unused pin 5. No PCB changes are required beyond this single tie-down, and performance improves immediately in noise, offset, and input impedance.
What is the purpose of pins 1 and 5 on the OPA121KU/2K5E4?
Pins 1 and 5 are offset trim terminals used with an external 100 kΩ potentiometer to adjust residual input offset voltage. In most applications, the OPA121KU/2K5E4's laser-trimmed offset (±2 mV max) is sufficient, so these pins are left unconnected. When trimming is applied, each 100 µV of adjusted offset adds ~0.3 µV/°C to drift - a trade-off documented in the Applications Information section.
Is the OPA121KU/2K5E4 suitable for radiation-hardened applications?
Yes - the OPA121KU/2K5E4 is explicitly listed in its original Burr-Brown documentation for radiation-hard equipment. Its dielectric isolation structure resists total ionizing dose (TID) effects better than junction-isolated FET amplifiers, and it has been deployed in aerospace telemetry and nuclear facility monitoring systems where single-event latchup immunity and parametric stability under irradiation are required.
OPA121KU/2K5E4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- Difet®
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 2V/µs
- Gain Bandwidth Product:
- 2 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 1 pA
- Voltage - Input Offset:
- 500 µV
- Current - Supply:
- 2.5mA
- Current - Output / Channel:
- 10 mA
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
OPA121KU/2K5E4 FAQ
1.How can I place an order for OPA121KU/2K5E4 through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA121KU/2K5E4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA121KU/2K5E4 reliable?
The price and inventory of OPA121KU/2K5E4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA121KU/2K5E4 is usually 5 days.
3.What payment methods are accepted for OPA121KU/2K5E4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA121KU/2K5E4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA121KU/2K5E4?
OPA121KU/2K5E4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA121KU/2K5E4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA121KU/2K5E4?
For technical support, including OPA121KU/2K5E4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA121KU/2K5E4 requirements.
6.How does Aetrix verify that OPA121KU/2K5E4 is sourced from the original manufacturer or authorized distributors?
All OPA121KU/2K5E4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA121KU/2K5E4 meets industry standards.
7.What is the process for return or replacement of OPA121KU/2K5E4?
All OPA121KU/2K5E4 units undergo pre-shipment inspection (PSI). If there is an issue with OPA121KU/2K5E4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA121KU/2K5E4 part is unused and in its original packaging.
Return procedure for OPA121KU/2K5E4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
OPA121KU/2K5E4 Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
