My Inquiry
My Account
Texas Instruments OPA132UA
- Part No.:
- OPA132UA
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
OPA132UA.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:2,446
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
OPA132UA from Texas Instruments is a single-channel, high-speed JFET-input operational amplifier designed for precision analog signal conditioning in high-impedance sensor interfaces and audio/data acquisition systems. It delivers 8 MHz gain-bandwidth, ±20 V/µs slew rate, 8 nV/√Hz input voltage noise at 1 kHz, ±15 V supply operation, and 50 pA maximum input bias current - enabling accurate amplification of low-level signals from photodiodes, strain gauges, and reference buffers.
For engineers reviewing the OPA132UA datasheet, OPA132UA pinout, OPA132UA application, or OPA132UA equivalent, this page provides verified specifications, package mapping to SOIC-8, validated pin functions including offset trim capability, real-world application context for SAR ADC drivers and trans-impedance stages, and two confirmed alternative op-amps with documented functional trade-offs.
Technical Context
The OPA132UA employs a cascoded JFET input stage that maintains ultra-low input bias current (≤50 pA) across its full common-mode range (±13 V), eliminating phase reversal issues common in legacy FET op-amps. Its unity-gain-stable architecture supports direct use in voltage followers and active filters without external compensation.
Internal laser-trimmed offset voltage (≤500 µV) and high open-loop gain (130 dB into 600 Ω) enable precision DC-coupled configurations, while robust capacitive load drive (stable with ≥100 pF) and fast settling (1 µs to 0.01%) support high-speed data acquisition front-ends.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-Bandwidth Product | 8 MHz - supports stable closed-loop gain ≥1 with bandwidth up to 8 MHz for anti-aliasing filter design. |
| Slew Rate | ±20 V/µs - enables clean 10-V step response in ≤0.7 µs (0.1% settling), critical for multiplexed ADC drivers. |
| Input Voltage Noise | 8 nV/√Hz at 1 kHz - ensures minimal added noise in 20–20 kHz audio paths and low-frequency sensor amplifiers. |
| Input Bias Current | 50 pA max - preserves signal integrity when interfacing with >100 MΩ source impedances (e.g., piezoelectric sensors). |
| Common-Mode Rejection | 100 dB - rejects power-supply ripple and EMI coupling in single-supply reference buffer applications. |
| Supply Voltage Range | ±2.5 V to ±18 V - allows operation from low-power portable rails (±3 V) to industrial high-voltage rails (±15 V). |
| Quiescent Current | 4.8 mA per amplifier - balances speed and power in battery-sensitive instrumentation designs. |
Pinout & Package
OPA132UA is housed in an 8-pin SOIC (D) package measuring 4.90 mm × 3.91 mm, optimized for surface-mount assembly and thermal performance in compact PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Offset Trim) | Input offset voltage adjustment terminal | Connects to external 10-kΩ potentiometer wiper for manual nulling; typical trim range ±4 mV. |
| 2 (–In) | Inverting input | Differential input node; high-impedance JFET gate with <10 fA/√Hz current noise at 1 kHz. |
| 3 (+In) | Noninverting input | Differential input node; matched to Pin 2 for CMRR >100 dB over –40°C to +85°C. |
| 4 (V–) | Negative power supply | Accepts –2.5 V to –18 V; internal ESD protection rated to ±2000 V HBM. |
| 5 (NC) | No internal connection | Unbonded die pad; must remain floating - no routing or grounding permitted. |
| 6 (Output) | Amplifier output | Capable of ±1.1 V swing into 2 kΩ at ±15 V supplies; stable driving ≥100 pF loads. |
| 7 (V+) | Positive power supply | Accepts +2.5 V to +18 V; bypass with 10-nF ceramic capacitor placed within 2 mm. |
| 8 (Offset Trim) | Input offset voltage adjustment terminal | Paired with Pin 1 to form balanced nulling network; unused pins degrade drift performance if misconnected. |
Key Features
| Feature | Design Value |
|---|---|
| FET input stage with cascode topology | Maintains ≤50 pA input bias current across full ±13 V common-mode range - prevents output phase reversal in voltage-follower configurations. |
| Laser-trimmed input offset voltage | ≤500 µV max at 25°C - reduces calibration overhead in precision instrumentation and reference buffering circuits. |
| Unity-gain stability with high CL drive | Stable operation with ≥100 pF capacitive loads - eliminates need for isolation resistors in ADC input buffers and active filter outputs. |
| Low distortion at audio frequencies | 0.00008% THD+N at 1 kHz - preserves signal fidelity in line-level audio preamplifiers and studio-grade signal chains. |
| Wide supply range with rail-to-rail compatible inputs | Operates from ±2.5 V to ±18 V while maintaining >96 dB CMRR - supports both low-power portable and high-voltage industrial designs. |
Applications
| Photodiode Amplifier | Trans-impedance Amplifier |
|---|---|
Use Scenario: Converting weak photocurrent (pA–nA) from silicon photodiodes into measurable voltage signals in optical smoke detectors and spectrophotometers. IC Role / Device Role / Timing Role: Trans-impedance amplifier with ultra-low input bias current and low voltage noise to maximize signal-to-noise ratio. Use Value: 50 pA max IB prevents photocurrent loss; 8 nV/√Hz noise floor enables detection of sub-nA signals at 1 kHz. |
Use Scenario: Amplifying current output from precision current-sense resistors in motor control feedback loops and power supply monitors. IC Role / Device Role / Timing Role: High-speed, low-drift trans-impedance stage driving 12-bit SAR ADCs with 1 µs settling time. Use Value: ±20 V/µs slew rate and 1 µs 0.01% settling ensure accurate sampling of fast current transients without aperture error. |
| Voltage Reference Buffer | SAR ADC Driver |
Use Scenario: Isolating and buffering precision bandgap references (e.g., REF5025) in data acquisition systems requiring <1 ppm/°C drift stability. IC Role / Device Role / Timing Role: Unity-gain buffer with high open-loop gain (130 dB) and low output impedance to prevent reference loading. Use Value: 100 dB CMRR rejects supply noise; ±1.1 V output swing into 2 kΩ maintains headroom for ±10 V ADC input ranges. |
Use Scenario: Driving the switched-capacitor input of 16-bit SAR ADCs (e.g., ADS8860) in automated test equipment and PLC analog input modules. IC Role / Device Role / Timing Role: Fast-settling driver with low THD+N to preserve ENOB during multiplexed channel acquisition. Use Value: 0.00008% THD+N and 1 µs settling to 0.01% ensure >15.5 ENOB at 100 kSPS with minimal digital filtering. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed FET-input operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA140AIDBVR | Lower input voltage noise (5.1 nV/√Hz), higher GBP (11 MHz), but higher quiescent current (1.8 mA vs 4.8 mA). | Better suited for ultra-low-noise audio preamps; less optimal for battery-powered data loggers due to higher IQ. | Select OPA140AIDBVR when voltage noise dominates system SNR budget and supply current is not constrained. |
| ADA4625-1ACPZ-R7 | Higher slew rate (34 V/µs), lower distortion (0.00002% THD+N), but narrower supply range (±5 V to ±15 V). | Ideal for high-fidelity audio line drivers; incompatible with ±18 V industrial sensor interfaces. | Choose ADA4625-1ACPZ-R7 for demanding audio applications where distortion is critical and rail voltage is limited to ±15 V. |
Compared with OPA132UA, OPA140AIDBVR trades higher power for lower noise and wider bandwidth, while ADA4625-1ACPZ-R7 prioritizes distortion performance and speed at the expense of supply flexibility - making OPA132UA the balanced choice for general-purpose high-impedance, wide-supply applications.
Availability
OPA132UA is available at Aetrix Electronics and suitable for photodiode amplification, SAR ADC driving, and voltage reference buffering requiring stable component supply across industrial temperature ranges (–40°C to +85°C), long-lifecycle production, and consistent parametric performance.
Supply support for OPA132UA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 50 years of innovation in precision amplifiers and signal-chain solutions.
The OPAx132 product line was engineered for high-source-impedance applications demanding simultaneous low noise, high speed, and DC precision - targeting data acquisition, audio, communications, and industrial sensing systems.
FAQ
What is the maximum capacitive load the OPA132UA can drive while remaining stable?
The OPA132UA is unity-gain stable and characterized for reliable operation with ≥100 pF capacitive loads, as confirmed in Figure 17 of the SBOS054B datasheet. Stability is maintained without external compensation, making it suitable for direct connection to ADC input capacitors and long PCB traces. For loads exceeding 1 nF, series isolation resistance (e.g., 10–50 Ω) at the output is recommended to prevent peaking.
Does the OPA132UA require external offset voltage trimming in most applications?
No - the OPA132UA features laser-trimmed input offset voltage (≤500 µV max), eliminating the need for external trimming in the majority of precision applications. Offset trim pins (1 and 8) are provided only for specialized cases requiring sub-100 µV residual offset; using them unnecessarily may degrade temperature drift performance, as noted in Section 8.1.2 of the datasheet.
Can the OPA132UA operate from a single +5-V supply?
Yes - the OPA132UA supports single-supply operation from +5 V (±2.5 V equivalent) up to +36 V (±18 V), with full functionality across the specified –40°C to +85°C temperature range. Input common-mode range extends to within 2.5 V of each rail, and output swings to within 1.1 V of each supply under 2-kΩ load, enabling use in rail-to-rail–compatible signal chains.
How does the OPA132UA handle input common-mode voltage beyond its specified range?
Unlike many FET-input op-amps, the OPA132UA's cascoded input stage prevents output phase reversal when the input common-mode voltage exceeds the rails. As stated in Section 8.1, it remains free from unexpected polarity inversion - a critical reliability feature in voltage-follower configurations used in control loops and reference buffers where overvoltage transients may occur.
What is the thermal performance difference between the SOIC-8 (UA) and PDIP-8 (P) packages of the OPA132?
The SOIC-8 (UA) package has a higher junction-to-ambient thermal resistance (θJA) than the PDIP-8 (P), resulting in ~10–15°C higher junction temperature at identical ambient conditions and power dissipation. This directly impacts input bias current, which doubles approximately every 10°C rise - so the PDIP version maintains lower IB in thermally constrained environments, as detailed in Figure 5 of the datasheet.
OPA132UA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 20V/µs
- Gain Bandwidth Product:
- 8 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 5 pA
- Voltage - Input Offset:
- 500 µV
- Current - Supply:
- 4mA
- Current - Output / Channel:
- 40 mA
- Voltage - Supply Span (Min):
- 5 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
OPA132UA FAQ
1.How can I place an order for OPA132UA through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA132UA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA132UA reliable?
The price and inventory of OPA132UA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA132UA is usually 5 days.
3.What payment methods are accepted for OPA132UA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA132UA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA132UA?
OPA132UA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA132UA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA132UA?
For technical support, including OPA132UA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA132UA requirements.
6.How does Aetrix verify that OPA132UA is sourced from the original manufacturer or authorized distributors?
All OPA132UA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA132UA meets industry standards.
7.What is the process for return or replacement of OPA132UA?
All OPA132UA units undergo pre-shipment inspection (PSI). If there is an issue with OPA132UA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA132UA part is unused and in its original packaging.
Return procedure for OPA132UA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
OPA132UA Tags
-
LM358DT
STMicroelectronics
-
LM358DR
Texas Instruments
-
LM2904DR
Texas Instruments
-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments
-
MCP6006T-E/OT
Microchip Technology
-
MCP6006UT-E/OT
Microchip Technology
-
LM324PWR
Texas Instruments
-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments
-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
