Texas Instruments OPA2130UAG4
- Part No.:
- OPA2130UAG4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
OPA2130UAG4.pdf
- Description:
- IC OPAMP JFET 2 CIRCUIT 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,220
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
OPA2130UAG4 from Texas Instruments is a dual, precision FET-input operational amplifier optimized for low-power, high-impedance signal conditioning in battery-powered and portable instrumentation. It delivers 1 MHz gain-bandwidth, 530 µA/amp quiescent current, ±1 mV max input offset voltage, and 90 dB min CMRR across –40°C to +85°C - enabling accurate sensor interfacing in handheld medical devices and data acquisition systems.
For engineers reviewing the OPA2130UAG4 datasheet, OPA2130UAG4 pinout, OPA2130UAG4 application, or OPA2130UAG4 equivalent, key selection criteria include its FET-input bias current (≤20 pA), unity-gain stability with ≥10 nF capacitive load drive, and independence between channels for low crosstalk in dual-channel analog front-ends.
Technical Context
The OPA2130UAG4 employs a cascoded FET input stage that maintains ultra-low input bias current (<20 pA) over its full common-mode range (±13 V), eliminating phase reversal under overvoltage conditions - a critical reliability feature absent in many legacy FET op amps. Its internal compensation ensures unity-gain stability without external components.
Each amplifier operates independently within the SOIC-8 package, with no shared substrate or bias networks; this architecture achieves <0.3 µV/V channel separation and prevents interaction during overload or short-circuit events on one channel.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Quiescent Current | 530 µA per amplifier - enables multi-channel operation on coin-cell or single-Li-ion supplies without compromising battery life. |
| Input Offset Voltage | ±1 mV max - supports DC-coupled precision measurement of sub-10 mV sensor outputs without calibration overhead. |
| Common-Mode Rejection | 90 dB min - rejects noise from unshielded cables or noisy power rails in industrial sensor nodes. |
| Gain-Bandwidth Product | 1 MHz - sufficient for anti-aliasing filtering at ≤100 kHz sampling rates in 16-bit SAR ADC front-ends. |
| Input Bias Current | 20 pA max - preserves signal integrity when amplifying from high-impedance sources like pH electrodes or piezoelectric sensors. |
| Capacitive Load Drive | Stable with ≥10 nF - allows direct driving of ADC input capacitance or long PCB traces without isolation resistors. |
| Supply Voltage Range | ±2.25 V to ±18 V - supports operation from low-voltage portable rails (±3 V) up to industrial ±15 V systems. |
Pinout & Package
OPA2130UAG4 is housed in an industry-standard SOIC-8 (D) package, 3.91 mm × 4.90 mm × 1.75 mm, RoHS-compliant with NiPdAu lead finish and JEDEC MSL Level-3 rating.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Out A | Amplifier A output - directly interfaces with downstream ADC input or active filter stage. |
| 2 | –In A | Inverting input of Amplifier A - used for transimpedance or inverting gain configurations. |
| 3 | +In A | Non-inverting input of Amplifier A - connects to high-impedance sensor or reference divider network. |
| 4 | V– | Negative supply rail - must be bypassed with ≥10 nF ceramic capacitor near pin for PSR stability. |
| 5 | +In B | Non-inverting input of Amplifier B - electrically isolated from Amplifier A; enables independent dual-channel design. |
| 6 | –In B | Inverting input of Amplifier B - no coupling or crosstalk with Amplifier A inputs or outputs. |
| 7 | Out B | Amplifier B output - supports simultaneous signal conditioning of two sensors without shared error sources. |
| 8 | V+ | Positive supply rail - accepts symmetric or asymmetric supplies; decoupling required per TI layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| No phase reversal | Eliminates catastrophic output inversion when input exceeds common-mode limits - essential for voltage-follower sensor buffers. |
| FET input cascode | Maintains ≤20 pA input bias current across full ±13 V common-mode range - preserves accuracy in high-Z source applications. |
| Independent dual amplifiers | Zero shared circuitry between channels - guarantees <–120 dB crosstalk and fault containment during overload. |
| Unity-gain stable | Operates without external compensation at G = 1 - simplifies design of precision gain stages and active filters. |
| Laser-trimmed offset | ±1 mV max input offset - reduces system-level calibration burden in portable medical and test equipment. |
Applications
| Portable ECG Front-End | High-Impedance pH Sensor Interface |
|---|---|
|
Use Scenario: Amplifying microvolt-level biopotential signals from dry electrodes in battery-powered wearable ECG monitors. IC Role / Device Role / Timing Role: Dual-channel instrumentation amplifier front-end - one channel for lead I, second for lead II - with matched dc performance and low noise. Use Value: 530 µA/amp quiescent current extends battery life beyond 72 hours; 20 pA input bias avoids electrode polarization errors. |
Use Scenario: Conditioning output from glass pH electrodes in handheld water quality testers. IC Role / Device Role / Timing Role: High-input-impedance buffer and level-shifting stage before 24-bit delta-sigma ADC. Use Value: FET input preserves electrode signal integrity; ±1 mV offset ensures ±0.02 pH accuracy without factory recalibration. |
| Multi-Channel Data Logger | Low-Power Strain Gauge Signal Chain |
|
Use Scenario: Simultaneous acquisition of temperature, humidity, and ambient light in IoT environmental nodes. IC Role / Device Role / Timing Role: Dual op amp providing rail-to-rail input buffering and programmable gain for multiple sensor types. Use Value: Independent channels allow concurrent sampling without inter-channel interference; 1 MHz bandwidth supports fast transient capture. |
Use Scenario: Amplifying Wheatstone bridge outputs from micro-strain gauges in structural health monitoring sensors. IC Role / Device Role / Timing Role: Precision inverting amplifier with gain of 1000 for bridge excitation at 3.3 V. Use Value: 90 dB CMRR rejects common-mode noise from shared bridge excitation; low IQ enables solar-charged operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision FET-input op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2132UA | Lower input bias current (1 pA typ vs 20 pA max), higher GBW (4 MHz), but higher IQ (1.3 mA/amp). | Better for femtoamp-level photodiode current sensing; less suitable for ultra-low-power portable use. | Select OPA2132UA only if sub-pA bias and >1 MHz bandwidth are mandatory and power budget allows +140% IQ increase. |
| ADA4625-2 | Higher slew rate (34 V/µs), lower noise (2.9 nV/√Hz), but wider supply range (±4.5 V to ±18 V) and higher IQ (1.8 mA/amp). | Preferred for high-speed precision applications like active filter tuning; not optimized for sub-1 mA total system current. | Choose ADA4625-2 when dynamic performance outweighs battery life - e.g., portable oscilloscope front-ends. |
Compared with OPA2130UAG4, OPA2132UA trades 2.5× higher quiescent current for 4× bandwidth and 20× lower input bias current, while ADA4625-2 doubles noise performance and slew rate at 3.4× the power - making OPA2130UAG4 the optimal balance for precision, low-power, dual-channel signal conditioning.
Availability
OPA2130UAG4 is available at Aetrix Electronics and suitable for portable medical devices, battery-powered data loggers, and high-impedance sensor interfaces requiring stable component supply across extended production lifecycles.
Supply support for OPA2130UAG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in precision op amp design and manufacturing excellence.
The OPA2130UAG4 belongs to TI's OPA130 family of low-power FET-input op amps, engineered specifically for portable, battery-operated instrumentation where precision, low IQ, and input-stage robustness are co-primary requirements.
FAQ
What is the maximum capacitive load the OPA2130UAG4 can drive while remaining stable?
The OPA2130UAG4 is specified for stable operation with capacitive loads up to 10 nF without external compensation. This capability enables direct connection to typical ADC input capacitances (e.g., 10–20 pF) and long PCB traces without series isolation resistors. Stability is maintained across the full operating temperature range (–40°C to +85°C) and supply voltages (±2.25 V to ±18 V), as verified in the SBOS053A datasheet Figure 13 and Table 1.
Does the OPA2130UAG4 require external offset trim connections?
No, the OPA2130UAG4 does not provide offset trim pins - unlike the single-channel OPA130, which includes dedicated offset adjust terminals (pins 1 and 5). The OPA2130UAG4 uses laser trimming to achieve ±1 mV max input offset voltage, eliminating the need for user adjustment. This simplifies PCB layout and improves long-term drift stability compared to manually trimmed solutions.
How does the OPA2130UAG4 prevent phase reversal in overvoltage conditions?
The OPA2130UAG4 incorporates input cascode circuitry that maintains stable biasing of the FET input stage across its full common-mode voltage range (±13 V), preventing the input stage from saturating and causing output polarity inversion. This eliminates a known failure mode in conventional FET op amps - especially critical in voltage-follower configurations used with high-impedance sensors where input overvoltage may occur during power-up or transient events.
Is the OPA2130UAG4 pin-compatible with other dual op amps in SOIC-8 packages?
The OPA2130UAG4 follows the standard dual op amp pinout (V–, Out A, –In A, +In A, +In B, –In B, Out B, V+) defined in TI's D-package drawing, matching industry conventions such as the LM358 and TL072. However, it is not a drop-in replacement for those parts due to differences in input stage topology (FET vs bipolar/JFET), bias current, and noise performance - system-level validation is required before substitution.
What is the thermal resistance (θJA) of the OPA2130UAG4 in its SOIC-8 package?
The OPA2130UAG4 in the SOIC-8 (D) package has a junction-to-ambient thermal resistance (θJA) of 150°C/W, as specified in the SBOS053A datasheet Table 1. This value assumes standard JEDEC 2-layer board conditions (1-inch² copper pad, 2 oz Cu). For continuous operation at maximum ambient temperature (+85°C), power dissipation should be limited to ≤100 mW per amplifier to maintain junction temperature below 150°C.
OPA2130UAG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 2V/µs
- Gain Bandwidth Product:
- 1 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 5 pA
- Voltage - Input Offset:
- 200 µV
- Current - Supply:
- 530µA (x2 Channels)
- Current - Output / Channel:
- 18 mA
- Voltage - Supply Span (Min):
- 4.5 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
OPA2130UAG4 FAQ
1.How can I place an order for OPA2130UAG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2130UAG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2130UAG4 reliable?
The price and inventory of OPA2130UAG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2130UAG4 is usually 5 days.
3.What payment methods are accepted for OPA2130UAG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2130UAG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2130UAG4?
OPA2130UAG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2130UAG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2130UAG4?
For technical support, including OPA2130UAG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2130UAG4 requirements.
6.How does Aetrix verify that OPA2130UAG4 is sourced from the original manufacturer or authorized distributors?
All OPA2130UAG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2130UAG4 meets industry standards.
7.What is the process for return or replacement of OPA2130UAG4?
All OPA2130UAG4 units undergo pre-shipment inspection (PSI). If there is an issue with OPA2130UAG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2130UAG4 part is unused and in its original packaging.
Return procedure for OPA2130UAG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
OPA2130UAG4 Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
