Texas Instruments OPA2140AIDRGT
- Part No.:
- OPA2140AIDRGT
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
OPA2140AIDRGT.pdf
- Description:
- DUAL-CHANNEL, 11-MHZ, LOW-NOISE
- Quantity:
- Payment:

- Shipping:

Inventory:249
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Product details
Overview
OPA2140AIDRGT from Texas Instruments is a dual-channel, rail-to-rail output, JFET-input operational amplifier optimized for precision DC and low-frequency AC applications. It delivers 11-MHz unity-gain bandwidth, 20 V/μs slew rate, ±120 μV max input offset voltage, and 5.1 nV/√Hz input voltage noise density at 1 kHz - enabling high-fidelity signal conditioning in data acquisition and instrumentation systems.
For engineers reviewing the OPA2140AIDRGT datasheet, OPA2140AIDRGT pinout, OPA2140AIDRGT application, or OPA2140AIDRGT equivalent, key selection criteria include its 10 pA max input bias current, –40°C to +125°C operating range, rail-to-rail output swing with V–-inclusive input range, and compatibility with single (4.5–36 V) or dual (±2.25–±18 V) supplies in precision analog front-ends.
Technical Context
The OPA2140AIDRGT implements a JFET-input differential pair with low-drift trimming, delivering stable DC performance across temperature. Its architecture supports rail-to-rail output swing while maintaining >120 dB CMRR and >126 dB open-loop gain at 25°C, enabling accurate amplification of low-level sensor signals near supply rails.
It features no phase reversal under common-mode overdrive and includes internal output current limiting (±30–36 mA), thermal shutdown protection, and robust ESD tolerance (±2000 V HBM). The device operates reliably from –40°C to +125°C with <1 μV/°C max offset drift - critical for metrology-grade measurement systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Bandwidth | 11 MHz - supports stable closed-loop operation up to 10× gain with adequate phase margin for precision filtering and buffering. |
| Slew Rate | 20 V/μs - enables fast settling of 10-V steps in ≤1.6 μs (16-bit), suitable for multiplexed DAQ systems. |
| Input Offset Voltage | ±120 μV max - ensures <0.002% error in 5-V full-scale measurements without calibration. |
| Input Bias Current | 10 pA max - minimizes voltage error across high-impedance sources (e.g., pH electrodes, piezoresistive sensors). |
| 0.1–10 Hz Noise | 250 nVPP - provides ultra-low flicker noise for DC-coupled strain gauge or thermocouple amplifiers. |
| Supply Range | Single: 4.5–36 V; Dual: ±2.25–±18 V - supports wide industrial power rails and battery-powered portable instruments. |
| Operating Temp | –40°C to +125°C - qualified for under-hood automotive, industrial control, and downhole sensing environments. |
Pinout & Package
OPA2140AIDRGT is packaged in an 8-pin SON (DRG) package with exposed thermal pad connected internally to V–. This thermally enhanced leadless package measures 2.0 mm × 2.0 mm × 0.75 mm and supports high-density PCB layouts while enabling efficient heat dissipation via soldered thermal pad.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| +IN A (Pin 3) | Noninverting input, Channel A | Accepts input signal referenced to V–; supports common-mode range down to V– – 0.1 V. |
| –IN A (Pin 2) | Inverting input, Channel A | Used for feedback configuration; matched with +IN A for precision differential gain. |
| OUT A (Pin 1) | Output, Channel A | Rail-to-rail swing (V– + 0.35 V to V+ – 0.35 V @ 2 kΩ load); drives ADC reference buffers directly. |
| V– (Pin 4) | Negative supply | Reference node for both channels; thermal pad is internally tied to this pin - must be soldered to V– plane. |
| V+ (Pin 8) | Positive supply | Supports up to 36 V single-supply or ±18 V dual-supply operation; decoupling required within 1 cm. |
| +IN B (Pin 5) | Noninverting input, Channel B | Independent second channel input; identical specs to Channel A for dual-sensor conditioning. |
| –IN B (Pin 6) | Inverting input, Channel B | Enables independent feedback networks per channel - essential for multi-channel DAQ front-ends. |
| OUT B (Pin 7) | Output, Channel B | Matches OUT A performance; channel separation >120 dB at DC ensures minimal crosstalk in dual-path designs. |
Key Features
| Feature | Design Value |
|---|---|
| No phase reversal | Prevents catastrophic output latch-up when input exceeds supply rails - eliminates need for external clamping diodes. |
| Rail-to-rail output | Delivers full dynamic range to successive-approximation ADCs (e.g., ADS8860) without level-shifting circuitry. |
| V–-inclusive input range | Allows direct interfacing to ground-referenced sensors (e.g., RTDs, bridge transducers) without negative biasing. |
| Low 1/f noise (250 nVPP) | Reduces baseline drift in DC-coupled medical ECG amplifiers and analytical instrument baselines. |
| 10 pA input bias current | Enables use with >1 GΩ source impedances (e.g., glass pH electrodes) without significant offset error. |
| –40°C to +125°C rating | Validated performance across automotive under-hood and industrial process control temperature extremes. |
Applications
| Chemistry Analyzer Front-End | Data Acquisition System |
|---|---|
Use Scenario: Amplifying low-current output from electrochemical sensors (e.g., amperometric gas detectors) with sub-picoamp resolution. IC Role / Device Role / Timing Role: Precision transimpedance amplifier with ultra-low input bias current and 250 nVPP 0.1–10 Hz noise. Use Value: Enables detection of <100 fA sensor currents without calibration drift over 8-hour lab runs. |
Use Scenario: Buffering and scaling outputs from multiple 24-bit delta-sigma ADCs in modular test equipment. IC Role / Device Role / Timing Role: Dual-channel rail-to-rail output driver with matched gain and offset between channels. Use Value: Maintains <0.001% inter-channel gain match and <1 μV/°C offset tracking across temperature. |
| DC Power Supply Monitor | Lab Instrumentation Amplifier |
Use Scenario: Measuring shunt voltage in programmable electronic loads with 16-bit accuracy over 0–30 V range. IC Role / Device Role / Timing Role: High-common-mode rejection (126 dB) difference amplifier front-end with V–-inclusive inputs. Use Value: Rejects 30-V common-mode noise while resolving 10-μV load current changes at 10-A scale. |
Use Scenario: Building low-noise, low-drift instrumentation amplifier stages for benchtop multimeters and calibrators. IC Role / Device Role / Timing Role: Input-stage JFET op amp providing <1 μV/°C drift and 5.1 nV/√Hz noise density. Use Value: Achieves <1 ppm/°C system-level drift in 7½-digit DMM reference paths without ovenized components. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision JFET op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2182AIDRGT | Lower offset drift (±0.012 μV/°C vs ±1 μV/°C), higher quiescent current (1.3 mA vs 2 mA), same 11-MHz GBW. | Better for ultra-stable DC references; less suitable for battery-powered portable instruments due to higher IQ. | Select OPA2182AIDRGT when long-term calibration stability outweighs power budget constraints. |
| ADA4625-2ACPZ-R7 | Higher slew rate (34 V/μs), wider supply (±20 V), but higher 0.1–10 Hz noise (450 nVPP vs 250 nVPP) and larger SOIC-8 footprint. | Better for high-speed pulse amplification; less optimal for low-frequency precision where 1/f noise dominates. | Choose ADA4625-2ACPZ-R7 when driving capacitive loads >1000 pF or requiring faster overload recovery. |
Compared with OPA2140AIDRGT, OPA2182AIDRGT offers superior DC stability at higher power cost, while ADA4625-2ACPZ-R7 trades low-frequency noise for speed and drive strength - making OPA2140AIDRGT the balanced choice for general-purpose precision analog signal chains.
Availability
OPA2140AIDRGT is available at Aetrix Electronics and suitable for chemistry analyzers, DC power supply monitors, and lab instrumentation requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for OPA2140AIDRGT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision op amp design and manufacturing.
The OPAx140 family was engineered specifically for high-accuracy, low-drift signal conditioning in demanding industrial, test & measurement, and scientific instrumentation applications - prioritizing DC precision, noise performance, and ruggedness over raw speed.
FAQ
What is the maximum supply voltage for OPA2140AIDRGT?
The OPA2140AIDRGT supports a maximum single-supply voltage of 40 V and a maximum dual-supply voltage of ±20 V, as specified in Absolute Maximum Ratings. However, recommended operation is limited to 4.5–36 V (single) or ±2.25–±18 V (dual) to ensure full parametric performance and reliability. Exceeding 36 V or ±18 V may cause permanent damage or degraded specifications.
Does OPA2140AIDRGT require external compensation for unity-gain stability?
No, the OPA2140AIDRGT is internally compensated for unity-gain stability across its full operating range. It maintains ≥60° phase margin with 2-kΩ load and no additional capacitance. For capacitive loads >100 pF, a series output resistor (e.g., 50 Ω) is recommended to isolate the load and preserve stability - as verified in Figure 6-19 and Figure 6-20 of the datasheet.
How does the thermal pad on the OPA2140AIDRGT DRG package function?
The exposed thermal pad on the OPA2140AIDRGT's 8-pin SON (DRG) package is internally connected to the V– pin. It must be soldered to a PCB copper pour tied to the V– net to achieve rated thermal performance (RθJA = 50.7°C/W). Leaving it unconnected degrades junction-to-board thermal resistance by >20× and risks thermal shutdown during sustained output current.
Can OPA2140AIDRGT drive ADC inputs directly?
Yes, the OPA2140AIDRGT's rail-to-rail output swing (V– + 0.35 V to V+ – 0.35 V at 2 kΩ) and low output impedance (<16 Ω at 1 MHz) allow direct connection to precision SAR and delta-sigma ADCs such as the ADS8860 or ADS1262. Its 1.6 μs 16-bit settling time ensures full accuracy without external buffer stages in most 1 MSPS or lower sampling systems.
What is the guaranteed input offset voltage drift for OPA2140AIDRGT over temperature?
The OPA2140AIDRGT guarantees a maximum input offset voltage drift of ±1 μV/°C over the full –40°C to +125°C operating range, as tested and specified in Section 6.7 of the datasheet. At ±18 V supply, typical drift is ±0.35 μV/°C, enabling sub-μV total drift over 100°C spans in calibrated systems.
OPA2140AIDRGT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- J-FET
- Number of Circuits:
- 2
- Output Type:
- Push-Pull, Rail-to-Rail
- Slew Rate:
- 20V/µs
- Gain Bandwidth Product:
- 11 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 0.5 pA
- Voltage - Input Offset:
- 30 µV
- Current - Supply:
- 1.8mA (x2 Channels)
- Current - Output / Channel:
- 36 mA
- Voltage - Supply Span (Min):
- 4.5 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-WSON (3x3)
OPA2140AIDRGT FAQ
1.How can I place an order for OPA2140AIDRGT through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2140AIDRGT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2140AIDRGT reliable?
The price and inventory of OPA2140AIDRGT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2140AIDRGT is usually 5 days.
3.What payment methods are accepted for OPA2140AIDRGT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2140AIDRGT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2140AIDRGT?
OPA2140AIDRGT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2140AIDRGT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2140AIDRGT?
For technical support, including OPA2140AIDRGT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2140AIDRGT requirements.
6.How does Aetrix verify that OPA2140AIDRGT is sourced from the original manufacturer or authorized distributors?
All OPA2140AIDRGT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2140AIDRGT meets industry standards.
7.What is the process for return or replacement of OPA2140AIDRGT?
All OPA2140AIDRGT units undergo pre-shipment inspection (PSI). If there is an issue with OPA2140AIDRGT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2140AIDRGT part is unused and in its original packaging.
Return procedure for OPA2140AIDRGT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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