Texas Instruments OPA2320AIDRGT
- Part No.:
- OPA2320AIDRGT
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-WFDFN Exposed Pad
- Datasheet:
-
OPA2320AIDRGT.pdf
- Description:
- IC CMOS 2 CIRCUIT 8SON
- Quantity:
- Payment:

- Shipping:

Inventory:2,180
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Product details
Overview
OPA2320AIDRGT from Texas Instruments is a dual-channel, precision rail-to-rail input/output CMOS operational amplifier optimized for low-noise (7 nV/√Hz at 10 kHz), high-speed (20-MHz GBW), and ultra-low input bias current (0.9 pA max) operation on single supplies from 1.8 V to 5.5 V. It delivers 10 V/µs slew rate, 150 µV max offset voltage, and 114 dB CMRR - enabling high-fidelity signal conditioning in high-impedance sensor interfaces and ADC driver stages.
For engineers reviewing the OPA2320AIDRGT datasheet, OPA2320AIDRGT pinout, OPA2320AIDRGT application, or OPA2320AIDRGT equivalent, key selection considerations include its dual-channel VSSOP-8 package, shutdown capability per channel, sub-picoampere input bias current over temperature, and verified performance driving SAR and delta-sigma ADCs without distortion or settling penalty.
Technical Context
The OPA2320AIDRGT implements a linear CMOS input stage with zero-crossover distortion architecture, ensuring consistent 114 dB CMRR across the full input common-mode range (extending 100 mV beyond both rails). Its internal bias circuitry and low-noise charge pump maintain stable DC accuracy and wideband noise performance under varying supply and load conditions.
It supports dual independent shutdown control (SHDN A and SHDN B), enabling selective channel disable with 3 µs disable time and 20 µs full-enable time. The device achieves unity-gain stability while driving capacitive loads up to 50 pF and maintains 47° phase margin at 5 V with 50-pF load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Bandwidth Product | 20 MHz - enables stable unity-gain buffering of signals up to ~15 MHz with ≤0.1% gain error. |
| Input Bias Current | 0.9 pA (max) - preserves signal integrity in >1 GΩ source-impedance applications like photodiode transimpedance amplifiers. |
| Input Voltage Noise | 7 nV/√Hz at 10 kHz - ensures minimal added noise in precision analog front-ends for 14–16-bit ADCs. |
| CMRR | 114 dB (typ) - rejects common-mode interference even when input swings within 100 mV of supply rails. |
| Quiescent Current | 1.45 mA per channel - supports battery-powered instrumentation with dual-channel active operation below 3 mA total. |
| Output Swing | Within 10 mV of rails (RL = 10 kΩ) - maximizes dynamic range in low-voltage, single-supply systems. |
| Shutdown Current | 0.1 µA per disabled channel - reduces system standby power by >99.9% versus active mode. |
Pinout & Package
OPA2320AIDRGT is packaged in an 8-pin VSSOP (DGK) with 3.00 mm × 3.00 mm body size and exposed thermal pad on underside, requiring connection to V– for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OUT A | Amplifier A output - drives external load or next-stage input; rail-to-rail swing supports full-scale ADC interfacing. |
| 2 | –IN A | Inverting input, channel A - high-impedance node (0.9 pA IB) for feedback network attachment or differential sensing. |
| 3 | +IN A | Noninverting input, channel A - accepts high-Z sensor signals without loading; extends 100 mV beyond supply rails. |
| 4 | V– | Negative supply - reference for both channels and thermal pad connection point; must be lowest potential in system. |
| 5 | +IN B | Noninverting input, channel B - independent high-Z input for second signal path; identical specs to +IN A. |
| 6 | –IN B | Inverting input, channel B - supports separate feedback loop for channel B; no crosstalk with channel A (130 dB isolation). |
| 7 | OUT B | Amplifier B output - fully independent output stage; capable of simultaneous 10 V/µs slewing with channel A. |
| 8 | V+ | Positive supply - accepts 1.8–5.5 V single supply; PSRR of 106 dB minimizes supply ripple coupling into output. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail I/O | Input common-mode range extends 100 mV beyond V– and V+; output swings within 10 mV of both rails - maximizes usable signal range in 1.8-V systems. |
| Zero-crossover distortion | Linear input stage eliminates crossover glitches at mid-supply - critical for precision DC-coupled sensor amplification and active filter linearity. |
| Dual independent shutdown | Separate SHDN A and SHDN B pins allow per-channel power gating - enables dynamic power scaling in multi-channel data acquisition systems. |
| Low 1/f noise | 2.8 µVPP (0.1–10 Hz) - supports high-resolution DC measurements in weigh scales, medical sensors, and strain gauge bridges. |
| High PSRR & CMRR | 106 dB PSRR and 114 dB CMRR over full temperature range - maintains accuracy in noisy industrial environments with unregulated supplies. |
Applications
| High-Z Sensor Signal Conditioning | Transimpedance Amplifiers |
|---|---|
|
Use Scenario: Amplifying microamp-level photocurrent from a 10-GΩ photodiode in optical smoke detection. IC Role / Device Role / Timing Role: Dual-channel OPA2320AIDRGT serves as primary transimpedance amplifier (channel A) and reference buffer (channel B) with matched DC performance. Use Value: 0.9 pA input bias current prevents diode leakage-induced offset drift; rail-to-rail output drives 16-bit SAR ADC directly without level-shifting. |
Use Scenario: Converting nanoamp bio-signal currents from microelectrode arrays into measurable voltages. IC Role / Device Role / Timing Role: Channel A operates as transimpedance amplifier with 10-MΩ feedback; channel B buffers reference voltage for electrode biasing. Use Value: 7 nV/√Hz noise density preserves SNR in sub-100-µV neural signals; 20-MHz bandwidth supports fast transient capture without aliasing. |
| Programmable Logic Controllers (PLCs) | Input/Output ADC/DAC Buffers |
|
Use Scenario: Conditioning 4–20 mA loop signals and thermocouple outputs in modular PLC analog input modules. IC Role / Device Role / Timing Role: Dual OPA2320AIDRGT provides isolated signal conditioning for two independent channels with shared supply and layout simplicity. Use Value: 150 µV max offset and 1.5 µV/°C drift ensure <±0.05% FSR accuracy over –40°C to +85°C; shutdown mode cuts idle power during channel multiplexing. |
Use Scenario: Buffering 16-bit DAC outputs and driving successive-approximation ADC inputs in closed-loop motor control. IC Role / Device Role / Timing Role: Channel A buffers DAC output for actuator drive; channel B buffers ADC input to prevent sampling distortion. Use Value: 10 V/µs slew rate settles 16-bit codes in <0.32 µs; zero-crossover design avoids harmonic distortion that would corrupt feedback resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision op-amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2182IDGKT | Lower offset (±4 µV typ), higher cost, 5.7 MHz GBW, no shutdown | Better DC accuracy but insufficient bandwidth for >1-MSPS ADC driving | Select when ultra-low offset dominates over speed and power; not suitable for high-sample-rate data acquisition. |
| ADA4522-2ARMZ | Zero-drift architecture, 2.5 nV/√Hz noise, 3 MHz GBW, no shutdown | Superior low-frequency noise and drift, but limited bandwidth restricts use to DC–100-kHz applications | Prefer for precision weigh scale or strain gauge systems where 0.1-Hz noise matters more than 20-MHz response. |
Compared with OPA2320AIDRGT, OPA2182IDGKT trades bandwidth and shutdown for lower offset, while ADA4522-2ARMZ sacrifices speed for near-zero drift - making OPA2320AIDRGT the only dual-channel option balancing 20-MHz bandwidth, sub-pA bias, and per-channel shutdown in VSSOP-8.
Availability
OPA2320AIDRGT is available at Aetrix Electronics and suitable for high-impedance sensor interfaces, precision ADC/DAC buffering, and industrial PLC analog modules requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for OPA2320AIDRGT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision amplifiers, data converters, and power management ICs.
The OPA2320AIDRGT belongs to TI's OPAx320 precision op-amp family, designed specifically for low-power, high-accuracy signal conditioning in battery-operated and industrial measurement systems where rail-to-rail operation, ultra-low input bias, and wide bandwidth are simultaneously required.
FAQ
What is the maximum operating temperature range for the OPA2320AIDRGT?
The OPA2320AIDRGT is specified for continuous operation from –40°C to +125°C ambient temperature. Electrical characteristics including input offset voltage drift (1.5 µV/°C typ), CMRR (≥96 dB), and quiescent current (≤1.7 mA/ch) are guaranteed across this full industrial temperature range - enabling reliable deployment in harsh environments such as motor control enclosures and outdoor PLC cabinets.
Does the OPA2320AIDRGT support single-supply operation?
Yes, the OPA2320AIDRGT operates from a single supply ranging from 1.8 V to 5.5 V. Its rail-to-rail input stage accepts common-mode voltages from (V–) – 0.1 V to (V+) + 0.1 V, and its output swings within 10 mV of both rails under 10-kΩ load - allowing direct interfacing with low-voltage ADCs and microcontrollers without level-shifting circuitry.
How does the shutdown function work on the OPA2320AIDRGT?
The OPA2320AIDRGT features two independent shutdown pins: SHDN A (pin 5) and SHDN B (pin 6), each controlling one amplifier channel. Driving either pin low (≤0.3 × V+) disables its respective amplifier, reducing quiescent current to 0.1 µA per channel. Both channels must be disabled for full 0.2 µA system standby - enabling granular power management in multi-channel data loggers.
Can the OPA2320AIDRGT drive capacitive loads?
Yes, the OPA2320AIDRGT is stable driving up to 50 pF capacitive loads with 47° phase margin at 5 V supply. For loads exceeding 50 pF, external isolation resistance (e.g., 10–50 Ω in series with output) is recommended. This capability allows direct connection to ADC input capacitors and long PCB traces without oscillation - verified in TI's SBOS513F datasheet Figure 20.
What is the typical input voltage noise density of the OPA2320AIDRGT?
The OPA2320AIDRGT has a typical input voltage noise density of 7 nV/√Hz at 10 kHz and 8.5 nV/√Hz at 1 kHz. At ultra-low frequencies, it delivers 2.8 µVPP integrated noise from 0.1 Hz to 10 Hz - making it suitable for precision DC and low-frequency AC applications such as thermopile amplification and bridge sensor readouts where both broadband and 1/f noise matter.
OPA2320AIDRGT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-WFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- CMOS
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 10V/µs
- Gain Bandwidth Product:
- 20 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 0.2 pA
- Voltage - Input Offset:
- 40 µV
- Current - Supply:
- 1.45mA
- Current - Output / Channel:
- 65 mA
- Voltage - Supply Span (Min):
- 1.8 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SON (3x3)
OPA2320AIDRGT FAQ
1.How can I place an order for OPA2320AIDRGT through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2320AIDRGT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2320AIDRGT reliable?
The price and inventory of OPA2320AIDRGT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2320AIDRGT is usually 5 days.
3.What payment methods are accepted for OPA2320AIDRGT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2320AIDRGT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2320AIDRGT?
OPA2320AIDRGT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2320AIDRGT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2320AIDRGT?
For technical support, including OPA2320AIDRGT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2320AIDRGT requirements.
6.How does Aetrix verify that OPA2320AIDRGT is sourced from the original manufacturer or authorized distributors?
All OPA2320AIDRGT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2320AIDRGT meets industry standards.
7.What is the process for return or replacement of OPA2320AIDRGT?
All OPA2320AIDRGT units undergo pre-shipment inspection (PSI). If there is an issue with OPA2320AIDRGT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2320AIDRGT part is unused and in its original packaging.
Return procedure for OPA2320AIDRGT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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