Texas Instruments OPA2625IDGST

Overview

OPA2625IDGST from Texas Instruments is a dual, high-precision, power-scalable operational amplifier optimized as a SAR ADC driver for 16-bit and 18-bit systems. It delivers 120 MHz gain-bandwidth, 115 V/µs slew rate, and 280 ns 16-bit settling time at 4-V step, with ±100 µV max offset voltage and 2.5 nV/√Hz input voltage noise at 10 kHz - enabling high-fidelity signal conditioning in precision data acquisition.

For engineers reviewing the OPA2625IDGST datasheet, OPA2625IDGST pinout, OPA2625IDGST application, or OPA2625IDGST equivalent, this page provides verified technical context on dual-channel mode control, low-power/high-drive transition timing (170 ns), rail-to-rail output swing, and THD+N performance down to –140 dBc (HD3) at 100 kHz - critical for selecting ADC interface amplifiers in power-sensitive, high-resolution systems.

Technical Context

The OPA2625IDGST integrates two independent amplifiers, each with a MODE pin (MODE A and MODE B) that selects between high-drive mode (GBW = 120 MHz, IQ = 2 mA per channel) and low-power mode (GBW = 1 MHz, IQ = 270 µA per channel). Transition from low-power to high-drive occurs in 170 ns while maintaining 16-bit ENOB integrity.

Each channel supports rail-to-rail output swing (±40 mV to rails at 10 kΩ load), input common-mode range extending to the negative rail, and ultra-low distortion: HD2 = –122 dBc and HD3 = –140 dBc at 100 kHz with 2 VPP output - validated under 5 V and 3.3 V supplies across –40°C to +125°C.

Key Specifications

Pinout & Package

OPA2625IDGST is housed in a 10-pin VSSOP (DGS) package measuring 3.00 mm × 3.00 mm, with exposed thermal pad for enhanced power dissipation in high-current drive scenarios.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-precision, dual-channel op-amp applications.

Compared with OPA2189IDR and ADA4807-2ARMZ, the OPA2625IDGST uniquely combines 120 MHz GBW, 16-bit settling, and per-channel power-scaling - enabling both high-fidelity acquisition and sub-mW idle operation in the same design, unlike zero-drift or fixed-mode alternatives.

Availability

OPA2625IDGST is available at Aetrix Electronics and suitable for precision SAR ADC drivers, voltage reference buffers, and power-sensitive data acquisition systems requiring stable component supply across industrial temperature ranges and multi-year production cycles.

Supply support for OPA2625IDGST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with over 50 years of innovation in precision amplifiers and data converter interfaces.

The OPA2625IDGST belongs to TI's OPAx625 family - engineered specifically to solve the dual challenge of driving high-resolution SAR ADCs with both speed and power efficiency, targeting test equipment, industrial automation, and portable instrumentation.

FAQ

What is the function of the MODE A and MODE B pins on the OPA2625IDGST?

The MODE A and MODE B pins on the OPA2625IDGST independently control the operating mode of each amplifier channel. When pulled to V– (ground), each pin activates high-drive mode (120 MHz GBW, 2 mA IQ); when pulled to V+, it enables low-power mode (1 MHz GBW, 270 µA IQ). The OPA2625IDGST requires explicit biasing - floating either MODE pin is prohibited per datasheet guidance.

Does the OPA2625IDGST support rail-to-rail input and output operation?

The OPA2625IDGST features rail-to-rail output swing (within 40 mV of V+ and V– at 10 kΩ load) and input common-mode range that includes the negative rail (V–), but does not extend to the positive rail - the maximum input voltage is (V+) – 1.15 V. This architecture balances precision, speed, and robustness for ADC driver use cases.

What is the typical settling time of the OPA2625IDGST for 16-bit accuracy?

The OPA2625IDGST achieves 280 ns settling time to 0.00153% (16-bit accuracy) for a 4-V step under high-drive mode conditions (G = 2, V+ = 5 V). This specification is fully characterized across –40°C to +125°C and forms the basis for its qualification as a driver for 1-MSPS+ SAR ADCs such as the ADS8860.

Can the OPA2625IDGST drive capacitive loads commonly found at SAR ADC inputs?

Yes - the OPA2625IDGST is characterized for capacitive load drive up to 100 pF with appropriate series isolation resistance (e.g., 10–50 Ω). Its open-loop output impedance is 1 Ω at 1 MHz in high-drive mode, and stability analysis (Figure 14–16 in SBOS688A) confirms robust phase margin with typical ADC input capacitances when R_iso ≥ 10 Ω is used.

How does the OPA2625IDGST compare to the single-channel OPA625 in terms of performance and pin compatibility?

The OPA2625IDGST shares identical per-channel AC/DC specifications with the OPA625 (e.g., 120 MHz GBW, 115 V/µs slew rate, ±100 µV V_OS), but uses a 10-pin VSSOP package with duplicated signal paths and separate MODE pins. It is not pin-compatible with the 6-pin OPA625 (DBV); layout redesign is required to accommodate dual-channel routing and independent mode control.