Texas Instruments OPA2690I-14D
- Part No.:
- OPA2690I-14D
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
OPA2690I-14D.pdf
- Description:
- IC OPAMP VFB 2 CIRCUIT 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:194
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Product details
Overview
OPA2690I-14D from Texas Instruments is a dual, wideband, voltage-feedback operational amplifier with independent disable control per channel, designed for high-fidelity signal conditioning in single-supply ADC driver, video line driving, and xDSL receiver applications. It delivers 220MHz small-signal bandwidth (G = +2), ±4.0V output swing on ±5V supplies, 1800V/µs slew rate, and 190mA output current per channel.
For engineers reviewing the OPA2690I-14D datasheet, OPA2690I-14D pinout, OPA2690I-14D application, or OPA2690I-14D equivalent, key selection criteria include its SO-14 package with dedicated DIS A/DIS B pins, 190mA drive capability into 100Ω loads, <12ns settling to 0.02%, and low 5.5mA/ch quiescent current with sub-500ns enable/disable timing.
Technical Context
The OPA2690I-14D employs a novel voltage-feedback architecture with a transconductance element placed between two input buffers, enabling 1800V/µs slew rate while maintaining unity-gain stability. Its output stage delivers high current with minimal headroom-supporting >150MHz bandwidth and ±4.0V swing on ±5V supplies or 1–4V output on +5V single supply.
Each channel features independent disable logic (active-low) with 25ns enable time, 200ns disable time, and 70dB off-isolation at 5MHz. The SO-14 package provides dedicated DIS A and DIS B pins, unlike the SO-8 variant, enabling per-channel power gating without affecting the other amplifier.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Small-Signal Bandwidth (G = +2) | 220MHz min at ±5V - supports high-frequency video, imaging, and ADC sampling up to 40MSPS with flat gain response. |
| Slew Rate | 1800V/µs min at ±5V - enables clean 2VPP step response with <2.8ns rise/fall time and <12ns 0.02% settling. |
| Output Current (sourcing/sinking) | ±190mA min per channel - drives 100Ω loads directly, eliminating need for external buffer stages in RGB or differential ADC interfaces. |
| Input Voltage Noise | 5.5nV/√Hz typ - low enough for precision ADC driver applications where SNR degradation must be minimized. |
| Harmonic Distortion (2nd, 5MHz) | –68dBc max into 100Ω - meets demanding video and communications linearity requirements (e.g., NTSC dG/dP <0.06%/0.03°). |
| Disable Supply Current | <200µA per channel when DIS pin pulled low - reduces system standby power by >98% versus active mode (11mA total). |
| Operating Temperature Range | –40°C to +85°C - qualified for industrial and telecom infrastructure environments including DSLAM and base station receivers. |
Pinout & Package
OPA2690I-14D is housed in a 14-pin SOIC (SO-14) package with exposed pad thermal enhancement. Pin assignments are validated per TI SBOS238G Rev. MARCH 2010, Figure 1 (top view).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (–In A) | Inverting input, Channel A | Differential input node; requires matched source impedance for optimal CMRR and distortion performance. |
| 2 (+In A) | Noninverting input, Channel A | Bias point for ac-coupled single-supply operation; typically referenced to VS/2 (2.5V) via resistive divider. |
| 3 (DIS A) | Channel A disable control | Active-low logic input; open or HIGH enables Channel A; LOW disables output and reduces supply current to <200µA. |
| 4 (–VS) | Negative supply rail | Connects to –5V (dual supply) or ground (single-supply); internal ESD protection rated to ±2kV HBM. |
| 5 (DIS B) | Channel B disable control | Independent of DIS A; enables per-channel power gating in I/Q or multi-channel receiver designs. |
| 6 (+In B) | Noninverting input, Channel B | Electrically isolated from Channel A inputs; supports fully differential or independent signal paths. |
| 7 (–In B) | Inverting input, Channel B | Matched to Pin 1; layout symmetry critical for crosstalk <–85dBc at 5MHz. |
| 8 (Out A) | Amplifier A output | Capable of sourcing/sinking ±190mA; closed-loop output impedance is 0.04Ω at 100kHz. |
| 9 (NC) | No connect | Not bonded internally; leave unconnected or tie to ground for mechanical stability only. |
| 10 (NC) | No connect | Not bonded internally; no electrical function. |
| 11 (+VS) | Positive supply rail | Accepts +5V to +12V single supply or ±2.5V to ±6V dual supply; thermal resistance θJA = 150°C/W. |
| 12 (NC) | No connect | Not bonded internally; no routing required. |
| 13 (NC) | No connect | Not bonded internally; no routing required. |
| 14 (Out B) | Amplifier B output | Functionally identical to Out A; supports independent loading and termination without crosstalk impact. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent disable control | Per-channel DIS A/DIS B pins enable selective power-down in I/Q receivers or multi-stage signal chains without PCB redesign. |
| Wideband single-supply operation | Delivers 190mA into 100Ω load with 1–4V output swing on +5V supply - eliminates negative rail in ADC front-end designs. |
| Low distortion at high frequency | –68dBc 2nd-harmonic at 5MHz into 100Ω - meets NTSC video and xDSL spectral mask requirements without post-filtering. |
| High slew rate with low quiescent current | 1800V/µs slew rate at only 5.5mA/ch - achieves full-power bandwidth previously limited to current-feedback amplifiers. |
| Matched dual-channel performance | Channel-to-channel crosstalk <–85dBc at 5MHz - ensures phase/gain tracking in differential signaling and I/Q demodulation. |
Applications
| Video Line Driving | Single-Supply ADC Driver |
|---|---|
|
Use Scenario: Driving 75Ω coaxial cable for composite or component video signals in broadcast equipment and medical imaging displays. IC Role / Device Role / Timing Role: Buffer and level-shift analog video signals with minimal group delay variation across 0–10MHz bandwidth. Use Value: Differential gain/phase error <0.06%/0.03° preserves color fidelity; 220MHz bandwidth accommodates HD video harmonics without roll-off. |
Use Scenario: Conditioning analog input to high-speed ADCs such as ADS825 (10-bit, 40MSPS) in portable test instruments and data acquisition systems. IC Role / Device Role / Timing Role: Single-supply driver providing 2VPP differential input to ADC with precise 2.5V common-mode bias. Use Value: 12ns 0.02% settling ensures accurate sampling at 40MSPS; low 5.5nV/√Hz noise preserves effective number of bits (ENOB). |
| xDSL Line Receiver | High-Speed Imaging Channel |
|
Use Scenario: Receiving upstream/downstream analog signals in ADSL2+ and VDSL2 line cards operating up to 30MHz. IC Role / Device Role / Timing Role: Low-noise, high-linearity receive path amplifier with programmable gain and disable for dynamic power management. Use Value: –77dBc 2nd-harmonic into 500Ω supports >70dB SFDR; independent DIS pins allow channel-specific sleep during idle periods. |
Use Scenario: Amplifying fast transient signals from CCD/CMOS image sensors in industrial machine vision and scientific cameras. IC Role / Device Role / Timing Role: Wideband transimpedance or voltage gain stage delivering >200MHz bandwidth for pixel clock-aligned signal capture. Use Value: 2.0ns rise time (2V step) resolves sub-5ns pixel pulses; 190mA output drives terminated transmission lines without ringing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar wideband op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2691IDR | Current-feedback architecture; higher 350MHz bandwidth but requires external feedback resistor; no disable function. | Lacks per-channel disable and has higher input bias current (±15µA vs ±11µA), limiting DC-coupled precision use cases. | Select for maximum bandwidth where disable control is unnecessary and layout allows feedback resistor placement. |
| LMH6629MA/NOPB | Lower 1.5GHz GBW but higher 1000V/µs slew rate; no disable pins; SO-8 only; 12.5mA/ch quiescent current. | Higher power consumption and no channel-level power gating; better suited for fixed-gain RF IF amplification than ADC buffering. | Choose when ultra-fast pulse fidelity is critical and per-channel disable is not required in the system architecture. |
Compared with OPA2690I-14D, OPA2691IDR offers higher bandwidth but sacrifices disable control and ease of gain configuration, while LMH6629MA/NOPB trades power efficiency and package flexibility for raw speed-making OPA2690I-14D optimal for power-aware, multi-channel, single-supply signal chain designs.
Availability
OPA2690I-14D is available at Aetrix Electronics and suitable for video line driving, single-supply ADC interface, and xDSL line receiver applications requiring stable component supply, long-term industrial lifecycle support, and traceable sourcing.
Supply support for OPA2690I-14D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 50 years of innovation in high-performance op amps and signal chain solutions.
The OPA2690 product line was engineered for high-fidelity, wideband analog signal conditioning in communications, video, and instrumentation-emphasizing single-supply operability, low distortion, and per-channel power control.
FAQ
What is the maximum supply voltage for OPA2690I-14D?
The OPA2690I-14D supports a maximum operating voltage range of ±6.0V for dual-supply operation or +12V for single-supply use. Exceeding these limits risks permanent damage, as confirmed by TI's Absolute Maximum Ratings table in SBOS238G. Operation at ±5V or +5V is recommended for optimal AC performance and thermal stability in the SO-14 package.
Does OPA2690I-14D support true rail-to-rail input or output?
No, OPA2690I-14D is not a rail-to-rail device. Its input common-mode range extends to ±3.5V on ±5V supplies (or 1.5V to 3.5V on +5V), and output swing reaches ±4.0V into no load or 1–4V on +5V supply. These specifications reflect intentional headroom design for wideband stability-not rail-to-rail capability-and are verified across temperature in the Electrical Characteristics tables.
How does the disable function behave on OPA2690I-14D?
OPA2690I-14D features two independent active-low disable pins (DIS A and DIS B). When pulled LOW, each channel enters high-impedance output state with supply current dropping below 200µA per channel. Enable time is 25ns and disable time is 200ns, with ±50mV turn-on/off glitch amplitude-validated in TI's Typical Characteristics (Figures 17–18) and Electrical Characteristics tables.
Can OPA2690I-14D drive a 50Ω load directly?
Yes, OPA2690I-14D can drive a 50Ω load directly: it delivers ±190mA per channel and maintains <12ns 0.02% settling even into 100Ω. For 50Ω, output swing reduces slightly (±3.9V min on ±5V), but harmonic distortion remains within spec (–68dBc 2nd-harmonic at 5MHz). Layout must minimize parasitic inductance to avoid peaking, as shown in Figure 36's test circuit.
What is the thermal resistance of the OPA2690I-14D SO-14 package?
The junction-to-ambient thermal resistance (θJA) for the OPA2690I-14D in SO-14 package is 150°C/W, as specified in the Thermal Characteristics section of SBOS238G. This value assumes standard JEDEC 2-layer board conditions; actual performance improves with PCB copper pour and thermal vias under the exposed pad-critical for sustained 190mA output operation.
OPA2690I-14D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Amplifier Type:
- Voltage Feedback
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 1800V/µs
- Gain Bandwidth Product:
- 300 MHz
- -3db Bandwidth:
- 500 MHz
- Current - Input Bias:
- 5 µA
- Voltage - Input Offset:
- 1 mV
- Current - Supply:
- 11mA (x2 Channels)
- Current - Output / Channel:
- 190 mA
- Voltage - Supply Span (Min):
- 5 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
OPA2690I-14D FAQ
1.How can I place an order for OPA2690I-14D through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2690I-14D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2690I-14D reliable?
The price and inventory of OPA2690I-14D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2690I-14D is usually 5 days.
3.What payment methods are accepted for OPA2690I-14D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2690I-14D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2690I-14D?
OPA2690I-14D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2690I-14D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2690I-14D?
For technical support, including OPA2690I-14D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2690I-14D requirements.
6.How does Aetrix verify that OPA2690I-14D is sourced from the original manufacturer or authorized distributors?
All OPA2690I-14D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2690I-14D meets industry standards.
7.What is the process for return or replacement of OPA2690I-14D?
All OPA2690I-14D units undergo pre-shipment inspection (PSI). If there is an issue with OPA2690I-14D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2690I-14D part is unused and in its original packaging.
Return procedure for OPA2690I-14D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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