Texas Instruments OPA2691I-14DR
- Part No.:
- OPA2691I-14DR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
OPA2691I-14DR.pdf
- Description:
- IC OPAMP CFA 2 CIRCUIT 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
OPA2691I-14DR from Texas Instruments is a dual wideband current-feedback operational amplifier with independent disable control per channel, designed for high-speed analog signal conditioning. It delivers 190MHz small-signal bandwidth (G = +2), 2100V/µs slew rate, ±4.0V output swing, and 190mA output current on ±5V supplies - enabling RGB line driving and single-supply ADC input buffering in compact SO-14 packages.
For engineers reviewing the OPA2691I-14DR datasheet, OPA2691I-14DR pinout, OPA2691I-14DR application, or OPA2691I-14DR equivalent, key selection criteria include its SO-14 disable pin implementation, 150µA/ch power-down current, 25ns enable time, ±1.2V differential input voltage limit, and verified performance in differential ADC driver and video multiplexing topologies.
Technical Context
The OPA2691I-14DR uses a current-feedback architecture where bandwidth remains stable across gain settings - unlike voltage-feedback op amps - with 280MHz unity-gain bandwidth and 190MHz at G = +2. Its output stage supports rail-to-rail output swing within 1V of supply rails and delivers >160mA sourcing/sinking current while maintaining low crossover distortion.
Each channel features an independent disable pin (DIS A/DIS B) that places the output in high-impedance state and reduces quiescent current to <150µA/ch when pulled LOW. The SO-14 package provides dedicated disable terminals not available in the SO-8 variant, enabling true channel-selectable power gating in multi-channel systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Small-Signal Bandwidth (G = +2) | 190MHz min at ±5V - enables full NTSC/PAL video bandwidth and >100MHz ADC front-end sampling. |
| Slew Rate | 2100V/µs min - supports clean 5Vp-p step response in <2ns without slewing artifacts. |
| Output Current | ±190mA min - drives 100Ω loads directly without external buffers in line-driver applications. |
| Supply Current (per channel) | 5.1mA typ at 25°C - ultra-low for broadband op amp; trimmed for tight production spread. |
| Disable Current (per channel) | <150µA max - enables dynamic power scaling in battery-powered or thermally constrained systems. |
| Input Voltage Noise | 1.7nV/√Hz typ above 1MHz - preserves SNR in high-frequency signal chains like imaging channels. |
| Enable Time | 25ns typ - ensures sub-cycle switching in time-multiplexed video or I/Q channel selection. |
Pinout & Package
OPA2691I-14DR is housed in a 14-pin SOIC (SO-14) package with exposed pad thermal enhancement. Pinout supports dual independent amplifiers plus dedicated disable controls and power pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (–In A) | Inverting Input, Channel A | Current-summing node for feedback network; requires matched impedance for stability. |
| 2 (+In A) | Noninverting Input, Channel A | High-impedance input (100kΩ || 2pF); sets common-mode bias point in single-supply designs. |
| 3 (DIS A) | Disable Control, Channel A | Active-low logic input; pulls output to Hi-Z and cuts supply current when <1.5V. |
| 4 (–VS) | Negative Supply Rail | Connects to ground or negative rail; must be decoupled with 0.1µF ceramic capacitor. |
| 5 (DIS B) | Disable Control, Channel B | Independent channel shutdown; enables selective power gating without affecting Channel A. |
| 6 (+In B) | Noninverting Input, Channel B | Matched to Channel A for I/Q or differential pair operation with <0.07% gain error. |
| 7 (–In B) | Inverting Input, Channel B | Current-input node; RI = 37Ω typical - defines transimpedance gain with feedback resistor. |
| 8 (Out A) | Output, Channel A | Capable of ±190mA drive into 100Ω; output impedance <0.03Ω at 100kHz for low distortion. |
| 9 (NC) | No Connection | Not internally bonded; leave unconnected or tie to ground for mechanical stability. |
| 10 (NC) | No Connection | Not internally bonded; no electrical function. |
| 11 (+VS) | Positive Supply Rail | Accepts +5V to +12V single supply or ±2.5V to ±6V dual supply; θJA = 100°C/W. |
| 12 (NC) | No Connection | Not internally bonded; no electrical function. |
| 13 (NC) | No Connection | Not internally bonded; no electrical function. |
| 14 (Out B) | Output, Channel B | Electrically identical to Out A; supports wired-OR video multiplexing with <20mV switching glitch. |
Key Features
| Feature | Design Value |
|---|---|
| Current-feedback architecture | Bandwidth independent of closed-loop gain - maintains 190MHz at G = +2 and 280MHz at G = +1 for flexible gain staging. |
| Dual independent disable pins | Per-channel shutdown with 25ns enable / 400ns disable timing - enables precise time-domain channel selection in I/Q or video systems. |
| Single-supply operation down to +4V | Delivers 3Vp-p output swing from +5V rail with <1V headroom - eliminates need for rail-splitter in portable instrumentation. |
| Low distortion at high frequency | –74dBc 3rd-harmonic at 5MHz/2Vp-p into 100Ω - meets broadcast video differential gain/phase specs (0.07%/0.02°). |
| Matched dual-channel performance | Channel-to-channel crosstalk <–86dBc at 5MHz - ensures isolation in differential ADC drivers and I/Q modulators. |
Applications
| RGB Line Driver | Differential ADC Driver |
|---|---|
Use Scenario: Driving three parallel 75Ω coaxial cables from graphics controller DAC outputs in embedded display subsystems. IC Role / Device Role / Timing Role: High-current, low-distortion buffer with DC-coupled output swing from 1V to 4V on +5V supply. Use Value: Eliminates external level-shifting and reduces board area by integrating dual-channel drive with disable control for power gating during blanking intervals. | Use Scenario: Converting single-ended sensor or IF signals to differential format for ADS823 10-bit 60MSPS ADC in test equipment. IC Role / Device Role / Timing Role: Gain-of-10 differential driver with common-mode bias set to +2.5V matching ADC internal reference. Use Value: Achieves >150MHz full-scale input bandwidth using matched OPA2691I-14DR channels, minimizing gain/phase mismatch-induced harmonic distortion. |
| Wired-OR Video Multiplexer | DSL Line Receiver |
Use Scenario: Selecting between multiple camera inputs onto shared HD-SDI or analog composite video bus in security DVR systems. IC Role / Device Role / Timing Role: Make-before-break channel switcher using disable-controlled outputs tied via 82.5Ω resistors to 75Ω cable. Use Value: Delivers <20mV switching glitch during vertical retrace, preserving sync integrity and eliminating visible artifacts in switched video streams. | Use Scenario: Amplifying upstream xDSL line signals (up to 2.2MHz) in DSLAM line cards with adaptive gain control. IC Role / Device Role / Timing Role: Low-noise, high-output-current receiver stage with 190MHz bandwidth margin for filter roll-off compensation. Use Value: Supports >100dB dynamic range with –70dBc 2nd-harmonic distortion at 5MHz, meeting ITU-T G.992.1 spectral mask requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar current-feedback operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2690IDR | Voltage-feedback architecture; unity-gain stable; 250MHz GBW; 1200V/µs slew rate; no disable pin. | Better DC accuracy (±0.3mV Vos), lower noise (1.6nV/√Hz), but lacks channel shutdown for power-sensitive multiplexing. | Select when precision DC performance and lower harmonic distortion outweigh need for per-channel disable control. |
| OPA2681IDR | Current-feedback; 220MHz bandwidth at G = +2; 1800V/µs slew; 4.5mA/ch supply current; SO-8 only, no disable pins. | Lower power and smaller footprint, but no disable functionality and limited to SO-8 - unsuitable for wired-OR or time-multiplexed architectures. | Select when board space is critical and channel-level power gating is unnecessary. |
Compared with OPA2690IDR and OPA2681IDR, the OPA2691I-14DR uniquely combines current-feedback speed, SO-14 disable pins, and 190mA output drive - making it the only option among the three for applications requiring both high-frequency fidelity and hardware-controllable channel isolation.
Availability
OPA2691I-14DR is available at Aetrix Electronics and suitable for high-speed imaging channels, broadband video buffers, and differential ADC drivers requiring stable component supply across industrial temperature ranges (–40°C to +85°C).
Supply support for OPA2691I-14DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog and embedded processing technologies with over 90 years of innovation in high-performance signal chain components.
The OPA2691I-14DR belongs to TI's high-speed current-feedback op amp product line, engineered specifically for applications demanding wide bandwidth, fast settling, and low-power channel management in video, communications, and test equipment.
FAQ
What is the maximum operating supply voltage for the OPA2691I-14DR?
The OPA2691I-14DR supports a maximum operating voltage of ±6V for dual-supply configurations or +12V for single-supply operation. Exceeding these limits risks permanent damage, as specified in the Absolute Maximum Ratings table. Operation at ±5V or +5V is recommended for optimal AC performance and thermal safety, with thermal resistance θJA = 100°C/W in the SO-14 package.
Does the OPA2691I-14DR require external compensation for stability?
No, the OPA2691I-14DR is unity-gain stable with a minimum small-signal bandwidth of 280MHz at G = +1. Stability is ensured across all gains ≥ +1 using standard 402Ω feedback resistors (for ±5V) or 453Ω (for +5V). No external compensation capacitors are needed, though a 0.01µF capacitor between +VS and –VS pins improves 2nd-harmonic distortion by 3–6dB in PCB layouts.
How does the disable function behave during power-up of the OPA2691I-14DR?
During power-up, the OPA2691I-14DR enters normal operation if DIS pins are left open or held HIGH (>3.3V). If DIS pins are pulled LOW before supply stabilization, the device remains in high-impedance shutdown until the disable voltage exceeds 1.8V (min). The enable time is 25ns typ after crossing the 3.3V threshold, ensuring rapid channel activation post-power-on reset sequences.
Can the OPA2691I-14DR drive a 50Ω load directly?
Yes, the OPA2691I-14DR can source/sink ±190mA, enabling direct drive of 50Ω loads with up to ±3.9V output swing (no load) and ±3.7V (100Ω load) - sufficient for 50Ω systems with 2Vp-p signals. For optimal flatness and distortion, use series output resistors (e.g., 24.9Ω) to isolate the op amp from capacitive ADC inputs while maintaining 50Ω system impedance.
What is the differential input voltage limit for the OPA2691I-14DR?
The absolute maximum differential input voltage for the OPA2691I-14DR is ±1.2V, as stated in the Absolute Maximum Ratings. This limit applies regardless of supply voltage and must not be exceeded to prevent input stage damage. In video multiplexing applications, the wired-OR topology ensures unselected channels see <±1.2V differential input during switching transitions.
OPA2691I-14DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Current Feedback
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 2100V/µs
- Gain Bandwidth Product:
- 2 GHz
- -3db Bandwidth:
- 280 MHz
- Current - Input Bias:
- 15 µA
- Voltage - Input Offset:
- 800 µV
- Current - Supply:
- 10.2mA (x2 Channels)
- Current - Output / Channel:
- 190 mA
- Voltage - Supply Span (Min):
- 5 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
OPA2691I-14DR FAQ
1.How can I place an order for OPA2691I-14DR through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2691I-14DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2691I-14DR reliable?
The price and inventory of OPA2691I-14DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2691I-14DR is usually 5 days.
3.What payment methods are accepted for OPA2691I-14DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2691I-14DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2691I-14DR?
OPA2691I-14DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2691I-14DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2691I-14DR?
For technical support, including OPA2691I-14DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2691I-14DR requirements.
6.How does Aetrix verify that OPA2691I-14DR is sourced from the original manufacturer or authorized distributors?
All OPA2691I-14DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2691I-14DR meets industry standards.
7.What is the process for return or replacement of OPA2691I-14DR?
All OPA2691I-14DR units undergo pre-shipment inspection (PSI). If there is an issue with OPA2691I-14DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2691I-14DR part is unused and in its original packaging.
Return procedure for OPA2691I-14DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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