Texas Instruments OPA2726AIDGSR
- Part No.:
- OPA2726AIDGSR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
OPA2726AIDGSR.pdf
- Description:
- IC CMOS 2 CIRCUIT 10VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,777
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
OPA2726AIDGSR from Texas Instruments is a dual, rail-to-rail output, high-speed precision operational amplifier with shutdown control, designed for driving 16-bit ADCs and transimpedance applications. It delivers 20MHz gain-bandwidth, 30V/µs slew rate, 6nV/√Hz input voltage noise at 100kHz, 0.0003% THD+N at 1kHz, and operates from ±2V to ±6V or +4V to +12V supplies.
For engineers reviewing the OPA2726AIDGSR datasheet, OPA2726AIDGSR pinout, OPA2726AIDGSR application, or OPA2726AIDGSR equivalent, key selection criteria include fast 16-bit settling time (450ns @ 0.01%), low quiescent current in shutdown mode (6µA/ch), DGND-referenced enable logic, and MSOP-10 package compatibility with space-constrained signal-chain designs.
Technical Context
The OPA2726AIDGSR employs a proprietary CMOS output stage enabling rail-to-rail output swing within 175mV of rails (RL = 100kΩ) while maintaining >110dB open-loop gain. Its input stage features <200pA bias current and excellent CMRR (94dB typical) across V− to (V+) − 3V common-mode range.
Shutdown functionality is implemented via an Enable pin referenced to DGND, requiring VH > VDGND + 2V to activate and VL < VDGND + 0.8V to disable - supporting direct interface with standard CMOS logic in both single- and dual-supply configurations without level-shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-Bandwidth Product | 20MHz - enables stable unity-gain operation and supports wideband active filter and ADC buffer designs up to ~10MHz closed-loop bandwidth. |
| Slew Rate | 30V/µs - ensures distortion-free amplification of fast transient signals such as ADC acquisition steps or pulse-shaped optical receiver outputs. |
| Input Voltage Noise | 6nV/√Hz at 100kHz - critical for low-noise transimpedance amplifiers where photodiode capacitance elevates effective noise gain at high frequencies. |
| THD+N | 0.0003% at 1kHz - meets high-fidelity audio and precision measurement requirements where harmonic distortion must remain below −110dB. |
| Quiescent Current (Active) | 5.5mA/ch max - balances performance and power efficiency in battery-powered test equipment and portable instrumentation. |
| Shutdown Current | 6µA/ch - reduces system standby power by >99% versus active mode, enabling long-duration sleep states in optical networking modules. |
| Supply Range | ±2V to ±6V or +4V to +12V - supports interoperability with legacy ±5V systems and modern low-voltage industrial I/O rails. |
Pinout & Package
OPA2726AIDGSR is packaged in a 10-pin MSOP (DGS) with exposed thermal pad, rated for −40°C to +125°C operation. The package provides compact footprint (3mm × 3mm) and enhanced thermal performance (θJA = 150°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - V+ | Positive supply rail | Accepts +4V to +12V (single) or +2V to +6V (dual); bypassing with 1nF ceramic + 1µF tantalum required for stability. |
| 2 - OUT B | Amplifier B output | Rail-to-rail capable; swings to within 175mV of V+ or V− under light load (100kΩ), preserving dynamic range in precision buffers. |
| 3 - −IN B | Inverting input B | High-impedance CMOS node; protected by ESD diodes clamped to rails; requires current limiting if driven beyond supply by >300mV. |
| 4 - +IN B | Non-inverting input B | Same ESD protection and bias current (<200pA) as −IN B; enables high-Z sensor interfaces like photodiode anodes in transimpedance configs. |
| 5 - Enable | Shutdown control input | DGND-referenced logic input; drives amplifier into 6µA/ch shutdown when < VDGND + 0.8V; pulled up internally if left floating. |
| 6 - OUT A | Amplifier A output | Independent rail-to-rail output; allows dual-channel signal conditioning (e.g., differential ADC driver or stereo audio path) without crosstalk degradation. |
| 7 - −IN A | Inverting input A | Electrically isolated from Channel B; supports independent feedback networks for multi-stage filtering or I/V conversion per channel. |
| 8 - +IN A | Non-inverting input A | Matches Channel B specs; enables true dual-channel operation with matched AC performance (GBW, SR, noise) across temperature. |
| 9 - V− | Negative supply rail | Accepts 0V (single) or −2V to −6V (dual); common return for both amplifiers and DGND reference; must be decoupled identically to V+. |
| 10 - DGND | Enable reference voltage | Defines logic threshold for Enable pin; may be tied to system ground in dual-supply setups to eliminate level-shifter components. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail output swing | Delivers full-scale signal headroom down to 175mV from rails (100kΩ load), maximizing SNR in 16-bit data acquisition systems. |
| Low input bias current | <200pA enables accurate transimpedance amplification of picoamp-level photodiode currents without significant DC error. |
| DGND-referenced shutdown | Eliminates need for external level shifters when interfacing with 3.3V/5V CMOS logic in dual-supply optical front-ends. |
| Fast 16-bit settling | 450ns to 0.01% for 5V step ensures complete settling within ADS8342's 600ns acquisition window, preventing code-dependent errors. |
| High PSRR/CMRR | 94dB CMRR and >100dB PSRR maintain accuracy in noisy industrial environments with shared power domains or ground bounce. |
Applications
| Optical Networking Transimpedance Amplifier | A/D Converter Buffer |
|---|---|
Use Scenario: Converting photocurrent from PIN photodiodes in ONET-compliant 2.5G/10G receivers into precise voltage signals. IC Role / Device Role / Timing Role: Dual-channel transimpedance amplifier with one channel dedicated to signal path and second to monitor/reference path. Use Value: 200pA input bias and 6nV/√Hz noise ensure minimal dark-current error and high sensitivity at 100kHz–1MHz bandwidths required for burst-mode detection. | Use Scenario: Driving the analog input of the ADS8342 16-bit, 250kSPS ADC in precision process control loop sampling. IC Role / Device Role / Timing Role: Single-ended buffer isolating multiplexer output from ADC input capacitance and charge injection. Use Value: 450ns 0.01% settling guarantees full 16-bit accuracy within the ADC's 600ns acquisition time, eliminating missing codes in closed-loop feedback. |
| Active Filter for Test Equipment | Portable Audio Line Driver |
Use Scenario: Implementing 4-pole Butterworth low-pass filters in automated test equipment for anti-aliasing before digitization. IC Role / Device Role / Timing Role: Dual op-amp configured as Sallen-Key topology with matched GBW and phase margin across channels. Use Value: 20MHz GBW and 30V/µs slew rate support clean 50kHz cutoff (Figure 7) with <0.1dB passband ripple and monotonic group delay. | Use Scenario: Driving stereo headphone outputs or line-level signals in battery-powered audio analyzers and field calibration tools. IC Role / Device Role / Timing Role: Dual rail-to-rail output stage delivering ±2.5V swing into 10kΩ loads with ultra-low THD+N. Use Value: 0.0003% THD+N at 1kHz and 5.5mA/ch quiescent current enable high-fidelity playback while extending runtime on Li-ion cells. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed precision op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2725AIDGKR | No shutdown function; identical GBW (20MHz), noise (6nV/√Hz), and settling (450ns), but draws 5.5mA/ch continuously. | Suitable only where always-on operation is acceptable; cannot reduce system standby power. | Select when shutdown logic adds complexity or cost, and continuous operation aligns with system architecture. |
| OPA2188AIDR | Zero-drift architecture; lower offset (25µV max) and drift (0.003µV/°C), but lower GBW (2MHz) and higher noise (8.8nV/√Hz at 1kHz). | Better for DC-critical sensor front-ends (e.g., strain gauge bridges), not high-speed ADC buffering or transimpedance. | Choose for µV-level DC accuracy over speed; avoid where >5MHz closed-loop bandwidth or fast settling is required. |
Compared with OPA2725AIDGKR, the OPA2726AIDGSR adds shutdown capability without sacrificing AC performance, enabling power-aware optical modules; versus OPA2188AIDR, it trades DC precision for 10× higher bandwidth and lower high-frequency noise, making it optimal for dynamic signal chains rather than static measurements.
Availability
OPA2726AIDGSR is available at Aetrix Electronics and suitable for optical networking transceivers, high-resolution data acquisition systems, portable test instrumentation, and industrial process controllers requiring stable component supply across extended temperature ranges.
Supply support for OPA2726AIDGSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-performance op amps and precision signal-chain solutions.
The OPA725/726 family was engineered specifically for demanding 16-bit data acquisition and optical receiver applications, combining high speed, low noise, and rail-to-rail output in robust CMOS processes qualified for industrial and communications environments.
FAQ
What is the maximum capacitive load the OPA2726AIDGSR can drive stably in unity-gain configuration?
The OPA2726AIDGSR remains stable with ≥20pF capacitive load in unity-gain configuration, as verified in the datasheet's Typical Characteristics (Small-Signal Overshoot vs Capacitive Load). For heavier loads (>100pF), adding a 10Ω–20Ω series resistor inside the feedback loop-between output and inverting input-suppresses ringing while preserving DC accuracy, per Figure 3 in the application information section.
Does the OPA2726AIDGSR require external compensation for stability in G = −1 inverting configuration?
No, the OPA2726AIDGSR is unity-gain stable and does not require external compensation in inverting configurations. Its internal compensation ensures phase margin >60° across all gains ≥ −1, including G = −1. Stability is confirmed in the Gain and Phase vs Frequency plot (Figure 1, page 6), which shows >45° phase margin at the unity-gain crossover frequency of 20MHz.
How does the DGND pin affect logic-level compatibility when using the OPA2726AIDGSR in a +5V single-supply system?
In a +5V single-supply system, DGND should be connected to ground (0V). This sets the Enable pin's activation threshold to >2V and shutdown threshold to <0.8V, making it directly compatible with standard 3.3V or 5V CMOS logic outputs without level-shifting circuitry. The internal pull-up on Enable ensures default-active behavior if the pin is left unconnected.
Can the OPA2726AIDGSR drive a 600Ω load at 2VRMS while maintaining its specified THD+N of 0.0003%?
Yes - the OPA2726AIDGSR's THD+N of 0.0003% is measured under precisely those conditions: VS = ±6V, VOUT = 2VRMS, RL = 600Ω, G = +1, f = 1kHz. Its 40mA output current capability and rail-to-rail swing ensure linear operation into this demanding audio load, with distortion performance validated across temperature and supply variations.
What is the thermal resistance (θJA) of the OPA2726AIDGSR in its MSOP-10 package, and how does it impact power dissipation at maximum ambient temperature?
The OPA2726AIDGSR in MSOP-10 has θJA = 150°C/W. At maximum ambient temperature (+125°C) and worst-case quiescent current (6mA/ch × 2 = 12mA), total power dissipation is 12mA × 12V = 144mW. Junction temperature rise is 144mW × 150°C/W = 21.6°C, resulting in TJ = 125°C + 21.6°C = 146.6°C - below the absolute maximum rating of 150°C, confirming safe operation at full spec.
OPA2726AIDGSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- CMOS
- Number of Circuits:
- 2
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 30V/µs
- Gain Bandwidth Product:
- 20 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 30 pA
- Voltage - Input Offset:
- 1.5 mV
- Current - Supply:
- 4.3mA (x2 Channels)
- Current - Output / Channel:
- 40 mA
- Voltage - Supply Span (Min):
- 3.5 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
OPA2726AIDGSR FAQ
1.How can I place an order for OPA2726AIDGSR through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2726AIDGSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2726AIDGSR reliable?
The price and inventory of OPA2726AIDGSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2726AIDGSR is usually 5 days.
3.What payment methods are accepted for OPA2726AIDGSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2726AIDGSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2726AIDGSR?
OPA2726AIDGSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2726AIDGSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2726AIDGSR?
For technical support, including OPA2726AIDGSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2726AIDGSR requirements.
6.How does Aetrix verify that OPA2726AIDGSR is sourced from the original manufacturer or authorized distributors?
All OPA2726AIDGSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2726AIDGSR meets industry standards.
7.What is the process for return or replacement of OPA2726AIDGSR?
All OPA2726AIDGSR units undergo pre-shipment inspection (PSI). If there is an issue with OPA2726AIDGSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2726AIDGSR part is unused and in its original packaging.
Return procedure for OPA2726AIDGSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
OPA2726AIDGSR Tags

-
LM358DT
STMicroelectronics

-
LM358DR
Texas Instruments

-
LM2904DR
Texas Instruments

-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments

-
MCP6006T-E/OT
Microchip Technology

-
MCP6006UT-E/OT
Microchip Technology

-
LM324PWR
Texas Instruments

-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments

-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
