Texas Instruments OPA2735AIDR
- Part No.:
- OPA2735AIDR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
OPA2735AIDR.pdf
- Description:
- IC OPAMP ZERO-DRIFT 2 CIRC 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
OPA2735AIDR from Texas Instruments is a dual, zero-drift CMOS operational amplifier optimized for precision DC-coupled applications requiring ultra-low offset voltage (5µV max), near-zero drift (0.05µV/°C max), and rail-to-rail output swing within 50mV of the rails. It operates from 2.7V to 12V single supply or ±1.35V to ±6V dual supply and delivers 750µA max quiescent current per amplifier. It is widely used in medical instrumentation, electronic scales, and battery-powered test equipment.
For engineers reviewing the OPA2735AIDR datasheet, OPA2735AIDR pinout, OPA2735AIDR application, or OPA2735AIDR equivalent, key selection criteria include guaranteed 5µV max input offset voltage over −40°C to +85°C, 0.05µV/°C max drift, 1.6MHz gain-bandwidth product, 1.5V/µs slew rate, and SOIC-8 package compatibility with standard PCB layouts for low-noise analog signal conditioning.
Technical Context
The OPA2735AIDR employs auto-zeroing architecture with a time-continuous 1.6MHz main amplifier corrected every 100µs, enabling simultaneous low offset and near-zero drift. Its input stage features CMOS inputs with 200pA max bias current and rail-to-rail common-mode range from (V−) − 0.1V to (V+) − 1.5V.
It supports single-supply operation down to 2.7V and provides 115dB min open-loop gain, 130dB min CMRR, and 1.5V/µs slew rate at G = +1. The device is unity-gain stable and free from output phase reversal, making it suitable for precision transducer interfaces and high-resolution ADC driver stages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Offset Voltage | 5µV (max) - ensures sub-10µV system-level DC error in precision sensor front-ends without calibration. |
| Offset Drift | 0.05µV/°C (max) - maintains <0.5µV total drift over 10°C ambient change, critical for temperature-stable instrumentation. |
| Quiescent Current | 750µA (max) per amplifier - enables multi-channel, battery-operated designs with >1-year runtime on coin cells. |
| Supply Range | 2.7V to 12V single supply - supports direct interfacing with Li-ion, 3.3V, and 5V systems without level-shifting. |
| Gain-Bandwidth Product | 1.6MHz - sufficient for anti-aliasing filters up to ~100kHz and stable closed-loop gain ≥10 at 100kHz. |
| Slew Rate | 1.5V/µs - allows full-scale step response in <35ns for 50mV output swing, supporting fast settling in data acquisition. |
| Output Swing | Rail-to-rail within 50mV - maximizes dynamic range when driving 16-bit+ SAR ADCs referenced to same supply. |
Pinout & Package
OPA2735AIDR is housed in an 8-pin SOIC (D) package with 1.27mm lead pitch, 3.9mm × 4.9mm body, and 1.75mm max height. Pin 1 is marked by a beveled corner or dot; devices are shipped tape-and-reel (2500 units).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Inverting Input B (−IN B) | High-impedance differential input node for second amplifier channel; requires matched source impedance to minimize clock feedthrough. |
| 2 | Non-Inverting Input B (+IN B) | High-impedance differential input node for second amplifier channel; thermally symmetric layout recommended to reduce Seebeck errors. |
| 3 | Output B (OUT B) | Low-impedance rail-to-rail output capable of sourcing/sinking ±20mA; drives capacitive loads ≤1000pF with <10% overshoot. |
| 4 | V− (Negative Supply) | Reference return for both amplifiers; must be decoupled with 0.1µF ceramic capacitor placed adjacent to pin. |
| 5 | V+ (Positive Supply) | Power input for both amplifiers; shares same decoupling requirement as V−; supports 2.7V–12V single or ±1.35V–±6V dual operation. |
| 6 | Non-Inverting Input A (+IN A) | High-impedance differential input node for first amplifier channel; identical electrical behavior to Pin 2. |
| 7 | Inverting Input A (−IN A) | High-impedance differential input node for first amplifier channel; identical electrical behavior to Pin 1. |
| 8 | Output A (OUT A) | Low-impedance rail-to-rail output identical in performance to Pin 3; enables dual-channel signal conditioning on single footprint. |
Key Features
| Feature | Design Value |
|---|---|
| Zero-drift auto-zero architecture | 0.05µV/°C max drift ensures long-term calibration stability in medical and industrial sensors without recalibration. |
| Rail-to-rail output swing | Within 50mV of supply rails at 10kΩ load - preserves full ADC input range when operating from 3.3V or 5V supplies. |
| Ultra-low input bias current | 200pA (max) enables high-impedance transducer interfaces (e.g., pH electrodes, piezoresistive bridges) without signal loss. |
| Single-supply operation | 2.7V minimum supply allows direct use with Li-ion batteries and energy-harvesting systems without boost converters. |
| Unity-gain stable | No external compensation required - simplifies design of gain-of-1 buffers, active filters, and precision integrators. |
Applications
| Transducer Signal Conditioning | Medical Instrumentation |
|---|---|
Use Scenario: Amplifying µV-level outputs from strain gauges, load cells, or pressure sensors in electronic scales. IC Role / Device Role / Timing Role: Precision instrumentation amplifier front-end with gain ≥100 and DC-coupled bandwidth <10Hz. Use Value: 5µV max offset and 0.05µV/°C drift eliminate thermal zero-shift errors that degrade scale accuracy across room-temperature variations. |
Use Scenario: Front-end amplification of ECG, EEG, or blood glucose sensor signals in portable diagnostic devices. IC Role / Device Role / Timing Role: Low-noise, low-drift gain stage preceding 16-bit ADC sampling at ≤1kHz. Use Value: 200pA max input bias current prevents loading of high-impedance biopotential electrodes; 750µA quiescent current extends battery life. |
| Temperature Measurement Systems | Battery-Powered Test Equipment |
Use Scenario: Cold-junction compensation and linearization of thermocouple outputs in handheld thermometers. IC Role / Device Role / Timing Role: Precision voltage follower and reference buffer for thermistor networks and RTD excitation. Use Value: Rail-to-rail output swing ensures full utilization of 3.3V ADC reference; low drift maintains ±0.1°C measurement accuracy over 0–50°C ambient. |
Use Scenario: Analog signal generation, filtering, and buffering in handheld multimeters and oscilloscope probes. IC Role / Device Role / Timing Role: Dual-channel op amp implementing active low-pass filter and precision rectifier in compact form factor. Use Value: SOIC-8 package fits space-constrained PCBs; 2.7V operation enables direct use with single-cell alkaline batteries. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2188AIDR | Higher 0.005µV/°C typical drift but wider 4MHz GBW and 2.5V/µs slew rate; no shutdown mode. | Better suited for higher-speed precision applications (e.g., 20-bit DAC buffers) where drift below 0.01µV/°C is mandatory. | Select OPA2188AIDR when system-level drift budget is <0.1µV over full temperature range and bandwidth >1MHz is required. |
| AD8629ARZ | Similar 1µV max offset and 0.02µV/°C drift, but 2.5MHz GBW and 1.5V/µs slew rate; SOIC-8, RoHS-compliant. | Offers lower noise (12nV/√Hz) and better PSRR (130dB) for noisy power environments; no auto-zero clock feedthrough. | Choose AD8629ARZ when minimizing switching noise in sensitive analog front-ends is prioritized over absolute lowest offset voltage. |
Compared with OPA2188AIDR and AD8629ARZ, the OPA2735AIDR provides the lowest guaranteed maximum offset voltage (5µV) and best cost-performance balance for DC-precision applications below 200kHz, while maintaining industry-standard SOIC-8 footprint and proven reliability in medical and industrial deployments.
Availability
OPA2735AIDR is available at Aetrix Electronics and suitable for medical instrumentation, electronic scales, and battery-powered test equipment requiring stable component supply, long-lifecycle support, and traceable sourcing for ISO 13485 and IATF 16949 compliant production.
Supply support for OPA2735AIDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in precision op amps and signal chain solutions.
The OPA2735AIDR belongs to TI's Zerø-Drift Series, designed specifically for high-accuracy, low-power, DC-critical applications including sensor signal conditioning, medical diagnostics, and portable instrumentation where long-term offset stability is non-negotiable.
FAQ
What is the maximum guaranteed input offset voltage for OPA2735AIDR over temperature?
The OPA2735AIDR has a maximum input offset voltage of 5µV across the full specified operating temperature range of −40°C to +85°C. This value is tested and guaranteed per TI's production test flow and appears in the Electrical Characteristics table under "Input Offset Voltage" with boldface limits applying over temperature. The OPA2735AIDR achieves this via auto-zero correction every 100µs, ensuring consistent DC accuracy without manual calibration.
Does OPA2735AIDR support single-supply operation, and what is its minimum supply voltage?
Yes, the OPA2735AIDR fully supports single-supply operation with a minimum supply voltage of 2.7V and a maximum of 12V. It is explicitly optimized for low-voltage, single-supply use cases such as battery-powered instruments and portable sensors. The input common-mode range extends from (V−) − 0.1V to (V+) − 1.5V, and the rail-to-rail output swings within 50mV of both rails - all verified under 2.7V single-supply conditions in the datasheet's Electrical Characteristics table.
What package type and pin count does OPA2735AIDR use?
The OPA2735AIDR uses an 8-pin SOIC (Small Outline Integrated Circuit) package, designated as "D" in TI's packaging nomenclature. Its dimensions are 3.9mm × 4.9mm with 1.27mm lead pitch and 1.75mm max height. This is confirmed in the PACKAGE/ORDERING INFORMATION table and the PACKAGE OUTLINE drawing D0008A. The device is supplied in tape-and-reel format with 2500 units per reel.
Is OPA2735AIDR unity-gain stable, and does it require external compensation?
Yes, the OPA2735AIDR is unity-gain stable and does not require external compensation components. The datasheet explicitly states "unity-gain stable and free from unexpected output phase reversal" in the Applications Information section. Its internal compensation ensures stable operation at closed-loop gains of 1 or greater, simplifying implementation in buffer, active filter, and precision integrator circuits without risk of oscillation.
What is the quiescent current per amplifier for OPA2735AIDR, and how does it scale with supply voltage?
The OPA2735AIDR draws a maximum quiescent current of 750µA per amplifier at any supply voltage from 2.7V to 12V. Typical values range from 600µA to 700µA across this range, as shown in the "SUPPLY CURRENT vs TEMPERATURE" plot (Figure 5). Unlike many op amps, its IQ exhibits minimal variation with supply voltage - a key enabler for battery-life predictability in portable instrumentation using the OPA2735AIDR.
OPA2735AIDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- Zero-Drift
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Zero-Drift
- Number of Circuits:
- 2
- Output Type:
- Differential, Rail-to-Rail
- Slew Rate:
- 1.5V/µs
- Gain Bandwidth Product:
- 1.6 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 100 pA
- Voltage - Input Offset:
- 1 µV
- Current - Supply:
- 600µA (x2 Channels)
- Current - Output / Channel:
- 20 mA
- Voltage - Supply Span (Min):
- 2.7 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
OPA2735AIDR FAQ
1.How can I place an order for OPA2735AIDR through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2735AIDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2735AIDR reliable?
The price and inventory of OPA2735AIDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2735AIDR is usually 5 days.
3.What payment methods are accepted for OPA2735AIDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2735AIDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2735AIDR?
OPA2735AIDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2735AIDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2735AIDR?
For technical support, including OPA2735AIDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2735AIDR requirements.
6.How does Aetrix verify that OPA2735AIDR is sourced from the original manufacturer or authorized distributors?
All OPA2735AIDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2735AIDR meets industry standards.
7.What is the process for return or replacement of OPA2735AIDR?
All OPA2735AIDR units undergo pre-shipment inspection (PSI). If there is an issue with OPA2735AIDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2735AIDR part is unused and in its original packaging.
Return procedure for OPA2735AIDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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