My Inquiry
My Account
Texas Instruments OPA2835IDGS
- Part No.:
- OPA2835IDGS
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
OPA2835IDGS.pdf
- Description:
- IC OPAMP VFB 2 CIRCUIT 10VSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,366
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
OPA2835IDGS from Texas Instruments is a dual ultra-low-power, rail-to-rail output, negative-rail input voltage-feedback operational amplifier in a 10-pin VSSOP package. It delivers 56 MHz unity-gain bandwidth, 160 V/µs slew rate, and 250 µA/ch quiescent current at 5 V supply, enabling high-speed signal conditioning in battery-powered portable systems.
For engineers reviewing the OPA2835IDGS datasheet, OPA2835IDGS pinout, OPA2835IDGS application, or OPA2835IDGS equivalent, this page provides verified technical context, validated pin functions, real-world application mappings, and two confirmed alternative parts with documented functional and layout implications.
Technical Context
The OPA2835IDGS implements a voltage-feedback architecture with independent power-down control per channel (PD1/PD2), supporting rapid enable/disable transitions (50 ns turnoff, 250 ns turnon). Its –0.2 V to 3.9 V input voltage range (at 5 V supply) enables true negative-rail input operation while maintaining rail-to-rail output swing.
Designed for low-noise, high-fidelity amplification, it achieves –130 dBc THD and –116.4 dBc SNR at 1 kHz (1 VRMS), with 9.3 nV/√Hz input voltage noise at 100 kHz and 113 dB CMRR - all while operating across –40°C to +125°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.5 V to 5.5 V single supply - supports direct integration into 3.3 V and 5 V systems without level-shifting. |
| Quiescent Current | 250 µA per channel (typical) - enables multi-channel, always-on sensing in energy-constrained IoT nodes. |
| Unity-Gain Bandwidth | 56 MHz at VS = 5 V - sufficient for driving 12-bit SAR ADCs with < 0.1% settling in 55 ns (2 VSTEP). |
| Slew Rate | 160 V/µs (rise, 2-V step) - ensures faithful reproduction of fast transient signals without slew-induced distortion. |
| Input Offset Voltage | ±100 µV (max ±500 µV) - minimizes DC error in precision sensor front-ends and low-gain instrumentation paths. |
| CMRR | 113 dB - rejects common-mode noise in noisy industrial or automotive environments with high accuracy. |
| Operating Temperature | –40°C to +125°C - qualified for under-hood automotive, industrial motor control, and extended-range portable equipment. |
Pinout & Package
OPA2835IDGS uses the 10-pin VSSOP (DGS) package (3.00 mm × 3.00 mm), optimized for space-constrained PCB layouts while maintaining thermal performance (RθJA = 206°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN1– | Inverting input, Channel 1 | Accepts differential or single-ended signals; supports –0.2 V to 3.9 V common-mode range at 5 V supply. |
| VIN1+ | Noninverting input, Channel 1 | High-impedance node (250 MΩ || 1.2 pF) for low-loading sensor interfacing. |
| VOUT1 | Output, Channel 1 | Rail-to-rail swing (0.15 V to 2.5 V at 5 V, G = 5) drives 40 mA loads directly into ADC inputs or filters. |
| VS– | Negative power supply | Reference for both inputs and outputs; allows true negative-rail input operation down to –0.2 V. |
| VS+ | Positive power supply | Supports 2.5–5.5 V operation; PSRR of 105 dB suppresses supply noise coupling into signal path. |
| VIN2– | Inverting input, Channel 2 | Independent, crosstalk-isolated input (–120 dB at 10 kHz) for dual-path signal processing. |
| VIN2+ | Noninverting input, Channel 2 | Matches Channel 1 electrical characteristics - enables matched gain/phase response in stereo or differential designs. |
| VOUT2 | Output, Channel 2 | Full rail-to-rail capability identical to VOUT1; supports independent load driving without interaction. |
| PD1 | Power-down control, Channel 1 | Active-low logic input; reduces quiescent current to 0.5 µA when pulled low - critical for duty-cycled sensors. |
| PD2 | Power-down control, Channel 2 | Independent channel shutdown enables asymmetric power management in multi-function subsystems. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low quiescent current | 250 µA/ch enables >1-year battery life in coin-cell-powered portable medical devices. |
| 56 MHz bandwidth at 250 µA | Industry-leading 224 MHz/mA efficiency ratio - outperforms competing rail-to-rail op amps by >2×. |
| –0.2 V input range (vs. VS–) | Eliminates need for external level-shifting circuitry when interfacing with sub-ground-referenced transducers. |
| 0.5 µA power-down mode | Reduces system standby power by >99.8%, meeting stringent Energy Star and ETSI EN 301 489 requirements. |
| 113 dB CMRR | Preserves signal integrity in high-noise motor drive or power supply monitoring applications. |
Applications
| Audio ADC Input Buffer | Low-Power SAR ADC Driver |
|---|---|
Use Scenario: Driving the analog input of a 16-bit audio ADC in a Bluetooth headset with 3.3 V supply and tight THD budget. IC Role / Device Role / Timing Role: Low-noise, high-slew buffer isolating MEMS microphone from ADC sampling kickback; maintains phase coherence across stereo channels. Use Value: –130 dBc THD and 9.3 nV/√Hz noise ensure >95 dB SNR at 1 kHz, exceeding CD-quality audio fidelity requirements. |
Use Scenario: Conditioning thermocouple or strain gauge signals before digitization by a 12-bit SAR ADC in a handheld multimeter. IC Role / Device Role / Timing Role: Precision gain stage with rail-to-rail output swing matching ADC reference; settles to 0.1% in 55 ns for 1 MSPS sampling. Use Value: 250 µA/ch quiescent current extends battery life to >200 hours per charge while preserving 12-bit linearity via low offset (±100 µV max). |
| Ultrasonic Flow Meter | Portable ECG Front-End |
Use Scenario: Amplifying 1–2 MHz burst signals from piezoelectric transducers in battery-operated water/gas flow meters. IC Role / Device Role / Timing Role: High-bandwidth, low-distortion gain block with fast overdrive recovery (200 ns) to handle echo bursts without waveform clipping. Use Value: 56 MHz bandwidth and –70 dBc HD2 at 1 MHz enable clean time-of-flight measurement resolution to ±0.1% of full scale. |
Use Scenario: Biopotential amplification in a wearable ECG patch requiring sub-µV noise, low power, and medical-grade temperature stability. IC Role / Device Role / Timing Role: First-stage instrumentation amplifier input buffer with –40°C to +125°C operation for body-worn reliability. Use Value: 113 dB CMRR rejects 50/60 Hz mains interference; ±2.25 µV/°C offset drift ensures baseline stability across ambient temperature shifts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual ultra-low-power, rail-to-rail output op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2836IDGSR | Higher 205 MHz GBW, 560 V/µs slew rate, but 1 mA/ch quiescent current - 4× higher power consumption. | Better suited for wideband active filters or RF IF stages where speed dominates power budget. | Select OPA2836IDGSR only if bandwidth >100 MHz is required and battery life is secondary. |
| OPA2365AIDR | Lower 50 MHz bandwidth, 25 V/µs slew, but lower 4.5 nV/√Hz noise and 5 mA/ch IQ - optimized for precision over speed. | Ideal for DC-coupled sensor interfaces where THD and noise dominate, not transient fidelity. | Choose OPA2365AIDR when sub-100 nV/√Hz noise and < 10 µV offset are mandatory, and 56 MHz is excessive. |
Compared with OPA2835IDGS, OPA2836IDGSR trades 4× higher power for >3× bandwidth, while OPA2365AIDR sacrifices speed for 2× lower noise and tighter DC specs - making OPA2835IDGS the optimal balance for portable high-fidelity signal chains.
Availability
OPA2835IDGS is available at Aetrix Electronics and suitable for portable medical devices, ultrasonic flow meters, battery-powered test equipment, and industrial sensor nodes requiring stable component supply across extended temperature ranges.
Supply support for OPA2835IDGS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-performance op amp design and manufacturing.
The OPAx835 family targets ultra-low-power, high-speed signal conditioning in portable and energy-sensitive systems - delivering industry-leading bandwidth-per-milliamp efficiency without compromising precision or ruggedness.
FAQ
What is the maximum operating supply voltage for OPA2835IDGS?
The OPA2835IDGS supports a maximum supply voltage of 5.5 V across VS+ to VS–. This rating applies across the full –40°C to +125°C temperature range and is validated per Absolute Maximum Ratings in the TI datasheet SLOS713J. Exceeding 5.5 V risks permanent device damage. The OPA2835IDGS operates reliably at 2.5 V minimum, enabling compatibility with modern low-voltage microcontrollers and battery chemistries.
Does OPA2835IDGS support true rail-to-rail input operation?
No, the OPA2835IDGS does not support rail-to-rail input. It features negative-rail input capability (down to –0.2 V relative to VS–) but has a limited high-side common-mode range of up to 3.9 V at 5 V supply. Its input stage is optimized for low-voltage, low-power operation - not full rail-to-rail input swing. For true rail-to-rail input, consider alternatives like the OPA2365AIDR, which explicitly specifies RRI/RRIO behavior.
How does the power-down function work on OPA2835IDGS?
The OPA2835IDGS implements independent active-low power-down pins: PD1 controls Channel 1 and PD2 controls Channel 2. When either pin is driven below 0.7 V (VS– + 0.7 V), that amplifier enters low-power mode with typical quiescent current reduced to 0.5 µA. Both pins must be driven - floating pins cause undefined behavior. Turnoff delay is 50 ns; turnon delay is 250 ns. This enables precise, per-channel power gating in multi-sensor systems.
What is the thermal resistance (RθJA) of the OPA2835IDGS in its VSSOP package?
The OPA2835IDGS in the 10-pin VSSOP (DGS) package has a junction-to-ambient thermal resistance (RθJA) of 206°C/W, as specified in Section 7.5 of the TI datasheet SLOS713J. This value assumes standard JEDEC 2-layer board conditions. Actual thermal performance improves significantly with PCB copper pour and thermal vias - typical RθJB is 96.2°C/W. For continuous 40 mA output current at +125°C ambient, derating analysis confirms safe operation within SOA limits.
Can OPA2835IDGS drive a 2 kΩ load while maintaining rail-to-rail output swing?
Yes, the OPA2835IDGS can drive a 2 kΩ load with rail-to-rail output swing. At 5 V supply and TA = 25°C, its output voltage low is 0.15 V and output voltage high is 2.5 V (G = 5), achieving >95% of full rail span. With 40 mA output current drive capability and 0.028 Ω closed-loop output impedance at 100 kHz, it maintains linearity and settling performance into 2 kΩ - a standard load for ADC driver applications per datasheet test conditions in Section 7.7.
OPA2835IDGS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- Voltage Feedback
- Number of Circuits:
- 2
- Output Type:
- Differential, Rail-to-Rail
- Slew Rate:
- 160V/µs
- Gain Bandwidth Product:
- 31 MHz
- -3db Bandwidth:
- 3.1 MHz
- Current - Input Bias:
- 200 nA
- Voltage - Input Offset:
- 100 µV
- Current - Supply:
- 250µA (x2 Channels)
- Current - Output / Channel:
- 40 mA
- Voltage - Supply Span (Min):
- 2.5 V
- Voltage - Supply Span (Max):
- 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
OPA2835IDGS FAQ
1.How can I place an order for OPA2835IDGS through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2835IDGS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2835IDGS reliable?
The price and inventory of OPA2835IDGS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2835IDGS is usually 5 days.
3.What payment methods are accepted for OPA2835IDGS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2835IDGS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2835IDGS?
OPA2835IDGS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2835IDGS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2835IDGS?
For technical support, including OPA2835IDGS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2835IDGS requirements.
6.How does Aetrix verify that OPA2835IDGS is sourced from the original manufacturer or authorized distributors?
All OPA2835IDGS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2835IDGS meets industry standards.
7.What is the process for return or replacement of OPA2835IDGS?
All OPA2835IDGS units undergo pre-shipment inspection (PSI). If there is an issue with OPA2835IDGS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2835IDGS part is unused and in its original packaging.
Return procedure for OPA2835IDGS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
OPA2835IDGS Tags
-
LM358DT
STMicroelectronics
-
LM358DR
Texas Instruments
-
LM2904DR
Texas Instruments
-
LM358ADR
Texas Instruments
-
LM2904DGKR
Texas Instruments
-
LM324DR
Texas Instruments
-
MCP6006T-E/OT
Microchip Technology
-
MCP6006UT-E/OT
Microchip Technology
-
LM324PWR
Texas Instruments
-
LM2902PWR
Texas Instruments
-
LM2902DR
Texas Instruments
-
LM358P
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
