Texas Instruments OPA2890IDGSR
- Part No.:
- OPA2890IDGSR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
OPA2890IDGSR.pdf
- Description:
- IC OPAMP VFB 2 CIRCUIT 10VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,168
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Product details
Overview
OPA2890IDGSR from Texas Instruments is a dual, unity-gain stable, voltage-feedback operational amplifier with disable control, designed for high-speed analog signal conditioning. It delivers 90MHz bandwidth at G = +2V/V, 400V/μs slew rate, ±4.1V output swing (±5V supplies), and 1.1mA/ch quiescent current - enabling RGB line driving, ADC input buffering, and portable instrumentation under tight power constraints.
For engineers reviewing the OPA2890IDGSR datasheet, OPA2890IDGSR pinout, OPA2890IDGSR application, or OPA2890IDGSR equivalent, this page provides verified electrical specifications, MSOP-10 package terminal mapping, disable timing behavior, video-grade distortion performance (0.05% differential gain), and real-world selection guidance against comparable dual wideband op amps.
Technical Context
The OPA2890IDGSR employs a novel transconductance-input architecture that dynamically steers current to the compensation capacitor, enabling 400V/μs slew rate without sacrificing unity-gain stability. Unlike conventional voltage-feedback op amps, it avoids fixed-bias current steering limitations, achieving full-power bandwidth previously reserved for current-feedback devices.
Its dual-channel design supports independent disable control (MSOP-10 only), with sub-7μs disable time and 200ns enable time, while maintaining high channel-to-channel isolation (–68dB at 5MHz) and low crosstalk. The amplifier operates from ±1.5V to ±6V or +3V to +12V single supply, with rail-swing capability optimized for DC-coupled ADC interfaces and video signal chains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Small-signal BW (G = +2V/V) | 90MHz @ ±5V - supports >80MHz video and imaging signal bandwidths with <0.1dB flatness up to 15MHz. |
| Slew rate | 400V/μs @ ±5V - enables clean 2VPP step response in ≤3.5ns with 16ns settling to 0.02%. |
| Output swing (RL = 100Ω) | ±3.6V @ ±5V - delivers 7.2VPP drive into 100Ω loads, sufficient for 150Ω video termination and SAR ADC front-ends. |
| Quiescent current | 1.1mA per channel @ ±5V - enables dual-channel operation below 2.5mA total, critical for battery-powered instruments. |
| Disable current | 30μA per channel (MSOP-10) - reduces system standby power by >98% versus active mode, with fast 7μs shutdown. |
| Differential gain/phase | 0.05% / 0.03° @ 1.4VPP - meets broadcast video line driver requirements per SMPTE 253M. |
| Input voltage noise | 8nV/√Hz @ f > 100kHz - low enough for 16-bit SAR ADC (e.g., ADS8472) buffer applications without SNR degradation. |
Pinout & Package
OPA2890IDGSR is housed in a 10-pin MSOP (DGS) package with exposed thermal pad, optimized for high-density PCB layouts and thermal performance (θJA = 135°C/W). Pin functions are validated per TI SBOS364C Rev. C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (–In A) | Inverting input, Channel A | DC-coupled high-impedance node; requires matched source impedance for offset minimization. |
| 2 (Out A) | Output, Channel A | Capable of ±40mA continuous drive; output goes high-Z when DIS A = low. |
| 3 (+VS) | Positive supply | Accepts +3V to +12V (single) or ±1.5V to ±6V (dual); decoupling to –VS required. |
| 4 (Out B) | Output, Channel B | Independent output with same drive strength and disable behavior as Out A. |
| 5 (–In B) | Inverting input, Channel B | Electrically isolated from Channel A; crosstalk < –68dB at 5MHz. |
| 6 (+In A) | Non-inverting input, Channel A | Used for unity-gain follower or non-inverting gain configurations; bias current cancellation enabled via external resistor. |
| 7 (DIS A) | Disable control, Channel A | Active-low logic input; pulls output to high-Z and reduces IQ to 30μA when ≤0.8V. |
| 8 (–VS) | Negative supply | Required for dual-supply operation; tied to ground for single-supply use with proper input biasing. |
| 9 (DIS B) | Disable control, Channel B | Independent disable for Channel B; no interaction with DIS A. |
| 10 (+In B) | Non-inverting input, Channel B | Functionally identical to +In A; supports dual-channel synchronous signal conditioning. |
Key Features
| Feature | Design Value |
|---|---|
| Unity-gain stable wideband operation | 250MHz small-signal BW at G = +1V/V ensures stability without external compensation in buffer or gain-of-1 configurations. |
| Single-supply video drive capability | +5V operation delivers 0.9V to 4.1V output swing - covers full NTSC/PAL 1VPP range with 300mV headroom on each rail. |
| Low-distortion differential signaling | –68dB channel crosstalk and 84dB 2nd-harmonic rejection at 1MHz support clean dual-channel imaging and xDSL receiver paths. |
| Thermally robust MSOP-10 package | Exposed thermal pad enables 135°C/W junction-to-ambient resistance, supporting continuous 35mA output current at +85°C ambient. |
| Fast, low-power disable control | 7μs disable time and 200ns enable time allow dynamic power gating in burst-mode data acquisition systems without signal interruption. |
Applications
| Video Line Driving | xDSL Line Drivers/Receivers |
|---|---|
|
Use Scenario: Driving 75Ω coaxial cable in RGB/HDMI transmitter front-ends or broadcast camera signal chains. IC Role / Device Role / Timing Role: Dual-channel buffer amplifying red/green/blue or Y/C signals with matched gain and phase. Use Value: 0.05% differential gain and 0.03° phase error preserve color fidelity across 4.2MHz luminance bandwidth. |
Use Scenario: Transmitting and receiving analog DSL signals over twisted-pair telephone lines in ADSL2+ modems. IC Role / Device Role / Timing Role: High-linearity receive-path amplifier and transmit driver with fast enable/disable for echo cancellation. Use Value: 90MHz bandwidth and –68dB crosstalk prevent upstream/downstream signal interference in full-duplex operation. |
| High-Speed Imaging Channels | ADC Buffers |
|
Use Scenario: Conditioning analog outputs from CMOS image sensors in medical ultrasound or industrial machine vision systems. IC Role / Device Role / Timing Role: Dual-channel signal conditioner feeding two parallel 16-bit SAR ADCs (e.g., ADS8472) at 1MSPS. Use Value: 8nV/√Hz input noise and 16ns settling to 0.02% ensure <1LSB error in 16-bit conversion at full throughput. |
Use Scenario: Driving the input of precision SAR ADCs in portable test equipment and data loggers. IC Role / Device Role / Timing Role: Low-noise, low-output-impedance buffer isolating ADC sample-and-hold from source impedance variations. Use Value: 0.04Ω closed-loop output impedance maintains gain accuracy across varying ADC input capacitance (10–500pF). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual wideband operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2889IDGST | Lower quiescent current (0.9mA/ch), reduced bandwidth (65MHz @ G=+2), no disable function. | Better suited for always-on ultra-low-power imaging or sensor interfaces where disable is unnecessary. | Select OPA2889IDGST when power budget is <2mA total and disable control is not required. |
| OPA2690U | Higher slew rate (1800V/μs), wider bandwidth (280MHz @ G=+2), but higher IQ (4.5mA/ch) and no disable. | Preferred for RF IF amplification or pulse amplification where speed outweighs power constraints. | Choose OPA2690U when >200MHz bandwidth and sub-2ns rise time are mandatory, and power is secondary. |
Compared with OPA2890IDGSR, OPA2889IDGST trades 25MHz bandwidth and disable capability for 0.2mA/ch lower quiescent current, while OPA2690U sacrifices 3.4× higher supply current to deliver >3× faster slew rate and >2× bandwidth - making OPA2890IDGSR the optimal balance for portable, video, and ADC-buffering applications requiring both speed and efficiency.
Availability
OPA2890IDGSR is available at Aetrix Electronics and suitable for video line driving, xDSL line drivers/receivers, and high-speed imaging channels requiring stable component supply, long-term lifecycle support, and traceable sourcing from authorized channels.
Supply support for OPA2890IDGSR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-performance op amp design and manufacturing.
The OPA2890IDGSR belongs to TI's precision wideband op amp product line, engineered specifically for applications demanding unity-gain stability, low power, and high-fidelity signal conditioning in video, communications, and data acquisition systems.
FAQ
What supply voltage ranges does the OPA2890IDGSR support?
The OPA2890IDGSR operates from ±1.5V to ±6V dual supplies or +3V to +12V single supply. At ±5V, it delivers ±4.1V output swing into high-Z loads; at +5V, it achieves +0.9V to +4.1V output swing with proper input biasing. Absolute maximum ratings cap at ±6.5V supply, and thermal derating applies above +85°C ambient.
Does the OPA2890IDGSR require external compensation for unity-gain stability?
No - the OPA2890IDGSR is internally compensated for unity-gain stability, delivering 250MHz small-signal bandwidth at G = +1V/V without external components. This eliminates layout sensitivity and ensures predictable performance in buffer, follower, and gain-of-1 configurations across temperature and process variation.
How does the disable function behave on the OPA2890IDGSR?
The OPA2890IDGSR's disable pins (DIS A and DIS B) are active-low inputs available only in the MSOP-10 package. When pulled ≤0.8V, each channel enters low-power state (<30μA/ch supply current) and its output transitions to high-impedance within 7μs. Outputs return to normal operation within 200ns after DIS rises above 3.0V.
Can the OPA2890IDGSR drive a 150Ω video load while maintaining SMPTE compliance?
Yes - the OPA2890IDGSR achieves 0.05% differential gain and 0.03° differential phase error driving 150Ω loads at 1.4VPP, meeting SMPTE 253M broadcast video standards. Its 90MHz bandwidth at G = +2V/V and low harmonic distortion (84dB 2nd-harmonic rejection) ensure minimal color bleeding and timing jitter in RGB or composite video paths.
What is the thermal performance of the OPA2890IDGSR in its MSOP-10 package?
The OPA2890IDGSR in MSOP-10 (DGS) package has a junction-to-ambient thermal resistance (θJA) of 135°C/W. With its 2.25mA max quiescent current and ±40mA output drive capability, it sustains continuous operation at +85°C ambient when mounted on 2oz copper with standard thermal vias - verified per TI SBOS364C thermal characterization data.
OPA2890IDGSR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Voltage Feedback
- Number of Circuits:
- 2
- Output Type:
- -
- Slew Rate:
- 400V/µs
- Gain Bandwidth Product:
- 120 MHz
- -3db Bandwidth:
- 250 MHz
- Current - Input Bias:
- 100 nA
- Voltage - Input Offset:
- 2 mV
- Current - Supply:
- 2.25mA (x2 Channels)
- Current - Output / Channel:
- 40 mA
- Voltage - Supply Span (Min):
- 3 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-VSSOP
OPA2890IDGSR FAQ
1.How can I place an order for OPA2890IDGSR through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA2890IDGSR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA2890IDGSR reliable?
The price and inventory of OPA2890IDGSR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA2890IDGSR is usually 5 days.
3.What payment methods are accepted for OPA2890IDGSR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA2890IDGSR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA2890IDGSR?
OPA2890IDGSR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA2890IDGSR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA2890IDGSR?
For technical support, including OPA2890IDGSR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA2890IDGSR requirements.
6.How does Aetrix verify that OPA2890IDGSR is sourced from the original manufacturer or authorized distributors?
All OPA2890IDGSR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA2890IDGSR meets industry standards.
7.What is the process for return or replacement of OPA2890IDGSR?
All OPA2890IDGSR units undergo pre-shipment inspection (PSI). If there is an issue with OPA2890IDGSR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA2890IDGSR part is unused and in its original packaging.
Return procedure for OPA2890IDGSR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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