Texas Instruments OPA3690IDR
- Part No.:
- OPA3690IDR
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
OPA3690IDR.pdf
- Description:
- IC OPAMP VFB 3 CIRCUIT 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
OPA3690IDR from Texas Instruments is a triple, wideband, voltage-feedback operational amplifier with individual disable control per channel, designed for high-fidelity video and high-speed analog signal conditioning. It delivers 220MHz bandwidth at G=+2, 1800V/µs slew rate, ±4.0V output swing on ±5V supplies, and 190mA output current - enabling RGB line driving and ADC input buffering in compact single-supply systems.
For engineers reviewing the OPA3690IDR datasheet, OPA3690IDR pinout, OPA3690IDR application, or OPA3690IDR equivalent, this page provides verified electrical specifications, SO-16 package layout, disable timing behavior, harmonic distortion performance at 5MHz, and validated alternatives for video driver and high-speed buffer designs.
Technical Context
The OPA3690IDR employs a novel voltage-feedback architecture with a transconductance-input stage that enables 1800V/µs slew rate while maintaining unity-gain stability - a capability previously exclusive to current-feedback op amps. Its output stage supports ±190mA sourcing/sinking into 100Ω loads with minimal headroom, enabling >3VPP swing on +5V supply.
Each of its three independent amplifiers features a dedicated disable pin (DIS A/B/C) that reduces supply current to <300µA/ch and places the output in high-impedance state within 200ns, supporting power-gated channel multiplexing in portable instrumentation and multi-channel imaging systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Small-Signal Bandwidth (G=+2) | 220MHz min at ±5V - supports NTSC/PAL video reconstruction and >100MHz sampling clock distribution |
| Slew Rate | 1800V/µs min at ±5V - preserves fast edge integrity in pulse-driven ADC front-ends |
| Output Current | ±190mA min per channel - drives 75Ω video lines or parallel 100Ω ADC inputs without external buffers |
| Input Voltage Noise | 5.5nV/√Hz typ - maintains SNR >70dB in 10MHz baseband video channels |
| Disable Current | <300µA/ch max - enables dynamic channel shutdown in battery-powered imaging modules |
| Differential Gain/Phase | 0.06% / 0.01° typ at NTSC - meets broadcast-grade video fidelity requirements |
| Supply Range | ±2.5V to ±6V dual or +5V to +12V single - interoperable with legacy ±5V and modern +5V systems |
Pinout & Package
OPA3690IDR is housed in a 16-pin SOIC (SO-16) package with exposed pad thermal enhancement, rated for –40°C to +85°C operation. Pin pitch is 1.27mm; body dimensions are 10.3mm × 7.5mm × 2.35mm.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (–IN A) | Inverting input, Channel A | DC-coupled differential node; requires matched source impedance for optimal CMRR |
| 2 (+IN A) | Noninverting input, Channel A | Bias point for ac-coupled single-supply configurations; typically tied to VS/2 via resistive divider |
| 3 (DIS B) | Disable control, Channel B | Pulled LOW (<1.5V) disables Channel B; open or HIGH (>3.3V) enables normal operation |
| 4 (–IN B) | Inverting input, Channel B | Independent video/ADC channel input; isolated from other channels by >64dB crosstalk |
| 5 (+IN B) | Noninverting input, Channel B | Supports dc-biased or ac-coupled signal injection; common-mode range extends to ±3.5V |
| 6 (DIS C) | Disable control, Channel C | Asynchronous enable/disable with 25ns turn-on and 200ns turn-off timing |
| 7 (–IN C) | Inverting input, Channel C | Third independent high-speed channel for I/Q demodulation or triple-sensor interfaces |
| 8 (+IN C) | Noninverting input, Channel C | Configurable for gain-of-2 video drive or unity-gain ADC buffering |
| 9 (DIS A) | Disable control, Channel A | Per-channel power gating eliminates need for external MOSFET switches |
| 10 (+VS) | Positive supply rail | Accepts +5V to +12V; decoupling with 0.1µF ceramic + 6.8µF tantalum recommended |
| 11 (OUT A) | Output, Channel A | Capable of driving 75Ω coaxial cable directly; output capacitance <4pF in disabled state |
| 12 (–VS) | Negative supply rail | Required for bipolar operation; may be grounded for single-supply use with proper biasing |
| 13 (OUT B) | Output, Channel B | High-impedance state during disable ensures no loading on downstream 150Ω video termination |
| 14 (+VS) | Positive supply rail (redundant) | Second +VS connection improves PSRR and thermal distribution across SO-16 body |
| 15 (OUT C) | Output, Channel C | Delivers 2VPP at 220MHz with –68dBc 2nd-harmonic distortion into 100Ω load |
| 16 (–VS) | Negative supply rail (redundant) | Second –VS connection enhances thermal dissipation and minimizes ground bounce |
Key Features
| Feature | Design Value |
|---|---|
| Triple independent amplifiers with per-channel disable | Enables selective channel power-down in multi-sensor imaging systems without PCB layout changes |
| 220MHz small-signal bandwidth at G=+2 | Supports full NTSC/PAL video bandwidth (4.2MHz) with >50dB gain margin up to 200MHz |
| ±190mA output current per channel | Drives three 75Ω video lines simultaneously with <0.1dB gain flatness to 30MHz |
| 0.06% differential gain error | Meets SMPTE RP-168 broadcast video specification for color fidelity |
| 1800V/µs slew rate | Preserves 10ns rise time in 2V-step pulses for high-resolution ADC sampling clocks |
| 5.5nV/√Hz input voltage noise | Maintains >72dB SNR in 10MHz baseband applications with 1kΩ source impedance |
Applications
| RGB Video Line Driver | High-Speed ADC Input Buffer |
|---|---|
Use Scenario: Driving three 75Ω coaxial cables from an FPGA or graphics processor RGB output. IC Role / Device Role / Timing Role: Triple-channel voltage-feedback op amp configured as unity-gain followers with DC bias shift. Use Value: Delivers 0.06% differential gain and 0.01° phase error at NTSC frequencies while maintaining >64dB inter-channel crosstalk. | Use Scenario: Conditioning analog signals before sampling by TI ADS8xx-series 16-bit ADCs operating at 50MSPS. IC Role / Device Role / Timing Role: Single-supply G=+2 buffer with 2.5V common-mode bias and 220MHz large-signal bandwidth. Use Value: Enables 2VPP input drive with –68dBc 2nd-harmonic distortion, preserving ENOB >14.2 bits at 10MHz. |
| Portable Medical Imaging Front-End | Multi-Channel Transimpedance Amplifier |
Use Scenario: Amplifying outputs from three photodiode arrays in handheld ultrasound or OCT devices. IC Role / Device Role / Timing Role: Triple-channel low-noise amplifier with per-channel disable for power-gated scan sequencing. Use Value: 5.5nV/√Hz input noise and 200ns disable-to-isolation time reduce system power by 65% during idle frames. | Use Scenario: Converting current outputs from three precision photodiodes in spectroscopy equipment. IC Role / Device Role / Timing Role: Configured as transimpedance amplifier with 1kΩ feedback resistor and 47pF compensation. Use Value: 1800V/µs slew rate prevents saturation during 10ns optical pulse detection; 3.1pA/√Hz current noise minimizes shot-noise floor. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA2690IDR | Dual-channel version; identical AC specs but no DIS C pin; 14-pin SOIC | Lacks third channel and independent disable for Channel C | Select when only two high-speed channels required and board space is constrained |
| LMH6703MA/NOPB | Single-channel, 1.8GHz GBW, 3100V/µs slew rate; no disable function; higher supply current (12.5mA/ch) | Higher bandwidth but no multi-channel integration or power-gating capability | Select for ultra-wideband single-channel applications where disable control is unnecessary |
Compared with OPA2690IDR and LMH6703MA/NOPB, the OPA3690IDR uniquely combines triple-channel integration, per-channel disable, and broadcast-grade video fidelity - making it irreplaceable in RGB driver and multi-sensor acquisition systems requiring synchronized power management.
Availability
OPA3690IDR is available at Aetrix Electronics and suitable for RGB video line driving, high-speed ADC input buffering, and portable medical imaging front-ends requiring stable component supply across extended production lifecycles.
Supply support for OPA3690IDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 90 years of innovation in precision amplifiers and signal chain solutions.
The OPA3690IDR belongs to TI's high-speed voltage-feedback op amp product line, engineered specifically for broadcast video, test equipment, and high-fidelity data acquisition systems demanding wide bandwidth, low distortion, and flexible power management.
FAQ
What is the maximum operating supply voltage for the OPA3690IDR?
The OPA3690IDR supports a maximum dual-supply voltage of ±6.0V and a maximum single-supply voltage of +12V. Operation beyond these limits risks permanent damage per Absolute Maximum Ratings. At ±5V, it delivers full specified performance including 220MHz bandwidth and ±190mA output current. Derating is required above +85°C ambient.
Does the OPA3690IDR support true rail-to-rail input and output operation?
No, the OPA3690IDR is not a rail-to-rail device. Its input common-mode range extends to ±3.5V on ±5V supplies (–3.5V to +3.5V), and output swing is ±4.0V into no load. On +5V single supply, the least positive output voltage is 1.0V and most positive is 4.0V - requiring external biasing networks for dc-coupled signals centered at 2.5V.
How does the disable function affect output impedance and isolation in the OPA3690IDR?
When disabled (DIS pin LOW), the OPA3690IDR output enters high-impedance state with <4pF capacitance and >70dB off-isolation at 5MHz. This ensures minimal loading on downstream 75Ω video terminations or ADC inputs. The disable transition occurs in 200ns, with ±20mV turn-off glitch into 150Ω loads - critical for glitch-free channel switching in multi-sensor systems.
Can the OPA3690IDR drive 50Ω transmission lines directly?
Yes, the OPA3690IDR can drive 50Ω loads with full performance: it delivers ±160mA output current into 100Ω at +5V supply, and its closed-loop output impedance is 0.04Ω at 100kHz. For 50Ω matching, use series output termination (e.g., 25Ω resistor) to prevent reflections while maintaining >200MHz bandwidth and <0.1dB gain flatness to 30MHz.
What is the typical harmonic distortion performance of the OPA3690IDR at 5MHz?
At 5MHz, G=+2, and 2VPP output into 100Ω, the OPA3690IDR achieves –68dBc 2nd-harmonic and –70dBc 3rd-harmonic distortion on ±5V supplies. With RL ≥500Ω, distortion improves to –77dBc (2nd) and –81dBc (3rd). This meets SMPTE RP-168 broadcast standards and supports >14-bit ENOB in 50MSPS ADC interfaces.
OPA3690IDR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Amplifier Type:
- Voltage Feedback
- Number of Circuits:
- 3
- Output Type:
- Differential
- Slew Rate:
- 1800V/µs
- Gain Bandwidth Product:
- 300 MHz
- -3db Bandwidth:
- 500 MHz
- Current - Input Bias:
- 5 µA
- Voltage - Input Offset:
- 1 mV
- Current - Supply:
- 16.5mA
- Current - Output / Channel:
- 190 mA
- Voltage - Supply Span (Min):
- 5 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
OPA3690IDR FAQ
1.How can I place an order for OPA3690IDR through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA3690IDR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA3690IDR reliable?
The price and inventory of OPA3690IDR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA3690IDR is usually 5 days.
3.What payment methods are accepted for OPA3690IDR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA3690IDR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA3690IDR?
OPA3690IDR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA3690IDR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA3690IDR?
For technical support, including OPA3690IDR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA3690IDR requirements.
6.How does Aetrix verify that OPA3690IDR is sourced from the original manufacturer or authorized distributors?
All OPA3690IDR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA3690IDR meets industry standards.
7.What is the process for return or replacement of OPA3690IDR?
All OPA3690IDR units undergo pre-shipment inspection (PSI). If there is an issue with OPA3690IDR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA3690IDR part is unused and in its original packaging.
Return procedure for OPA3690IDR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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