Texas Instruments OPA3695IDBQ
- Part No.:
- OPA3695IDBQ
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
OPA3695IDBQ.pdf
- Description:
- IC OPAMP CFA 3 CIRCUIT 16SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,368
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Product details
Overview
OPA3695IDBQ from Texas Instruments is a triple, ultra-wideband current-feedback operational amplifier optimized for high-gain video and ADC/DAC buffering applications. It delivers 900MHz small-signal bandwidth at G = +2V/V, 4300V/µs slew rate, ±4V output swing (±5V supply), 1.8nV/√Hz input voltage noise, and ±120mA output drive per channel - enabling high-fidelity RGB line driving and IF SAW filter buffering in broadcast and imaging systems.
For engineers reviewing the OPA3695IDBQ datasheet, OPA3695IDBQ pinout, OPA3695IDBQ application, or OPA3695IDBQ equivalent, key selection criteria include its current-feedback architecture for gain-independent bandwidth, disable-controlled power-down (100µA/channel), split- or single-supply operation (±1.75V to ±6V or +3.5V to +12V), and SSOP-16 package compatibility with high-density video signal chains.
Technical Context
The OPA3695IDBQ implements a current-feedback topology with transimpedance gain (ZOL) of 85kΩ (min) and low inverting-input resistance (33Ω typ), enabling stable high-frequency operation up to 900MHz without sacrificing gain flatness. Its three independent amplifiers share a common disable control structure but operate with fully isolated signal paths, supporting simultaneous RGB or multi-channel IF processing.
Each channel features a fast enable time (25ns) and disable time (1µs), low turn-on/off glitches (±100mV / ±20mV), and off-isolation >77dB at 10MHz - critical for time-multiplexed or power-gated video pipelines. The device maintains <0.04% differential gain and 0.007° differential phase error under NTSC conditions, confirming suitability for analog video standards compliance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Small-signal BW (G = +2) | 900MHz - enables full HD/3G-SDI signal integrity without external equalization |
| Slew rate (G = –8) | 4300V/µs - supports 600MHz large-signal (2VPP) response into 100Ω |
| Output voltage swing | ±3.9V (100Ω load, ±5V supply) - delivers 7.8VPP dynamic range for 10-bit+ ADC front-ends |
| Input voltage noise | 1.8nV/√Hz - preserves SNR in wideband instrumentation and imaging chain pre-amplification |
| Disable current | 100µA/channel - reduces total system quiescent power by >99% during idle periods |
| Supply range | ±1.75V to ±6V or +3.5V to +12V - supports legacy ±5V, modern +5V-only, and industrial +12V rails |
| Harmonic distortion (2nd/3rd) | –65dBc / –86dBc @ 10MHz, G = +8 - meets broadcast-grade video linearity requirements |
Pinout & Package
The OPA3695IDBQ is housed in a 16-pin SSOP (Shrink Small Outline Package) with 0.65mm pitch, JEDEC MO-153 compliant, thermal resistance θJA = 80°C/W. Pin 1 is marked with a dot; package dimensions are 4.9 × 6.0 × 1.75 mm (L × W × H).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (–IN A) | Inverting input, Channel A | Current-feedback node; requires matched impedance (e.g., 50Ω) for optimal bandwidth and stability |
| 2 (+IN A) | Noninverting input, Channel A | High-impedance bias point (280kΩ || 1.2pF); used for DC-coupled reference or AC-coupled signal injection |
| 3 (OUT A) | Output, Channel A | Capable of ±120mA sourcing/sinking; drives 75Ω/150Ω video loads directly with <0.04% differential gain error |
| 4 (DIS A) | Disable control, Channel A | Active-low logic input; pulls below 1.5V to enter 100µA low-power state; open or >3.3V for normal operation |
| 5 (–IN B) | Inverting input, Channel B | Independent current-feedback node; electrically isolated from Channels A and C |
| 6 (+IN B) | Noninverting input, Channel B | Same high-Z input as Channel A; supports individual DC biasing per channel |
| 7 (OUT B) | Output, Channel B | Full output drive capability identical to OUT A; enables simultaneous RGB or dual IF path buffering |
| 8 (DIS B) | Disable control, Channel B | Independent disable control; allows selective power gating of individual channels |
| 9 (–IN C) | Inverting input, Channel C | Third independent current-feedback input; supports tri-state or time-sliced multi-channel architectures |
| 10 (+IN C) | Noninverting input, Channel C | Matches input characteristics of Channels A/B; supports common-mode voltage range of ±3.3V (±5V supply) |
| 11 (OUT C) | Output, Channel C | Delivers same 4300V/µs slew and ±4V swing as other outputs; validated for TVP7002 ADC interface |
| 12 (DIS C) | Disable control, Channel C | Enables granular power management across all three channels without inter-channel crosstalk |
| 13 (–VS) | Negative supply rail | Accepts –1.75V to –6V; must be decoupled with 0.1µF ceramic near pin |
| 14 (+VS) | Positive supply rail | Accepts +1.75V to +6V (split) or +3.5V to +12V (single); 12.9mA/channel quiescent draw at ±5V |
| 15 (NC) | No connect | Internally unused; must remain unconnected and unbonded per TI design |
| 16 (NC) | No connect | Internally unused; no routing or thermal connection required |
Key Features
| Feature | Design Value |
|---|---|
| Triple current-feedback architecture | Three independent amplifiers sharing disable controls but with isolated signal paths for RGB or multi-IF parallel processing |
| Gain-independent bandwidth scaling | Bandwidth remains >450MHz even at G = +8V/V - eliminates need for multiple op-amp types across gain stages |
| Low-glitch enable/disable | ±100mV turn-on and ±20mV turn-off voltage transients - prevents visible artifacts in video sync or burst-mode imaging |
| Single-supply video optimization | Operates on +5V with 0.9V to 4.2V output swing (100Ω load), enabling direct interface to 2.5V-referenced ADCs like TVP7002 |
| High-output-current drive | ±120mA per channel - drives multiple 75Ω video lines or 150Ω SAW filter loads without external buffers |
| Ultra-low harmonic distortion | –86dBc 3rd harmonic @ 10MHz, G = +8 - exceeds SMPTE 253M and ITU-R BT.601 linearity requirements |
Applications
| RGB Video Line Driver | ADC Front-End Buffer |
|---|---|
|
Use Scenario: Driving red/green/blue analog signals from graphics processor to 75Ω coaxial video inputs of broadcast monitors or capture cards. IC Role / Device Role / Timing Role: Triple-channel unity-to-gain-of-2 buffer with matched propagation delay (<1ns skew) and sub-0.01° differential phase. Use Value: Preserves color fidelity and timing alignment across all three channels; eliminates need for discrete resistor networks or separate op-amps per color. |
Use Scenario: Conditioning analog video or IF signals prior to digitization by high-speed ADCs such as TVP7002 (10-bit, 165MSPS). IC Role / Device Role / Timing Role: High-SNR, low-distortion driver providing ±4V swing into 100Ω, synchronized with ADC sampling clock. Use Value: Maximizes effective number of bits (ENOB) by minimizing noise floor (1.8nV/√Hz) and harmonic distortion (–86dBc). |
| SAW Filter IF Buffer | High-Speed Imaging Signal Chain |
|
Use Scenario: Amplifying intermediate frequency outputs from surface acoustic wave (SAW) filters in radar or spectrum analyzer front-ends. IC Role / Device Role / Timing Role: Wideband gain stage (G = +8V/V) with 450MHz bandwidth and >35dBm third-order intercept. Use Value: Maintains signal integrity and dynamic range across 10–100MHz IF bands; avoids compression or intermodulation in multi-tone environments. |
Use Scenario: Transmitting pixel clock-synchronized analog signals from CMOS/CCD image sensors to FPGA-based digitizers in medical or machine vision systems. IC Role / Device Role / Timing Role: Low-jitter, fast-settling (10ns to 0.1%) buffer delivering 2VPP pulses at >100MHz pixel rates. Use Value: Enables accurate pixel-level amplitude reproduction and eliminates settling-induced edge smearing in high-resolution imaging. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-bandwidth operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA3691IDBQ | Triple CFB op-amp with 500MHz BW (G = +2), 2000V/µs slew, 1.9nV/√Hz noise, and no disable function | Lacks channel disable; lower bandwidth limits use in >1080p60 or 3G-SDI systems | Select when power gating is unnecessary and cost sensitivity outweighs performance margin |
| THS3202D | Dual CFB op-amp with 600MHz BW (G = +2), 3000V/µs slew, 2.1nV/√Hz noise, and ±15V supply support | Dual (not triple); higher supply range but no integrated disable; different pinout and layout footprint | Choose for ±15V industrial systems where triple-channel integration is not required |
Compared with OPA3695IDBQ, OPA3691IDBQ offers lower power and cost but sacrifices 400MHz bandwidth and disable functionality, while THS3202D provides higher voltage tolerance and dual-channel flexibility at the expense of missing one channel and requiring board redesign.
Availability
OPA3695IDBQ is available at Aetrix Electronics and suitable for broadcast video infrastructure, high-speed data acquisition, and medical imaging systems requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for OPA3695IDBQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in high-speed op-amps and precision signal-chain solutions.
The OPA3695IDBQ belongs to TI's Ultra-Wideband Current-Feedback Op-Amp product line, engineered specifically for demanding video, instrumentation, and communications applications requiring GHz-class bandwidth and sub-nanosecond settling.
FAQ
What is the maximum operating temperature range for the OPA3695IDBQ?
The OPA3695IDBQ is specified for operation from –40°C to +85°C ambient temperature, validated across this full industrial range with guaranteed performance for parameters including bandwidth, slew rate, and distortion. Thermal resistance θJA is 80°C/W in the SSOP-16 package, allowing reliable operation in enclosed enclosures with standard airflow.
Can the OPA3695IDBQ operate from a single +5V supply?
Yes, the OPA3695IDBQ supports single-supply operation from +3.5V to +12V. At +5V, it delivers 0.9V to 4.2V output swing (no load) and maintains 395MHz bandwidth at G = +8V/V. Input common-mode range extends from 1.7V to 3.3V, enabling direct interface with 2.5V-referenced ADCs using simple resistive biasing.
How does the disable function affect channel isolation in the OPA3695IDBQ?
When disabled (DIS pin <1.5V), each channel draws only 100µA and achieves >77dB off-isolation at 10MHz. Measured crosstalk between active and disabled channels is <–55dB, ensuring minimal interference in mixed-signal or time-division multiplexed systems. Turn-off glitch is limited to ±20mV, preventing false triggering in downstream circuitry.
What is the recommended feedback resistor value for G = +2V/V operation with 100Ω load?
For G = +2V/V with 100Ω load, TI specifies RF = 604Ω and RG = 604Ω in split-supply configuration. This yields an effective load of 92.3Ω (100Ω || 1208Ω), matching typical test conditions. Bandwidth is optimized at this value; deviation increases peaking or reduces flatness - verified in Figure 2 of the SBOS355A datasheet.
Does the OPA3695IDBQ meet broadcast video standards for differential gain and phase?
Yes, the OPA3695IDBQ achieves 0.04% differential gain error and 0.007° differential phase error under NTSC conditions (G = +2, VO = 1.4VPP, RL = 150Ω), exceeding SMPTE RP 168 and ITU-R BT.601 requirements. These values are measured and guaranteed over temperature, confirming suitability for professional video equipment certification.
OPA3695IDBQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Amplifier Type:
- Current Feedback
- Number of Circuits:
- 3
- Output Type:
- -
- Slew Rate:
- 2400V/µs
- Gain Bandwidth Product:
- 1 kHz
- -3db Bandwidth:
- 1 GHz
- Current - Input Bias:
- 20 µA
- Voltage - Input Offset:
- 300 µV
- Current - Supply:
- 12.9mA (x3 Channels)
- Current - Output / Channel:
- 120 mA
- Voltage - Supply Span (Min):
- 3.5 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
OPA3695IDBQ FAQ
1.How can I place an order for OPA3695IDBQ through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA3695IDBQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA3695IDBQ reliable?
The price and inventory of OPA3695IDBQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA3695IDBQ is usually 5 days.
3.What payment methods are accepted for OPA3695IDBQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA3695IDBQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA3695IDBQ?
OPA3695IDBQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA3695IDBQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA3695IDBQ?
For technical support, including OPA3695IDBQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA3695IDBQ requirements.
6.How does Aetrix verify that OPA3695IDBQ is sourced from the original manufacturer or authorized distributors?
All OPA3695IDBQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA3695IDBQ meets industry standards.
7.What is the process for return or replacement of OPA3695IDBQ?
All OPA3695IDBQ units undergo pre-shipment inspection (PSI). If there is an issue with OPA3695IDBQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA3695IDBQ part is unused and in its original packaging.
Return procedure for OPA3695IDBQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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