Texas Instruments OPA404KUE4
- Part No.:
- OPA404KUE4
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
OPA404KUE4.pdf
- Description:
- IC OPAMP GP 4 CIRCUIT 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,960
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Product details
Overview
OPA404KUE4 from Texas Instruments (formerly Burr-Brown) is a quad high-speed precision Difet® operational amplifier optimized for low-bias-current, wide-bandwidth signal conditioning in precision analog front-ends. It delivers 6.4 MHz gain bandwidth, 35 V/µs slew rate, ±750 µV max input offset voltage, ±4 pA max input bias current, and 1.5 µs settling to 0.01% - enabling high-fidelity amplification in photodiode interfaces, ultrasound receive chains, and medical sensor circuits.
For engineers reviewing the OPA404KUE4 datasheet, OPA404KUE4 pinout, OPA404KUE4 application, or OPA404KUE4 equivalent, this page provides verified technical context, validated pin-level design meaning, real-world application constraints, and two confirmed alternative parts with documented functional trade-offs for instrumentation-grade op amp selection.
Technical Context
The OPA404KUE4 employs a dielectrically isolated FET (Difet®) input stage with cascode architecture, decoupling ultra-low input bias current (±4 pA max) from high-speed performance - unlike conventional BIFET amplifiers whose bias current degrades with common-mode voltage. Its laser-trimmed thin-film resistors achieve ±750 µV max offset and ±5 µV/°C drift over 0°C to +70°C.
It is unity-gain stable, supports ±15 V supply operation, and features standard 16-pin SOIC pinout with four independent amplifiers sharing dual supplies. Input common-mode range extends to ±10.5 V, output swing reaches ±11.5 V into 2 kΩ, and channel separation exceeds 125 dB at 100 Hz - critical for multi-channel synchronous acquisition systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Bandwidth | 6.4 MHz - enables stable closed-loop gain ≥100 at 64 kHz without phase margin loss. |
| Slew Rate | 35 V/µs - supports full-scale 20 Vp-p output at ≥570 kHz without slewing distortion. |
| Input Offset Voltage | ±750 µV max - ensures ≤7.5 µV error in 10× gain stages; laser-trimmed for minimal drift. |
| Input Bias Current | ±4 pA max - allows use with >1 GΩ feedback networks without significant DC error. |
| Settling Time | 1.5 µs to 0.01% - meets timing requirements for 16-bit ADC drivers with 10 V step inputs. |
| Common-Mode Rejection | 92 dB min - rejects >12× common-mode interference in differential sensor interfaces. |
| Supply Voltage Range | ±5 V to ±18 V - accommodates industrial ±12 V and precision ±15 V rails. |
Pinout & Package
OPA404KUE4 is housed in a 16-pin plastic SOIC (DW package), 7.5 mm × 10.3 mm footprint, 1.75 mm height, moisture sensitivity level 3 (260°C reflow). Pin 1 is located at top-left corner with notch or dot marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Output A | Amplifier A output; capable of ±11.5 V swing into 2 kΩ load. |
| 2 | Inverting Input A | High-impedance FET node; bias current ≤±4 pA enables >1 TΩ effective input resistance. |
| 3 | Non-Inverting Input A | Matched to Pin 2; cascode structure maintains low bias current across ±10.5 V common-mode range. |
| 4 | +VCC | Positive supply rail; must be decoupled with ≥0.1 µF ceramic capacitor near pin. |
| 5 | Non-Inverting Input B | Independent input for second amplifier; electrically isolated from other channels. |
| 6 | Inverting Input B | Paired with Pin 5; identical specs to Pins 2–3 for matched dual-channel designs. |
| 7 | Output B | Amplifier B output; shares same AC/DC performance as Pin 1. |
| 8 | NC | No internal connection; must remain unconnected per datasheet. |
| 9 | Output D | Amplifier D output; fourth independent channel with full spec compliance. |
| 10 | Inverting Input D | Channel D inverting input; supports guard-driven layouts for leakage-sensitive applications. |
| 11 | Non-Inverting Input D | Channel D non-inverting input; symmetric layout enables balanced multi-channel filtering. |
| 12 | –VCC | Negative supply rail; requires local 0.1 µF decoupling; absolute max = –18 V. |
| 13 | Non-Inverting Input C | Channel C non-inverting input; pin-compatible with industry-standard quad op amp footprints. |
| 14 | Inverting Input C | Channel C inverting input; matched offset and drift to other channels. |
| 15 | Output C | Amplifier C output; fully specified for 0.01% settling and 35 V/µs slew. |
| 16 | NC | No internal connection; floating; no routing or grounding required. |
Key Features
| Feature | Design Value |
|---|---|
| Difet® cascode input stage | Maintains ±4 pA max bias current across full ±10.5 V common-mode range - unlike BIFET amplifiers where bias current rises sharply beyond ±5 V. |
| Laser-trimmed thin-film resistors | Delivers ±750 µV max input offset and ±5 µV/°C drift over 0°C to +70°C - best-in-class for quad FET op amps. |
| Standard quad SOIC pinout | Enables drop-in replacement of legacy 14-pin DIP designs using adapter PCBs or direct SOIC socketing - no schematic change needed for channel count. |
| Unity-gain stability | Operates stably at gain = +1 without external compensation; supports buffer, integrator, and active filter configurations without risk of oscillation. |
| 125 dB channel separation | Prevents crosstalk-induced measurement errors in simultaneous multi-channel acquisition (e.g., detector arrays, ultrasound beamforming). |
Applications
| Photodiode Signal Amplification | Ultrasound Receive Chain |
|---|---|
|
Use Scenario: Amplifying weak current signals from UDT Pin-040A photodiodes in optical spectrometers, with <1 pA input leakage tolerance. IC Role / Device Role / Timing Role: Transimpedance amplifier with 1 GΩ feedback resistor; OPA404KUE4 provides low-noise, low-drift gain while rejecting board leakage. Use Value: Enables sub-10 µV input-referred offset and <0.1 mV/s droop in peak-hold circuits - critical for ppm-level absorbance accuracy. |
Use Scenario: Conditioning echo signals from piezoelectric transducers in portable ultrasound machines operating at 2–15 MHz center frequencies. IC Role / Device Role / Timing Role: First-stage low-noise amplifier in multi-channel analog front-end; handles 100 kHz–1 MHz bandwidth with minimal group delay variation. Use Value: 6.4 MHz GBW and 35 V/µs slew rate support 12-bit ENOB at 1 MSPS sampling; 1.5 µs settling ensures accurate time-of-flight measurement. |
| Medical ECG/EEG Front-End | Professional Audio Line Driver |
|
Use Scenario: Biopotential amplification in Class III medical devices requiring >100 dB CMRR and <10 fA/√Hz current noise for microvolt-level neural signals. IC Role / Device Role / Timing Role: Instrumentation-grade buffer and gain stage; operates from ±12 V rails with guard-driven PCB layout. Use Value: 92 dB min CMRR and ±4 pA bias current prevent electrode polarization artifacts and enable >10 s time constants in high-pass filtering. |
Use Scenario: Low-distortion line driver in studio mixing consoles handling ±10 V signals with THD+N <0.001% at 1 kHz. IC Role / Device Role / Timing Role: Unity-gain stable output buffer driving 600 Ω professional audio loads; configured with split-supply symmetry. Use Value: 125 dB channel separation prevents stereo crosstalk; 15 nV/√Hz voltage noise preserves dynamic range above 110 dB(A). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar precision quad operational amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA4134UA | Lower GBW (8 MHz), higher bias current (±10 pA), no laser trimming (±1 mV offset) | Better audio THD+N but less suitable for pA-level photodiode or EEG front-ends | Select when cost-sensitive audio line driving dominates over ultra-low bias current needs |
| AD8629ARUZ | Rail-to-rail output, lower supply range (±2.5 V to ±16 V), higher offset drift (±0.8 µV/°C) | Superior for single-supply battery-powered sensors; not unity-gain stable without compensation | Choose for portable medical devices needing rail-to-rail swing, accepting reduced speed and stability margin |
Compared with OPA404KUE4, OPA4134UA trades ultra-low bias current for lower cost and better audio linearity, while AD8629ARUZ sacrifices speed and laser-trimmed stability for rail-to-rail operation and lower voltage operation - neither matches OPA404KUE4's combination of 6.4 MHz GBW, ±4 pA bias, and 0.01% settling in a quad SOIC.
Availability
OPA404KUE4 is available at Aetrix Electronics and suitable for precision instrumentation, medical equipment, and ultrasound systems requiring stable component supply with long-term traceability and controlled obsolescence management.
Supply support for OPA404KUE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired Burr-Brown Corporation in 2000 and maintains its precision analog portfolio, including Difet® technology heritage. TI is a global leader in high-performance analog ICs with focus on signal chain integrity and reliability.
The OPA404KUE4 belongs to TI's legacy precision op amp product line, designed specifically for applications demanding simultaneous low input bias current, wide bandwidth, and low offset - such as scientific instrumentation and diagnostic imaging front-ends.
FAQ
What is the maximum operating temperature range for the OPA404KUE4?
The OPA404KUE4 is specified for operation from 0°C to +70°C ambient temperature. Its ceramic DIP variants (e.g., OPA404AG) extend to –25°C to +85°C, but the KU suffix explicitly denotes the 0°C to +70°C plastic SOIC version. Junction temperature must not exceed +175°C under any condition, and thermal derating applies above +70°C ambient.
Does the OPA404KUE4 require external offset nulling circuitry?
No - the OPA404KUE4 uses laser-trimmed thin-film resistors to achieve ±750 µV max input offset voltage and ±5 µV/°C drift, eliminating need for external trim in most applications. Figure 1 in the datasheet shows optional summing-based offset adjustment only for cases demanding sub-µV residual error, with no degradation to drift performance.
Can the OPA404KUE4 drive capacitive loads without instability?
Yes - the OPA404KUE4 is stable with up to 1000 pF capacitive load at unity gain, per the "Load Capacitance Stability" specification. For loads >100 pF, TI recommends adding a small series resistor (e.g., 10–50 Ω) between output and capacitance to maintain phase margin, especially in photodiode transimpedance configurations.
Is the OPA404KUE4 pin-compatible with standard quad op amp footprints?
Yes - the OPA404KUE4 uses the industry-standard 16-pin SOIC (DW) package with pin 1 at top-left, matching the physical layout of many quad op amps. However, it has two NC pins (8 and 16), whereas some competitors use all 16 pins; PCB layout must respect these no-connect assignments to avoid unintended coupling.
How does the Difet® input stage of the OPA404KUE4 differ from conventional BIFET amplifiers?
The OPA404KUE4's Difet® cascode input stage isolates gate voltage from drain-source potential, preventing bias current increase with common-mode voltage - unlike BIFET amplifiers where bias current rises exponentially beyond ±5 V. This allows stable ±4 pA operation across ±10.5 V common-mode range, critical for wide-dynamic-range sensor interfaces.
OPA404KUE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- Difet®
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 4
- Output Type:
- -
- Slew Rate:
- 35V/µs
- Gain Bandwidth Product:
- 6.4 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 1 pA
- Voltage - Input Offset:
- 260 µV
- Current - Supply:
- 9mA (x4 Channels)
- Current - Output / Channel:
- 10 mA
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
OPA404KUE4 FAQ
1.How can I place an order for OPA404KUE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA404KUE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA404KUE4 reliable?
The price and inventory of OPA404KUE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA404KUE4 is usually 5 days.
3.What payment methods are accepted for OPA404KUE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA404KUE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA404KUE4?
OPA404KUE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA404KUE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA404KUE4?
For technical support, including OPA404KUE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA404KUE4 requirements.
6.How does Aetrix verify that OPA404KUE4 is sourced from the original manufacturer or authorized distributors?
All OPA404KUE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA404KUE4 meets industry standards.
7.What is the process for return or replacement of OPA404KUE4?
All OPA404KUE4 units undergo pre-shipment inspection (PSI). If there is an issue with OPA404KUE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA404KUE4 part is unused and in its original packaging.
Return procedure for OPA404KUE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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