Texas Instruments OPA689MJD

Overview

OPA689MJD from Texas Instruments is a gain ≥4 stable, wideband voltage-limiting operational amplifier in CDIP-8 (JD) package. It delivers 260 MHz small-signal bandwidth (G = 6), 1400 V/µs slew rate, ±15 mV limiting voltage accuracy, and 2.4 ns recovery from overdrive - enabling precision ADC input buffering and IF limiting in high-speed analog signal chains.

For engineers reviewing the OPA689MJD datasheet, OPA689MJD pinout, OPA689MJD application, or OPA689MJD equivalent, this page provides verified pin functions, real-world limiting performance data, confirmed single/dual-supply operation (±5 V or 5 V), and validated alternatives for voltage-limiting amplifier selection in RF, test equipment, and high-speed data acquisition systems.

Technical Context

The OPA689MJD implements output-stage voltage limiting via dedicated VH (pin 5) and VL (pin 8) terminals, decoupling limiter accuracy from gain configuration - unlike input-limiting architectures. Its decompensated design ensures stability only at G ≥ 4, trading unity-gain capability for enhanced bandwidth (260 MHz) and slew rate (1400 V/µs).

Limiter control operates independently of the op amp's linear path: when output approaches VH or VL, internal buffers clamp with ±15 mV offset and recover in 2.4 ns. This architecture supports fast transimpedance amplifiers, precision rectifiers, and comparator-like threshold detection without saturation-induced delay.

Key Specifications

Pinout & Package

OPA689MJD is housed in an industry-standard hermetic CDIP-8 (JD) package with 0.3-inch width, suitable for military/aerospace applications requiring extended temperature operation (–55°C to +125°C).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar voltage-limiting amplifier applications.

Compared with OPA688MJD and LMH6723MF/NOPB, the OPA689MJD uniquely combines guaranteed ±15 mV limiter accuracy, 2.4 ns recovery, and G ≥ 4 stability - making it the only choice for high-fidelity, gain-constrained limiting in 40+ MSPS data converters and burst-mode IF receivers.

Availability

OPA689MJD is available at Aetrix Electronics and suitable for high-speed ADC input buffering, IF limiting amplifiers, precision rectifiers, and high-speed comparator applications requiring stable component supply across aerospace, defense, and test equipment programs.

Supply support for OPA689MJD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of heritage in high-performance op amps and precision signal-chain solutions.

The OPA689MJD belongs to TI's OPAx689 family of voltage-limiting amplifiers, engineered specifically for applications demanding deterministic output clamping, rapid overdrive recovery, and wideband linearity - such as high-speed data acquisition and communications infrastructure.

FAQ

What is the minimum stable gain for OPA689MJD?

The OPA689MJD is decompensated and stable only for closed-loop gains ≥ 4. Attempting unity-gain or G = 2 configurations will cause peaking or oscillation. The datasheet confirms stability down to G = 4 with ≤8 dB gain peaking and 30 MHz 0.1-dB flatness - making it unsuitable as a general-purpose unity-gain buffer but optimal for fixed-gain high-speed stages.

Can OPA689MJD operate from a single 5-V supply?

Yes, OPA689MJD supports single 5-V supply operation with VICM = 2.5 V. In this mode, VH and VL are referenced to common-mode voltage (e.g., VH = VICM + 1.8 V = +4.3 V, VL = VICM – 1.8 V = +0.7 V), enabling rail-to-rail limited output swing. Performance metrics - including 210 MHz bandwidth (G = 6) and 1050 V/µs slew rate - are fully specified under 5-V conditions.

How does OPA689MJD achieve ±15 mV limiter accuracy?

OPA689MJD achieves ±15 mV limiter accuracy by implementing clamping at the output buffer stage rather than the input. This architecture isolates limiter error from open-loop gain variations and feedback network tolerances. The VH and VL pins control dedicated output-stage current sources, ensuring consistent offset across temperature (±15 mV typ, ±50 mV max) and all gain configurations.

What is the purpose of pins 1 (NC) and 5/8 (VH/VL) on OPA689MJD?

Pin 1 is unconnected (NC) and must remain floating - no PCB trace or component should attach to it. Pins 5 (VH) and 8 (VL) are dedicated limiter voltage inputs: VH sets the upper output clamp level, VL sets the lower clamp level. Their bias currents flow directionally (IVH > 0, IVL < 0), and they must be driven by low-impedance sources (e.g., resistive dividers or precision references) to maintain ±15 mV accuracy.

Is OPA689MJD suitable for transimpedance amplifier (TIA) applications?

Yes, OPA689MJD is explicitly validated for transimpedance amplifiers, as shown in Figure 35 of its datasheet. Its fast 2.4 ns recovery prevents baseline shift during photodiode current bursts, and its output limiting protects downstream circuitry from overload. With CF = 1.0 pF and CD = 5.0 pF, it achieves stable operation while preserving >200 MHz bandwidth - ideal for pulsed LIDAR and high-speed optical receivers.