Texas Instruments OPA728AIDRBT
- Part No.:
- OPA728AIDRBT
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 8-VDFN Exposed Pad
- Datasheet:
-
OPA728AIDRBT.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 8SON
- Quantity:
- Payment:

- Shipping:

Inventory:360
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Product details
Overview
OPA728AIDRBT from Texas Instruments is a single-channel, e-trim™ high-precision CMOS operational amplifier with shutdown functionality in an 8-pin DFN (DRB) package. It delivers 20MHz gain-bandwidth, 30V/µs slew rate, 150µV max input offset voltage, 1.5µV/°C max offset drift, and 6nV/√Hz input voltage noise at 100kHz - enabling high-fidelity signal conditioning in optical transimpedance amplifiers and precision ADC drivers.
For engineers reviewing the OPA728AIDRBT datasheet, OPA728AIDRBT pinout, OPA728AIDRBT application, or OPA728AIDRBT equivalent, key selection considerations include its 4V–12V supply range, rail-to-rail output swing within 150mV of rails (RL = 100kΩ), 6µA shutdown current, and REF/ENABLE interface for logic-controlled power gating in battery-powered instrumentation and optical networking systems.
Technical Context
The OPA728AIDRBT uses Texas Instruments' e-trim™ technology - digital trimming performed post-packaging to eliminate stress-induced parameter shifts - achieving 150µV max offset and 1.5µV/°C max drift over –40°C to +125°C. Its CMOS input stage provides 500pA max bias current and 10¹¹Ω||5pF differential input impedance.
It features a Class AB rail-to-rail output stage capable of sourcing/sinking 40mA, stable in unity-gain configuration, and includes dedicated ENABLE and REF pins for precise shutdown control referenced to V– or logic ground. The DFN-8 package has an exposed thermal die pad that must be soldered to V– for optimal thermal performance and reliability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain-Bandwidth Product | 20MHz - supports stable unity-gain operation and wideband filtering up to ~10MHz closed-loop bandwidth. |
| Input Offset Voltage (max) | 150µV - enables sub-16-bit error floor in precision sensor interfaces and DAC output buffers without external trimming. |
| Offset Drift (max) | 1.5µV/°C - ensures <1.2mV total drift over 0°C–85°C ambient, critical for uncalibrated industrial temperature sensing front-ends. |
| Slew Rate | 30V/µs - allows full-scale 5V step settling in ≤350ns (0.1%), suitable for driving 16-bit SAR ADCs like ADS8342. |
| Quiescent Current (active) | 4.3mA per amplifier - balances low-power operation with high-speed performance in portable test equipment. |
| Shutdown Current | 6µA typical - reduces system standby power by >99.8%, enabling long-duration optical monitoring in battery-powered ONET modules. |
| Input Voltage Noise (100kHz) | 6nV/√Hz - minimizes Johnson noise contribution in transimpedance amplifiers with photodiode capacitances up to 10pF. |
Pinout & Package
OPA728AIDRBT is housed in an 8-pin DFN (DRB) package with exposed thermal die pad on underside. The pad must be soldered to V– for thermal integrity and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Enable) | Shutdown control input | Active-high enable referenced to REF pin; < VREF+0.8V disables amplifier, > VREF+2V enables it. |
| 2 (V+) | Positive supply | Accepts 4V–12V single supply or ±2V–±6V dual supply; bypass with 1nF ceramic + 1µF tantalum. |
| 3 (OUT) | Amplifier output | Rail-to-rail output swings to within 150mV of V+ or V– under light load (100kΩ), supporting full dynamic range in 12V systems. |
| 4 (NC) | No internal connection | Not bonded; leave unconnected or tie to V– for mechanical stability (no electrical function). |
| 5 (REF) | Enable reference voltage | Reference point for Enable pin threshold; connect to V– in dual-supply configs to avoid level-shifting logic signals. |
| 6 (IN–) | Inverting input | High-impedance CMOS node (10¹¹Ω); requires guarded layout and low-leakage PCB cleaning for pA-level bias current applications. |
| 7 (IN+) | Non-inverting input | Common-mode range extends from V– to (V+)–2.5V - supports true single-supply operation with GND-referenced inputs. |
| 8 (V–) | Negative supply / ground | Must connect exposed thermal die pad to this pin; serves as return path for shutdown logic and output stage. |
Key Features
| Feature | Design Value |
|---|---|
| e-trim™ post-package digital trimming | Eliminates packaging-induced offset shift, delivering guaranteed 150µV max VOS and 1.5µV/°C max drift across –40°C to +125°C. |
| Shutdown mode with REF-referenced ENABLE | Reduces quiescent current from 4.3mA to 6µA while maintaining defined logic thresholds independent of supply rail voltages. |
| Rail-to-rail output stage | Delivers >10Vpp output swing from 12V supply with AOL > 110dB, maximizing SNR in single-supply data acquisition systems. |
| Low input bias current (≤500pA) | Enables high-gain transimpedance designs with photodiodes up to 10pF capacitance without significant DC error or instability. |
| Stable in unity-gain configuration | Eliminates need for external compensation in buffer and gain-of-one applications, reducing BOM count and layout complexity. |
Applications
| Optical Transimpedance Amplifier | High-Speed ADC Driver |
|---|---|
Use Scenario: Monitoring optical power in 2.5G/10G ONET receiver modules using PIN photodiodes. IC Role / Device Role / Timing Role: Converts photodiode current to voltage with 10MΩ–100MΩ transimpedance gain while rejecting common-mode noise. Use Value: 6nV/√Hz noise density and 500pA max bias current preserve signal integrity for sub-picoamp photocurrent detection. |
Use Scenario: Driving the analog input of 16-bit SAR ADCs (e.g., ADS8342) in automated test equipment. IC Role / Device Role / Timing Role: Buffers charge injection transients and settles to 16-bit accuracy (<1LSB error) within 600ns acquisition window. Use Value: 30V/µs slew rate and 350ns 0.1% settling time ensure full-scale step fidelity without missing codes. |
| Single-Supply Precision Instrumentation | Battery-Powered Sensor Signal Chain |
Use Scenario: Front-end amplification for strain gauge or RTD bridges operating from 5V microcontroller rails. IC Role / Device Role / Timing Role: Provides programmable gain, offset correction, and rail-to-rail output swing into ADC reference buffers. Use Value: Input common-mode range to GND and 150mV rail headroom maximize usable dynamic range in 5V systems. |
Use Scenario: Low-power signal conditioning in portable gas analyzers or handheld multimeters. IC Role / Device Role / Timing Role: Active component in measurement cycle; disabled between readings to extend battery life. Use Value: 6µA shutdown current enables multi-year operation on coin-cell batteries when paired with duty-cycled microcontrollers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA727AIDGKR | No shutdown function; same DFN-8 package, identical AC/DC specs except IQ = 4.3mA always active. | Preferred where continuous operation is required and board space precludes adding external enable logic. | Select OPA727AIDGKR if shutdown capability is unnecessary and lowest possible offset (150µV max) is prioritized without enable overhead. |
| OPA2727AIDRBR | Dual-channel version in same DFN-8 package; shares all specs per channel but doubles channel count at same footprint. | Suitable for differential-input stages or dual-path signal chains (e.g., I/Q demodulation) where space is constrained. | Choose OPA2727AIDRBR when two matched amplifiers are needed and thermal coupling benefits outweigh single-channel optimization. |
Compared with OPA727AIDGKR, OPA728AIDRBT adds logic-controllable shutdown at no penalty to precision or speed; versus OPA2727AIDRBR, it trades channel count for lower system-level power management complexity in single-amplifier roles.
Availability
OPA728AIDRBT is available at Aetrix Electronics and suitable for optical networking, precision data acquisition, and battery-powered instrumentation requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for OPA728AIDRBT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in precision amplifiers, data converters, and power management ICs.
The OPA728AIDRBT belongs to TI's e-trim™ precision op amp family, designed specifically for applications demanding ultra-low offset, minimal drift, and high-speed performance in harsh environments - including optical receivers, medical sensors, and industrial process control.
FAQ
What is the maximum operating temperature range for the OPA728AIDRBT?
The OPA728AIDRBT is specified for operation from –40°C to +125°C, with absolute maximum junction temperature rated at +150°C. Electrical characteristics including offset voltage, drift, and open-loop gain are guaranteed across this full industrial temperature range, making OPA728AIDRBT suitable for under-hood automotive and industrial control applications where ambient temperatures exceed 85°C.
How does the REF pin function in the OPA728AIDRBT shutdown circuit?
The REF pin on the OPA728AIDRBT establishes the reference voltage for the ENABLE pin threshold. When REF is tied to V– (as recommended in dual-supply configurations), the amplifier enables when ENABLE exceeds V– + 2V and disables when ENABLE falls below V– + 0.8V. This eliminates level-shifting requirements for standard CMOS logic, ensuring reliable shutdown control across varying supply conditions in OPA728AIDRBT-based designs.
Can the OPA728AIDRBT drive capacitive loads without external compensation?
The OPA728AIDRBT can drive up to 20pF capacitive loads in unity-gain configuration with minimal overshoot (<10%), as verified in TI's SBOS314H datasheet Figure 19. For heavier loads (>20pF) or higher gains, a small series resistor (10Ω–20Ω) inside the feedback loop - as shown in Figure 30 - improves stability without degrading DC accuracy. This behavior is intrinsic to the OPA728AIDRBT's internal compensation and does not require external capacitors.
What is the purpose of the exposed thermal die pad on the OPA728AIDRBT DFN package?
The exposed thermal die pad on the OPA728AIDRBT's DFN-8 package must be soldered directly to the PCB's V– plane to ensure mechanical reliability during thermal cycling and to dissipate heat effectively. TI specifies θJA = 46°C/W for this package - more than 3× better than MSOP-8 - enabling sustained 4.3mA operation at +125°C ambient. Leaving the pad unconnected risks parametric shift and premature failure in OPA728AIDRBT deployments.
Is the OPA728AIDRBT pin-compatible with other members of the OPA727/728 family?
Yes - the OPA728AIDRBT shares identical pinout with OPA727AIDGKR (MSOP-8) and OPA727AIDRBT (DFN-8), differing only in ENABLE/REF pin assignment versus NC pins. All DFN-8 variants (OPA727/OPA728) use the same DRB package marking (NSD) and land pattern. This allows direct substitution in existing layouts when upgrading from non-shutdown to shutdown functionality, provided REF and ENABLE routing is implemented.
OPA728AIDRBT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- e-trim™
- Package/Case:
- 8-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- Rail-to-Rail
- Slew Rate:
- 30V/µs
- Gain Bandwidth Product:
- 20 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 85 pA
- Voltage - Input Offset:
- 15 µV
- Current - Supply:
- 4.3mA
- Current - Output / Channel:
- 40 mA
- Voltage - Supply Span (Min):
- 4 V
- Voltage - Supply Span (Max):
- 12 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SON (3x3)
OPA728AIDRBT FAQ
1.How can I place an order for OPA728AIDRBT through Aetrix?
Please submit a Request for Quotation (RFQ) for OPA728AIDRBT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for OPA728AIDRBT reliable?
The price and inventory of OPA728AIDRBT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for OPA728AIDRBT is usually 5 days.
3.What payment methods are accepted for OPA728AIDRBT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for OPA728AIDRBT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for OPA728AIDRBT?
OPA728AIDRBT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your OPA728AIDRBT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for OPA728AIDRBT?
For technical support, including OPA728AIDRBT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your OPA728AIDRBT requirements.
6.How does Aetrix verify that OPA728AIDRBT is sourced from the original manufacturer or authorized distributors?
All OPA728AIDRBT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that OPA728AIDRBT meets industry standards.
7.What is the process for return or replacement of OPA728AIDRBT?
All OPA728AIDRBT units undergo pre-shipment inspection (PSI). If there is an issue with OPA728AIDRBT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The OPA728AIDRBT part is unused and in its original packaging.
Return procedure for OPA728AIDRBT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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