NXP Semiconductors P80C592FFA/00,518

Overview

P80C592FFA/00,518 from NXP Semiconductors (formerly Philips) is an 8-bit microcontroller with integrated CAN 2.0A controller, 16 kB on-chip ROM, 512 bytes internal RAM (2 × 256), and 10-bit ADC with 8 analog inputs. It operates at 1.2–16 MHz, supports CAN bus communication up to 1 Mbit/s, and targets automotive and industrial real-time control systems requiring robust serial networking and mixed-signal processing.

For engineers reviewing the P80C592FFA/00,518 datasheet, P80C592FFA/00,518 pinout, P80C592FFA/00,518 application, or P80C592FFA/00,518 equivalent, key selection criteria include its on-chip CAN 2.0A compliance, dual PWM outputs with programmable duty cycle, hardware DMA between CAN buffers and internal RAM, and support for Power-down, Idle, and CAN Sleep modes in harsh environments.

Technical Context

The P80C592FFA/00,518 implements an enhanced 80C51 CPU core with dedicated CAN protocol handling logic, including message buffering, arbitration, error detection, and bus failure management. Its CAN controller operates independently of the CPU via DMA transfers to internal RAM, reducing interrupt overhead.

It integrates a 10-bit successive-approximation ADC with 8 multiplexed inputs on Port 5, two 8-bit PWM outputs driven by a shared 8-bit counter and prescaler, and three 16-bit timers-including Timer T2 with four capture and three compare registers-enabling precise timing, event capture, and pulse generation in deterministic control loops.

Key Specifications

Pinout & Package

Package: PLCC68 (SOT188-2), plastic leaded chip carrier with 68 leads, surface-mount compatible, rated for industrial temperature range (−40 °C to +85 °C).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microcontroller-with-integrated-CAN applications.

Compared with P83C592FFA/00,518, the P80C592FFA/00,518 offers external program memory flexibility at the cost of added board complexity; versus T89C51CC02-UM, it provides legacy PLCC68 compatibility and proven automotive qualification but lacks Flash and extended CAN features.

Availability

P80C592FFA/00,518 is available at Aetrix Electronics and suitable for automotive body electronics, industrial CAN gateways, motor control feedback units, and smart sensor nodes requiring stable component supply across extended product lifecycles.

Supply support for P80C592FFA/00,518 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT markets, with deep heritage in automotive microcontrollers dating to Philips' 1990s CAN development.

The P80C592FFA/00,518 belongs to NXP's legacy 8-bit CAN microcontroller family, designed specifically for deterministic real-time control in electrically noisy automotive and industrial environments where integration, reliability, and CAN protocol compliance are critical.

FAQ

What is the maximum CAN bit rate supported by the P80C592FFA/00,518?

The P80C592FFA/00,518 supports a maximum CAN bit rate of 1 Mbit/s, compliant with ISO 11898-1 (CAN 2.0A). This performance is achievable with proper bus termination, cable length ≤ 40 m, and oscillator stability within specification. The on-chip CAN controller handles arbitration, error framing, and retransmission autonomously without CPU involvement, ensuring deterministic timing at full rate.

Does the P80C592FFA/00,518 include on-chip program memory?

No, the P80C592FFA/00,518 does not include on-chip ROM or Flash memory. It is the ROM-less variant of the P8xC592 family. Firmware must be loaded from external program memory (e.g., EPROM or Flash) using the EA pin configuration and standard 80C51 external bus interface. In contrast, the P83C592FFA/00,518 variant includes 16 kB factory-programmed ROM.

How many analog input channels does the ADC in the P80C592FFA/00,518 support?

The P80C592FFA/00,518 integrates a 10-bit ADC with eight analog input channels (ADC0–ADC7), all mapped to Port 5 pins. Channel selection is controlled via the AADR[2:0] bits in the ADCON register. Conversion time is fixed at 50 machine cycles (37.5 µs at 16 MHz), and results are stored across ADCH (upper 8 bits) and ADCON bits ADC.1/ADC.0 (lower 2 bits).

Can the P80C592FFA/00,518 operate in low-power modes with CAN wake-up capability?

Yes, the P80C592FFA/00,518 supports CAN Sleep Mode, Idle Mode, and Power-down Mode. In CAN Sleep Mode, the CPU halts while the CAN controller remains active and can generate a wake-up interrupt upon bus activity. The RST pin outputs a reset pulse after wake-up. This enables ultra-low-power operation in battery-backed nodes while retaining responsive bus participation-critical for telematics and remote sensors.

What package type and pin count does the P80C592FFA/00,518 use?

The P80C592FFA/00,518 uses a PLCC68 (plastic leaded chip carrier) package, also designated SOT188-2, with 68 leads. It is a surface-mount, square-outline package with J-leads, qualified for −40 °C to +85 °C operation. Pinout is fully documented in Figures 2 and 3 of the 1996 datasheet, including dual-function pins such as P1.6/CTX0 and P1.7/CTX1 for CAN physical layer interfacing.