NXP Semiconductors P87C51RC2BN,112
- Part No.:
- P87C51RC2BN,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 40-DIP (0.600", 15.24mm)
- Datasheet:
-
P87C51RC2BN,112.pdf
- Description:
- IC MCU 8BIT 32KB OTP 40DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
P87C51RC2BN,112 from NXP Semiconductors (formerly Philips) is an 8-bit OTP microcontroller based on the 80C51 architecture, featuring 32 KB on-chip OTP program memory, 512 B RAM, four 8-bit I/O ports, three 16-bit timers (T0/T1/T2), a full-duplex enhanced UART with framing error detection, and a Programmable Counter Array (PCA) supporting PWM and capture/compare functions. It operates at 2.7–5.5 V and supports both 6-clock and 12-clock modes for up to 30 MHz (6-clock) or 33 MHz (12-clock) operation - ideal for motor control and industrial embedded systems requiring precise timing and pulse-width modulation.
For engineers reviewing the P87C51RC2BN,112 datasheet, P87C51RC2BN,112 pinout, P87C51RC2BN,112 application, or P87C51RC2BN,112 equivalent, key selection criteria include its DIP40 package compatibility, OTP-based firmware immutability, dual clock mode flexibility, PCA-driven PWM capability, and support for low-voltage operation down to 2.7 V in industrial temperature range (0 °C to +70 °C).
Technical Context
The P87C51RC2BN,112 implements a static CMOS 80C51 core with 100% instruction set compatibility and extends it with hardware enhancements including Timer 2 (capture/compare), a 5-channel PCA module, and programmable clock-out via P1.0. Its dual clock mode (6- or 12-clock per machine cycle) is selectable either by OTP bit OX2 (via parallel programmer) or SFR bit X2 in CKCON, enabling performance scaling without hardware change.
It integrates power management features including Idle and Power-down modes, asynchronous port reset, and wake-up from Power-down via external interrupts (INT0/INT1). The enhanced UART supports automatic address recognition and framing error detection, while the PCA provides five independent capture/compare channels (CEX0–CEX4) and PWM outputs - all mapped to Port 1 pins with dedicated alternate functions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 80C51-compatible 8-bit CPU with Boolean processor and fully static operation |
| Program Memory | 32 KB one-time-programmable (OTP) ROM - firmware locked after programming, no reflash capability |
| Data Memory | 512 bytes on-chip RAM - sufficient for real-time control stacks and small data buffers |
| Clock Modes | Configurable 6-clock or 12-clock operation - 6-clock yields ~2× throughput vs standard 80C51 at same frequency |
| Max Operating Frequency | 30 MHz at 6-clock mode / 33 MHz at 12-clock mode (VCC = 5 V) - enables high-speed I/O and PWM resolution |
| I/O & Peripherals | 32 bidirectional I/O pins across four ports; three 16-bit timers; full-duplex UART; 5-channel PCA; watchdog timer |
| Supply Voltage | 2.7 V to 5.5 V - supports battery-backed and mixed-voltage industrial designs |
| Operating Temperature | 0 °C to +70 °C - validated for commercial/industrial ambient environments |
Pinout & Package
Package: 40-pin Plastic Dual In-Line Package (DIP40), SOT129-1 footprint, through-hole mountable, compatible with legacy 8051 development sockets and wave-soldering processes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.0–P0.7 (AD0–AD7) | Multiplexed address/data bus | Open-drain I/O during external memory access; requires external pull-ups for reliable digital input |
| P1.0–P1.7 | General-purpose I/O with PCA/T2 functions | CEX0–CEX4, T2, T2EX, ECI - enable hardware PWM, edge-triggered capture, and external clock input for PCA |
| P2.0–P2.7 (A8–A15) | High-order address bus / I/O | Provides upper address byte for 64 KB external memory expansion; retains I/O functionality when not used for addressing |
| P3.0–P3.7 | Multi-function I/O with serial/peripheral signals | RxD/TxD, INT0/INT1, T0/T1, WR/RD - supports UART communication, external interrupts, and external memory interface |
| RST | Active-high reset input | Requires ≥2 machine cycles (12/24 oscillator periods) high pulse; internal weak pull-down allows RC-based power-on reset |
| XTAL1/XTAL2 | Crystal oscillator inputs | Supports quartz crystal (1–33 MHz) or external clock source; XTAL2 unconnected when using external clock |
| EA/VPP | External access enable / programming voltage | High = execute from internal OTP; low = fetch code from external memory; also accepts VPP during parallel programming |
| ALE/PROG | Address latch enable / programming pulse | Outputs address latch strobe during external memory access; doubles as PROG signal for OTP programming |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Counter Array (PCA) | Five independent 16-bit modules (CEX0–CEX4) supporting PWM generation, input capture, and software-timed events - eliminates need for timer polling in motor control |
| Dual Clock Mode Selection | Hardware-selectable 6-clock or 12-clock operation via OTP bit or SFR - enables deterministic timing tuning without changing crystal or PCB layout |
| Enhanced UART with Framing Detection | Full-duplex serial interface with automatic address recognition and hardware framing error flag - improves robustness in multi-drop RS-485 networks |
| Low-Power Operation Modes | Idle mode halts CPU while preserving peripheral state; Power-down stops oscillator and reduces current to µA level - extends battery life in intermittent-sensing applications |
| Security and Code Protection | Three security bits and 64-byte encryption array - prevents unauthorized readout of OTP firmware content |
| Asynchronous Port Reset | Port pins enter defined state immediately upon RST assertion - avoids glitch-induced spurious outputs during power-up or brownout recovery |
Applications
| Motor Control System | Industrial PLC I/O Module |
|---|---|
Use Scenario: Closed-loop DC/BLDC motor drive with speed feedback and current sensing. IC Role / Device Role / Timing Role: Primary controller executing PID loop, generating PWM via PCA channels CEX0–CEX2, and managing UART-based HMI communication. Use Value: Hardware-accelerated PWM with <1 µs jitter and independent channel dead-time insertion reduce MCU load and improve motor efficiency. | Use Scenario: DIN-rail mounted remote I/O node collecting analog/digital sensor data and relaying via Modbus RTU. IC Role / Device Role / Timing Role: Protocol handler and I/O manager using UART for Modbus framing and PCA for precise 1 ms system tick generation. Use Value: On-chip 512 B RAM and 32 KB OTP accommodate Modbus stack + custom logic; dual clock mode ensures deterministic response under variable load. |
| Legacy Equipment Retrofit | Power Supply Monitoring Unit |
Use Scenario: Replacement of obsolete 8051-based control board in HVAC controller with minimal PCB redesign. IC Role / Device Role / Timing Role: Pin-compatible upgrade path leveraging identical DIP40 footprint and 80C51 instruction set compatibility. Use Value: Direct drop-in replacement with enhanced peripherals (PCA, T2, enhanced UART) adds diagnostics and communication without layout changes. | Use Scenario: AC-DC power supply with overvoltage/overcurrent protection and thermal shutdown monitoring. IC Role / Device Role / Timing Role: Safety-critical supervisor using INT0/INT1 for fast fault detection and PCA for accurate 100 µs sampling interval control. Use Value: Hardware interrupt latency <2 µs and deterministic 6-clock mode ensure sub-cycle response to fault conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT89C51RD2-24PU | 64 KB Flash (reprogrammable), 1 KB RAM, same DIP40 package, but lacks PCA and has different UART feature set | Better for prototyping and firmware iteration; unsuitable where OTP security or PCA-based PWM is required | Select when field firmware updates are needed; avoid if hardware PWM timing precision or code immutability is critical |
| P89C51RD2BN,112 | Same OTP size (64 KB), same PCA and UART features, but 64 KB ROM instead of 32 KB; otherwise identical pinout, package, and peripheral set | Higher memory capacity for larger control algorithms; same industrial temperature and voltage specs | Select when >32 KB code space is required; otherwise P87C51RC2BN,112 offers optimal cost/memory balance |
Compared with AT89C51RD2-24PU and P89C51RD2BN,112, the P87C51RC2BN,112 delivers optimal trade-off between OTP firmware security, PCA-driven PWM precision, and 32 KB code density - making it preferred for cost-sensitive, safety-aware industrial control where reprogramming is unnecessary.
Availability
P87C51RC2BN,112 is available at Aetrix Electronics and suitable for motor control systems, industrial PLC I/O modules, legacy equipment retrofits, and power supply monitoring units requiring stable component supply, long-term obsolescence management, and verified DIP40 through-hole compatibility.
Supply support for P87C51RC2BN,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader delivering secure, energy-efficient, and scalable solutions for automotive, industrial, IoT, and communication infrastructure markets.
The P87C51RC2BN,112 belongs to NXP's legacy 80C51 OTP microcontroller family, designed specifically for cost-effective, high-reliability industrial control applications where firmware integrity, deterministic timing, and long-lifecycle support are essential.
FAQ
What is the maximum operating frequency of the P87C51RC2BN,112?
The P87C51RC2BN,112 supports up to 30 MHz in 6-clock mode and 33 MHz in 12-clock mode at VCC = 5 V. At 3 V, the maximum frequency is 16 MHz. These limits are guaranteed across the 0 °C to +70 °C operating temperature range and reflect actual silicon performance - not theoretical peak values. The P87C51RC2BN,112 achieves this via advanced CMOS process optimization and dual-clock architecture.
Does the P87C51RC2BN,112 support in-system programming (ISP)?
No, the P87C51RC2BN,112 does not support in-system programming. It uses one-time-programmable (OTP) memory programmed via parallel programming using a commercial programmer and the EA/VPP pin. Unlike Flash-based variants, the P87C51RC2BN,112 firmware cannot be erased or rewritten after initial programming - ensuring code integrity and preventing unauthorized modification.
How many PWM channels does the P87C51RC2BN,112 provide?
The P87C51RC2BN,112 provides five independent PWM-capable channels via its Programmable Counter Array (PCA): CEX0 through CEX4 on Port 1 pins. Each channel supports configurable duty cycle, frequency, and edge-aligned or center-aligned output. This capability is implemented in hardware and does not consume CPU cycles - a key advantage over software-timed PWM on basic 8051 derivatives.
What package type is used for the P87C51RC2BN,112?
The P87C51RC2BN,112 uses a 40-pin Plastic Dual In-Line Package (DIP40), designated SOT129-1. It is through-hole mountable, compatible with standard 0.6-inch DIP sockets, and matches the pinout of legacy 8051 devices - enabling straightforward replacement in existing designs without PCB revision.
Can the P87C51RC2BN,112 operate from a 3.3 V supply?
Yes, the P87C51RC2BN,112 supports a supply voltage range of 2.7 V to 5.5 V, making it fully compatible with 3.3 V systems. At 3.3 V, it operates up to 16 MHz (per datasheet specification), maintaining full functionality of all peripherals including the PCA, UART, and timers - ideal for mixed-voltage industrial interfaces where 3.3 V logic coexists with 5 V sensors or actuators.
P87C51RC2BN,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 40-DIP (0.600", 15.24mm)
- Series:
- 87C
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- EBI/EMI, UART/USART
- Peripherals:
- POR, PWM, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 512 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
P87C51RC2BN,112 FAQ
1.How can I place an order for P87C51RC2BN,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for P87C51RC2BN,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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6.How does Aetrix verify that P87C51RC2BN,112 is sourced from the original manufacturer or authorized distributors?
All P87C51RC2BN,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P87C51RC2BN,112 meets industry standards.
7.What is the process for return or replacement of P87C51RC2BN,112?
All P87C51RC2BN,112 units undergo pre-shipment inspection (PSI). If there is an issue with P87C51RC2BN,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P87C51RC2BN,112 part is unused and in its original packaging.
Return procedure for P87C51RC2BN,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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