NXP Semiconductors P87C52X2BN,112
- Part No.:
- P87C52X2BN,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 40-DIP (0.600", 15.24mm)
- Datasheet:
-
P87C52X2BN,112.pdf
- Description:
- IC MCU 8BIT 8KB OTP 40DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
P87C52X2BN,112 from Philips Semiconductors is an 8-bit OTP microcontroller based on the enhanced 80C51 architecture, featuring 8 KB on-chip OTP ROM, 256 B RAM, three 16-bit timers/counters (T0/T1/T2), full-duplex UART with framing error detection, and dual clock modes (6- or 12-clock). It operates from 2.7 V to 5.5 V and supports up to 33 MHz at 5 V in 12-clock mode - widely used in industrial control panels requiring reliable firmware storage and low-voltage operation.
For engineers reviewing the P87C52X2BN,112 datasheet, P87C52X2BN,112 pinout, P87C52X2BN,112 application, or P87C52X2BN,112 equivalent, key selection criteria include OTP-based firmware security, DIP40 package compatibility with legacy prototyping, 256-byte RAM for real-time interrupt handling, and support for both idle and power-down low-power modes in embedded monitoring systems.
Technical Context
This device implements a static CMOS 80C51 core with fully bit-addressable SFRs, dual data pointers, and four priority-level nested interrupts. Its T2 timer supports capture/compare and programmable clock-out functions, while the UART includes automatic address recognition and framing error detection - enabling robust multi-drop serial communication without external logic.
The CKCON register controls 6-/12-clock mode switching at runtime, and the AUXR/AUXR1 registers enable low-power EPROM operation (LPEP) and wake-up-from-power-down via INT0/INT1. Security bits (3 OTP bits) prevent unauthorized code readout, and the oscillator supports crystal, resonator, or external clock input via XTAL1/XTAL2.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Enhanced 80C51 CPU with Boolean processor and static design - enables zero-frequency operation and deterministic timing for safety-critical polling loops. |
| Memory | 8 KB on-chip OTP ROM + 256 B RAM - provides non-volatile, field-programmable firmware storage without external memory interface overhead. |
| Timers | Three 16-bit timers: T0/T1 (standard) + T2 (enhanced with capture/compare and clock-out) - supports precise PWM generation, baud-rate independence, and synchronous peripheral timing. |
| Serial Interface | Full-duplex UART with framing error detection and automatic address recognition - eliminates software parity checking and enables reliable RS-485 multi-node addressing. |
| Power Modes | Idle mode (CPU halted, peripherals active) and Power-down mode (oscillator stopped, RAM retained down to 2.0 V) - reduces system power to µA range during sensor sleep cycles. |
| Operating Voltage | 2.7 V to 5.5 V - ensures compatibility with battery-backed 3.3 V systems and legacy 5 V industrial buses without level-shifting. |
| Max Clock Frequency | 33 MHz at 5 V (12-clock mode); 30 MHz at 5 V (6-clock mode); 16 MHz across full voltage range - delivers predictable instruction throughput for time-sensitive I/O servicing. |
Pinout & Package
Package: Plastic Dual In-line Package (DIP40), 40-pin, 600 mil width, 0 °C to +70 °C operating range (SOT129-1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.0–P0.7 | Port 0 bidirectional I/O / AD0–AD7 | Open-drain port serving as multiplexed address/data bus for external memory access - requires external pull-ups when used as general-purpose I/O. |
| P1.0/T2 | Port 1.0 / Timer 2 external count input | Dual-function pin supporting T2 clock input or general I/O - enables high-resolution event counting without consuming T0/T1 resources. |
| P1.1/T2EX | Port 1.1 / Timer 2 reload/capture control | Controls T2 capture trigger or reload source - essential for pulse-width measurement and frequency synthesis applications. |
| P2.0–P2.7 | Port 2 bidirectional I/O / A8–A15 | Provides high-order address byte during 16-bit external memory accesses - maintains full 64 KB addressing capability with minimal glue logic. |
| P3.0/RxD | Serial input | UART receive input with Schmitt-triggered input - improves noise immunity on long RS-232 traces in factory-floor environments. |
| P3.1/TxD | Serial output | UART transmit output with internal pull-up - drives standard RS-232 line drivers directly without external resistors. |
| P3.2/INT0 | External interrupt 0 input | Level-sensitive interrupt input supporting wake-up from Power-down mode - critical for emergency stop signal handling in machinery controllers. |
| RST | Reset input | Active-high reset requiring ≥2 machine cycles - integrates with RC-based power-on reset circuits using only capacitor and VCC. |
| XTAL1/XTAL2 | Oscillator input/output | Supports crystal (1–24 MHz), ceramic resonator, or external clock - enables precise timing for UART baud rates and real-time scheduling. |
| EA/VPP | External access enable / programming voltage | When high, executes from internal OTP; when low, fetches from external memory - allows seamless expansion beyond 8 KB code space. |
Key Features
| Feature | Design Value |
|---|---|
| OTP-based firmware security | Three programmable security bits prevent unauthorized code readout - protects proprietary control algorithms in OEM equipment. |
| Programmable clock-out on P1.0 | Generates 61 Hz–4 MHz (12-clock) or 122 Hz–8 MHz (6-clock) square wave - replaces external clock generators for ADC sampling or display refresh timing. |
| Low-power EPROM operation (LPEP) | AUXR.4 bit disables analog EPROM circuitry below 4 V - reduces supply current by ~2 mA in battery-powered portable instruments. |
| ONCE™ on-circuit emulation mode | Enables in-system debugging via ALE/PSEN handshake - eliminates socket removal during firmware validation in production test fixtures. |
| Asynchronous port reset | Resets I/O ports independently of CPU state - prevents glitch-induced latch-up during brown-out recovery in motor drive interfaces. |
Applications
| Industrial PLC I/O Module | Legacy Equipment Retrofit Controller |
|---|---|
Use Scenario: Replacing obsolete microcontrollers in DIN-rail mounted I/O modules that interface with 24 V DC sensors and solenoids. IC Role / Device Role / Timing Role: Main controller executing ladder logic scan cycles, managing discrete I/O via Port 0/2, and communicating via UART to HMI panels. Use Value: 8 KB OTP stores full control firmware; DIP40 package fits existing PCB footprints; 2.7–5.5 V operation tolerates industrial power fluctuations. | Use Scenario: Upgrading aging vending machine mainboards where firmware updates are infrequent but reliability is critical. IC Role / Device Role / Timing Role: System supervisor managing coin acceptor, bill validator, and dispenser motors via Port 1/3, with UART diagnostics to service terminals. Use Value: OTP prevents accidental corruption during field maintenance; Power-down mode extends battery backup life during mains outage. |
| Building Automation Sensor Node | Medical Device Front-Panel Controller |
Use Scenario: Standalone temperature/humidity node transmitting data over RS-485 to building management systems. IC Role / Device Role / Timing Role: Data acquisition engine reading analog sensors via external ADC, formatting packets, and driving half-duplex RS-485 transceiver via UART. Use Value: Framing error detection ensures packet integrity over noisy HVAC wiring; T2 timer generates precise 1-second sampling intervals. | Use Scenario: Control panel for infusion pumps requiring FDA-compliant firmware persistence and button/LED management. IC Role / Device Role / Timing Role: Human interface manager scanning membrane keypad matrix, driving LED indicators, and logging usage events to EEPROM via I²C (external). Use Value: Three priority-level interrupts guarantee timely response to emergency stop inputs; security bits prevent tampering with calibration constants. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT89C52-24PU | 8 KB Flash (not OTP), 24 MHz max, no T2 timer, no LPEP mode | Lacks programmable clock-out and advanced power modes; requires reprogramming for firmware updates | Choose for cost-sensitive designs needing field-upgradable firmware but accepting reduced peripheral integration. |
| P89C52X2BN,112 | Same family, 8 KB OTP, identical DIP40 pinout and SFR map, but newer revision with improved ESD tolerance | Direct drop-in replacement with enhanced manufacturing yield and extended lifecycle support | Preferred for new designs requiring long-term component availability and backward-compatible firmware migration. |
Compared with AT89C52-24PU and P89C52X2BN,112, the P87C52X2BN,112 offers OTP-based firmware immutability ideal for certified medical/industrial devices, while retaining full 80C51 software compatibility and superior low-power features for battery-buffered operation.
Availability
P87C52X2BN,112 is available at Aetrix Electronics and suitable for industrial PLC I/O modules, legacy equipment retrofit controllers, and building automation sensor nodes requiring stable component supply and long-term obsolescence management.
Supply support for P87C52X2BN,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Philips Semiconductors (now NXP Semiconductors) is a global semiconductor leader specializing in high-reliability mixed-signal ICs for industrial, automotive, and consumer applications.
The P87C5xX2 product line was designed specifically for cost-effective, pin-compatible upgrades of legacy 8051-based systems - emphasizing OTP security, wide voltage operation, and enhanced peripherals like T2 and programmable clock-out.
FAQ
What is the maximum operating frequency of the P87C52X2BN,112 at 3.3 V?
The P87C52X2BN,112 supports up to 16 MHz at any supply voltage from 2.7 V to 5.5 V in both 6-clock and 12-clock modes. At 3.3 V, this corresponds to 16 MHz (12-clock) or 16 MHz (6-clock), as the voltage-limited frequency ceiling is 16 MHz regardless of clock mode - verified in the "Operating Mode, Power Supply and Maximum External Clock Frequency" table on page 6 of the 2003 datasheet.
Does the P87C52X2BN,112 support in-system programming (ISP)?
No, the P87C52X2BN,112 uses One-Time Programmable (OTP) ROM and does not support in-system programming. Programming requires a parallel programmer with 12.75 V VPP applied to the EA/VPP pin (pin 20), as specified in the Pin Descriptions section (page 10) and confirmed in the Ordering Information tables. Firmware must be finalized before programming.
How does the P87C52X2BN,112 handle power-down wake-up events?
The P87C52X2BN,112 wakes from Power-down mode via hardware reset or enabled external interrupts (INT0 or INT1), provided WUPD bit (AUXR1.3) is set. Upon wake-up, the oscillator restarts and stabilizes (typically <10 ms), after which execution resumes from the instruction following the Power-down command - with all RAM and SFR contents preserved except on reset.
Can the P87C52X2BN,112's Timer 2 generate both a clock-out signal and serve as a baud-rate generator simultaneously?
Yes, the P87C52X2BN,112's Timer 2 can operate as both a clock-out generator and baud-rate generator concurrently. As stated on page 13, "It is possible to use Timer 2 as a baud-rate generator and a clock generator simultaneously", though both functions share the same frequency - meaning the UART baud rate and clock-out frequency will be identical in this configuration.
What is the function of the ALE/PROG pin on the P87C52X2BN,112 during normal operation?
During normal operation, the ALE/PROG pin (pin 30) outputs address latch enable pulses at 1/6 the oscillator frequency in 12-clock mode or 1/3 in 6-clock mode - providing a stable timing reference for external address latching in expanded memory systems. It can be disabled via SFR auxiliary.0 to reduce EMI, as documented in the Pin Descriptions section (page 10).
P87C52X2BN,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 40-DIP (0.600", 15.24mm)
- Series:
- 87C
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- EBI/EMI, UART/USART
- Peripherals:
- POR
- Number of I/O:
- 32
- Program Memory Size:
- 8KB (8K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 256 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
P87C52X2BN,112 FAQ
1.How can I place an order for P87C52X2BN,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for P87C52X2BN,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of P87C52X2BN,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P87C52X2BN,112 is usually 5 days.
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For technical support, including P87C52X2BN,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P87C52X2BN,112 requirements.
6.How does Aetrix verify that P87C52X2BN,112 is sourced from the original manufacturer or authorized distributors?
All P87C52X2BN,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P87C52X2BN,112 meets industry standards.
7.What is the process for return or replacement of P87C52X2BN,112?
All P87C52X2BN,112 units undergo pre-shipment inspection (PSI). If there is an issue with P87C52X2BN,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P87C52X2BN,112 part is unused and in its original packaging.
Return procedure for P87C52X2BN,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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