My Inquiry
My Account
NXP Semiconductors P87C58X2BN,112
- Part No.:
- P87C58X2BN,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 40-DIP (0.600", 15.24mm)
- Datasheet:
-
P87C58X2BN,112.pdf
- Description:
- IC MCU 8BIT 32KB OTP 40DIP
- Quantity:
- Payment:
- Shipping:
Inventory:2,884
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
P87C58X2BN,112 from NXP Semiconductors (formerly Philips Semiconductors) is a 8-bit 80C51-compatible microcontroller with 32 KB OTP ROM, 256 B RAM, and full-duplex UART, operating at up to 33 MHz in 12-clock mode across 2.7–5.5 V supply. It features three 16-bit timers (T0/T1/T2), six interrupt sources with four priority levels, and supports idle/power-down low-power modes - used in industrial control panels requiring embedded logic with external memory expansion.
For engineers reviewing the P87C58X2BN,112 datasheet, P87C58X2BN,112 pinout, P87C58X2BN,112 application, or P87C58X2BN,112 equivalent, key selection criteria include OTP program security (3-bit), 40-pin DIP package compatibility, 6-/12-clock mode software selectability, and T2-based programmable clock-out capability for system synchronization.
Technical Context
This device implements a static CMOS 80C51 core with dual clock architecture: 12-clock mode (default) delivers 33 MHz max at 5 V, while software-configurable 6-clock mode doubles instruction throughput. The CPU integrates dedicated SFRs for Timer 2 capture/compare, programmable clock-out (P1.0), and auxiliary control registers (AUXR, AUXR1) enabling low-power EPROM operation and wake-up-from-power-down via INT0/INT1.
Memory mapping supports up to 64 KB external program/data space using Port 0 (AD0–AD7) and Port 2 (A8–A15) with ALE strobing. The enhanced UART includes framing error detection and automatic address recognition, and all I/O ports feature internal pull-ups with configurable alternate functions - critical for legacy 8051-based industrial firmware migration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | 80C51-compatible 8-bit CPU with Boolean processor and static design enabling 0 Hz operation |
| Memory | 32 KB on-chip OTP ROM + 256 B RAM; supports external 64 KB program/data memory via multiplexed bus |
| Max Clock Frequency | 33 MHz at 5 V (12-clock mode); 30 MHz at 5 V (6-clock mode); 16 MHz at 2.7–5.5 V |
| Power Supply Range | 2.7 V to 5.5 V - enables direct interface with 3.3 V and 5 V logic without level shifters |
| Low-Power Modes | Idle mode (CPU halted, peripherals active); Power-down mode (oscillator stopped, RAM retained down to 2.0 V) |
| Interrupt System | Six sources (INT0/INT1/T0/T1/RxD/T2), four priority levels, nested interrupt handling |
| Timers/Counters | Three 16-bit timers: T0/T1 (standard 80C51), T2 (enhanced with capture, compare, auto-reload, clock-out) |
Pinout & Package
Package: Plastic Dual In-line Package (DIP40), 40 leads, 600 mil width, 0 °C to +70 °C operating range (SOT129-1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 40) | Power supply input | Primary 2.7–5.5 V supply rail; powers core, RAM, SFRs, and I/O drivers |
| VSS (Pin 20) | Ground reference | 0 V return path; must be low-impedance to prevent latch-up during power sequencing |
| P0.0–P0.7 (Pins 32–39) | Multiplexed AD bus | Open-drain bidirectional port; provides lower 8 bits of address/data during external memory access; requires external pull-ups |
| P1.0/T2 (Pin 1) | Timer 2 I/O / Clock-out | Configurable as T2 external count input or 50% duty cycle clock output (61 Hz–4 MHz at 16 MHz osc) |
| P2.0–P2.7 (Pins 21–28) | Upper address bus | Bidirectional port with internal pull-ups; outputs A8–A15 during 16-bit external memory accesses |
| P3.0/RxD (Pin 10) | Serial input | UART receive input; supports multi-processor communication and full-duplex asynchronous operation |
| RST (Pin 9) | Reset input | Active-high reset requiring ≥2 machine cycles (24/12 osc periods); enables power-on reset with RC network |
| XTAL1/XTAL2 (Pins 8/7) | Oscillator interface | Crystal/resonator connection points; XTAL1 accepts external clock source when XTAL2 is left floating |
Key Features
| Feature | Design Value |
|---|---|
| OTP Security Bits | 3-bit programming lock prevents unauthorized readout of 32 KB on-chip firmware |
| Programmable Clock-Out | 50% duty cycle output on P1.0 with frequency tunable via RCAP2H/L - eliminates need for external clock generator |
| 6-/12-Clock Mode Select | Software-controlled (CKCON.X2 bit) or OTP-programmed (OX2 bit) clock division - enables runtime performance scaling |
| Enhanced UART | Framing error detection and automatic address recognition support reliable RS-485 multi-drop networks |
| Wake-up from Power-Down | INT0 or INT1 level-sensitive interrupt resumes operation without SFR reset - preserves real-time state |
| Low EMI Operation | 6-clock mode, slew-rate controlled outputs, and ALE inhibit reduce radiated emissions in noise-sensitive environments |
Applications
| Industrial PLC I/O Module | Legacy Equipment Controller |
|---|---|
Use Scenario: Standalone I/O expansion module interfacing sensors/actuators via discrete TTL-level signals and RS-485. IC Role / Device Role / Timing Role: Main controller executing ladder logic interpreter; uses T2 for precise 10 ms task scheduling and UART for Modbus RTU communication. Use Value: 32 KB OTP accommodates full Modbus stack + application code; DIP40 package enables socket-based field replacement without PCB rework. |
Use Scenario: Retrofit controller replacing obsolete 8031/8051 systems in HVAC control panels with minimal hardware change. IC Role / Device Role / Timing Role: Drop-in 80C51 binary-compatible MCU; leverages existing assembly code, external EPROM, and 40-pin socket footprint. Use Value: Pin-for-pin and instruction-set compatibility eliminates firmware porting; OTP eliminates UV-erasable EPROM handling and programming infrastructure. |
| Embedded Data Logger | Power-Meter Firmware Core |
Use Scenario: Battery-backed data acquisition node logging analog inputs via external ADC and storing timestamps in EEPROM. IC Role / Device Role / Timing Role: Host processor managing SPI/I²C peripherals; uses idle mode between samples to extend battery life. Use Value: 256 B RAM sufficient for circular buffer + timestamp storage; low-voltage operation (2.7 V) extends usable battery range. |
Use Scenario: Revenue-grade electricity meter requiring secure firmware, tamper detection, and precise timekeeping. IC Role / Device Role / Timing Role: Secure execution engine; T2 captures zero-crossing events; OTP prevents firmware cloning. Use Value: 3-bit OTP security blocks firmware extraction; programmable clock-out synchronizes sampling with AC line frequency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| P87C58X2FA,112 | Same core, OTP, and pinout; extended temperature range (–40 °C to +85 °C) and PLCC44 package | Required for automotive under-hood or outdoor industrial enclosures | Select when operating ambient exceeds +70 °C or surface-mount assembly is preferred |
| P89C51RB2FA,112 | NXP's enhanced 80C51 derivative with 64 KB Flash, ISP capability, and additional peripherals (PCA, PWM) | Supports field firmware updates and higher integration; not OTP-locked or DIP-packaged | Choose for new designs needing reprogrammability and expanded I/O; not suitable for OTP/DIP legacy replacement |
Compared with P87C58X2BN,112, the P87C58X2FA,112 offers wider temperature tolerance in PLCC, while the P89C51RB2FA,112 replaces OTP with Flash and adds ISP - making it unsuitable for secure, socket-based legacy upgrades but superior for modern upgradable systems.
Availability
P87C58X2BN,112 is available at Aetrix Electronics and suitable for industrial control panels, legacy equipment retrofits, and embedded data loggers requiring stable component supply over extended production lifecycles.
Supply support for P87C58X2BN,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company formed from the spin-off of Philips Semiconductors in 2006, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The P87C58X2BN,112 belongs to NXP's legacy 80C51 OTP microcontroller family, designed specifically for cost-sensitive, long-lifecycle industrial applications where firmware security, pin compatibility, and DIP packaging are mandatory.
FAQ
What is the maximum operating frequency of the P87C58X2BN,112?
The P87C58X2BN,112 supports up to 33 MHz in 12-clock mode at 5 V ±10%, and up to 30 MHz in 6-clock mode at the same voltage. At lower supply voltages (2.7–5.5 V), the maximum frequency is limited to 16 MHz in both clock modes per the official Philips product data sheet dated 2003 Jan 24.
Does the P87C58X2BN,112 support in-system programming (ISP)?
No, the P87C58X2BN,112 does not support in-system programming. It uses one-time-programmable (OTP) ROM, which is programmed externally via a parallel programmer before soldering. Unlike Flash-based successors such as the P89C51RB2, the P87C58X2BN,112 firmware cannot be updated after installation.
What package type and pin count does the P87C58X2BN,112 use?
The P87C58X2BN,112 uses a 40-pin Plastic Dual In-line Package (DIP40), 600 mil width, conforming to SOT129-1 mechanical standard. Its pinout matches industry-standard 8051 DIP layouts, enabling direct replacement of legacy P80C51/P80C52 devices in through-hole assemblies.
How does the P87C58X2BN,112 handle power-down wake-up?
The P87C58X2BN,112 exits power-down mode via hardware reset or level-sensitive external interrupts on INT0 (P3.2) or INT1 (P3.3). When WUPD bit (AUXR1.3) is enabled, these interrupts preserve RAM and SFR contents upon wake-up - allowing seamless resumption of real-time tasks without full system reinitialization.
Is the P87C58X2BN,112 pin-compatible with other members of the P87C5xX2 family?
Yes, the P87C58X2BN,112 shares identical DIP40 pinout and electrical characteristics with P87C51X2BN, P87C52X2BN, and P87C54X2BN - differing only in on-chip ROM size (4 KB to 32 KB) and OTP configuration. This allows board-level scalability across firmware complexity tiers without layout changes.
P87C58X2BN,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 40-DIP (0.600", 15.24mm)
- Series:
- 87C
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- EBI/EMI, UART/USART
- Peripherals:
- POR
- Number of I/O:
- 32
- Program Memory Size:
- 32KB (32K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 256 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
P87C58X2BN,112 FAQ
1.How can I place an order for P87C58X2BN,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for P87C58X2BN,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P87C58X2BN,112 reliable?
The price and inventory of P87C58X2BN,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P87C58X2BN,112 is usually 5 days.
3.What payment methods are accepted for P87C58X2BN,112?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P87C58X2BN,112 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P87C58X2BN,112?
P87C58X2BN,112 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P87C58X2BN,112 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P87C58X2BN,112?
For technical support, including P87C58X2BN,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P87C58X2BN,112 requirements.
6.How does Aetrix verify that P87C58X2BN,112 is sourced from the original manufacturer or authorized distributors?
All P87C58X2BN,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P87C58X2BN,112 meets industry standards.
7.What is the process for return or replacement of P87C58X2BN,112?
All P87C58X2BN,112 units undergo pre-shipment inspection (PSI). If there is an issue with P87C58X2BN,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P87C58X2BN,112 part is unused and in its original packaging.
Return procedure for P87C58X2BN,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P87C58X2BN,112 Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
