NXP Semiconductors P87C654X2BBD,157
- Part No.:
- P87C654X2BBD,157
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 44-LQFP
- Datasheet:
-
P87C654X2BBD,157.pdf
- Description:
- IC MCU 8BIT 16KB OTP 44LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
P87C654X2BBD,157 from NXP Semiconductors (formerly Philips Semiconductors) is a single-chip 8-bit microcontroller based on the 80C51 architecture, featuring 16 kB OTP-ROM, 256 B RAM, and operation across 2.7–5.5 V supply. It supports dual clock modes (6-clock/12-clock), delivers up to 33 MHz at 5 V in 12-clock mode, and integrates three 16-bit timers, an enhanced UART with framing error detection, and I²C-bus interface - enabling use in motor control systems requiring PWM, high-speed I/O, and up/down counting.
For engineers reviewing the P87C654X2BBD,157 datasheet, P87C654X2BBD,157 pinout, P87C654X2BBD,157 application, or P87C654X2BBD,157 equivalent, key selection considerations include OTP-based firmware immutability, LQFP44 package compatibility with industrial PCB layouts, 6-clock mode for doubled instruction throughput versus standard 80C51, and dual data pointer support for efficient external memory access in embedded control firmware.
Technical Context
The P87C654X2BBD,157 implements a fully static CMOS 80C51 core with 100% instruction set compatibility and adds Timer 2 with capture/compare capability, programmable clock-out on P1.0, and fast I²C (SCL0/SDA0 on P1.6/P1.7). Its CKCON register (bit X2) and factory-programmed OTP bit OX2 jointly govern CPU clock division - with OX2 taking precedence when programmed for deterministic 6-clock operation.
Power management includes Idle mode (CPU halted, peripherals active) and Power-down mode (oscillator stopped, RAM/SFRs retained down to 2 V), both exitable via external interrupts INT0/INT1 configured as level-sensitive. The device also features asynchronous port reset, watchdog timer, security bits, and 64-byte encryption array for firmware protection in cost-sensitive industrial controllers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | 80C51-compatible 8-bit RISC core with Boolean processor and full static operation |
| Memory | 16 kB one-time-programmable (OTP) ROM + 256 B on-chip RAM; supports external RAM expansion up to 64 kB |
| Clock Performance | Up to 33 MHz at 5 V in 12-clock mode; up to 30 MHz in 6-clock mode - delivering effective 2× throughput vs standard 80C51 |
| Timers/Counters | Three 16-bit timers: T0/T1 (standard 80C51) + T2 (enhanced with capture, compare, auto-reload, and baud-rate generation) |
| Communication | Full-duplex enhanced UART (framing error detection, automatic address recognition) + hardware I²C interface (P1.6/SCL0, P1.7/SDA0) |
| Power Modes | Stop Clock (0 MHz operation), Idle (CPU halted, peripherals active), Power-down (oscillator off, RAM/SFRs retained ≥2 V) |
| Supply Voltage | 2.7–5.5 V operation with CMOS/TTL I/O compatibility; low-EMI features include ALE inhibit and slew-rate-controlled outputs |
Pinout & Package
LQFP44 package (SOT389–1), 10 × 10 × 1.4 mm body, 0–70 °C operating temperature range.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.0–P0.7 | Open-drain bidirectional I/O / AD0–AD7 multiplexed bus | Serves as low-order address/data bus during external memory access; requires external pull-ups for reliable high-impedance input |
| P1.0/T2 | Programmable clock-out / Timer2 external count input | Generates 50% duty-cycle clock (122 Hz–8 MHz @ 16 MHz OSC) when T2 configured as clock generator |
| P1.6/SCL0 & P1.7/SDA0 | I²C-bus clock/data lines | Open-drain interfaces supporting standard/fast-mode I²C communication without external transceivers |
| P3.0/RxD & P3.1/TxD | Enhanced UART serial I/O | Supports framing error detection and automatic address recognition for multi-drop bus applications |
| RST | Asynchronous reset input | Requires ≥2 machine cycles HIGH (12/24 oscillator periods) while oscillator runs; enables power-on reset with RC network |
| XTAL1/XTAL2 | Crystal oscillator inputs | Accepts quartz crystal or external clock source; XTAL2 left unconnected when using external clock drive on XTAL1 |
Key Features
| Feature | Design Value |
|---|---|
| Dual clock mode selection | Software-selectable 6-clock or 12-clock operation via CKCON.X2 bit; factory-programmed OTP bit OX2 enforces 6-clock mode for guaranteed performance |
| Timer 2 enhanced functionality | 16-bit timer with capture, compare, auto-reload (up/down), and independent baud-rate generation - usable simultaneously with clock-out on P1.0 |
| Security and firmware protection | Three user-configurable security bits + 64-byte encryption array prevent unauthorized readout of OTP program memory |
| Low-power operation | Power-down mode draws minimal current while retaining RAM/SFR state; wake-up via level-sensitive INT0/INT1 without reset |
| EMI reduction | Configurable ALE inhibit, slew-rate-controlled outputs, and 6-clock mode reduce radiated emissions in noise-sensitive industrial environments |
Applications
| Motor Control System | Industrial PLC I/O Module |
|---|---|
Use Scenario: Closed-loop DC/BLDC motor control with real-time PWM generation, position feedback decoding, and fault monitoring. IC Role / Device Role / Timing Role: Primary controller executing motion algorithms, generating synchronized PWM outputs via Timer 2 compare registers, and processing quadrature encoder inputs via T2EX capture. Use Value: 6-clock mode enables 33 MHz effective throughput for sub-10 µs interrupt latency; dual data pointers accelerate buffer management during high-speed ADC sampling. |
Use Scenario: Distributed digital I/O expansion node communicating over RS-485 with master PLC, handling discrete input debouncing and output latching. IC Role / Device Role / Timing Role: Standalone protocol handler managing Modbus RTU framing, UART error recovery, and local GPIO state synchronization. Use Value: Enhanced UART with framing error detection ensures robust serial communication; Power-down mode reduces standby power to <10 µA during bus idle periods. |
| Smart Energy Meter Interface | Legacy Equipment Retrofit Controller |
Use Scenario: Metering front-end interfacing with metrology ICs (e.g., ADE7758) via SPI/I²C and driving LCD segments via port-mapped GPIO. IC Role / Device Role / Timing Role: Peripheral coordinator aggregating sensor data, performing checksum validation, and updating display buffers using Timer 0 for precise refresh timing. Use Value: Integrated I²C (P1.6/P1.7) eliminates external level shifters; 256 B RAM suffices for dual-buffered telemetry packets before transmission. |
Use Scenario: Drop-in replacement for obsolete 80C51 variants in legacy industrial equipment where PCB layout and firmware binary compatibility are mandatory. IC Role / Device Role / Timing Role: Pin- and code-compatible upgrade path preserving existing assembly code, timing-critical ISRs, and external memory map. Use Value: 100% 80C51 instruction set compliance and identical SFR layout ensure zero-modification firmware reuse; LQFP44 footprint matches common PLCC44-to-LQFP adapter footprints. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT89C51RC2-SP | 16 kB Flash (reprogrammable) vs OTP; no built-in I²C; only two 16-bit timers | Lacks T2 capture/compare and hardware I²C - requires bit-banged I²C or external bridge for sensor interfacing | Select when field firmware updates are required and I²C is not needed; verify external memory timing with MOVX @DPTR |
| STC89C52RC-PDIP40 | 8 kB Flash, 512 B RAM, 33 MHz max; no T2 or I²C; different SFR mapping for extended peripherals | Missing Timer 2 and I²C hardware - limits motor control resolution and increases firmware overhead for serial protocols | Choose for cost-sensitive, low-complexity control where OTP immutability and advanced peripherals are unnecessary |
Compared with AT89C51RC2-SP and STC89C52RC-PDIP40, the P87C654X2BBD,157 provides deterministic OTP execution, integrated I²C for sensor networks, and Timer 2 for high-resolution PWM - making it uniquely suited for fixed-function industrial controllers where reliability, peripheral integration, and timing precision outweigh reprogrammability needs.
Availability
P87C654X2BBD,157 is available at Aetrix Electronics and suitable for motor control systems, industrial PLC I/O modules, smart energy meter interfaces, and legacy equipment retrofit programs requiring stable component supply and long-term obsolescence management.
Supply support for P87C654X2BBD,157 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors (originally Philips Semiconductors) designs high-reliability mixed-signal ICs for automotive, industrial, and consumer applications, with deep heritage in 8-bit microcontroller innovation.
The P87C654X2BBD,157 belongs to the P8xC654X2 family - engineered specifically for cost-effective, high-integration embedded control in motor drives, power supplies, and industrial automation where OTP security, dual clock modes, and enhanced peripherals deliver measurable design efficiency gains.
FAQ
What is the maximum operating frequency of the P87C654X2BBD,157 and under what conditions?
The P87C654X2BBD,157 operates up to 33 MHz at VCC = 5 V in 12-clock mode, and up to 30 MHz in 6-clock mode. These frequencies assume stable crystal or external clock input meeting AC timing specifications, ambient temperature within 0–70 °C, and proper decoupling per datasheet guidelines. Exceeding 33 MHz risks timing violations in internal logic paths and may cause UART or timer inaccuracies.
Does the P87C654X2BBD,157 support in-system programming or field firmware updates?
No - the P87C654X2BBD,157 uses one-time-programmable (OTP) ROM for program storage, which cannot be erased or rewritten after initial programming. Firmware must be verified and finalized prior to parallel programming using 87C51-compatible hardware. For field-upgradable applications, consider Flash-based alternatives like AT89C51RC2-SP.
How is the I²C interface implemented on the P87C654X2BBD,157 and what pins are used?
The P87C654X2BBD,157 implements a hardware I²C interface on Port 1 pins P1.6 (SCL0) and P1.7 (SDA0), both open-drain with internal pull-ups disabled by default. Configuration requires initializing S1CON, S1ADR, and S1DAT SFRs per Philips Application Note AN10322. No external transceivers are needed for standard-mode (100 kHz) or fast-mode (400 kHz) operation.
Can the P87C654X2BBD,157 generate a precise clock output, and if so, how is it configured?
Yes - the P87C654X2BBD,157 can output a precise 50% duty-cycle clock on P1.0 using Timer 2 in clock-out mode. Configuration requires clearing C/T2 (T2CON.1), setting T2OE (T2MOD.6), and enabling TR2 (T2CON.2); the frequency is determined by RCAP2H/RCAP2L reload values and oscillator speed. This eliminates need for external clock generators in synchronous peripheral interfacing.
What power-saving modes does the P87C654X2BBD,157 support, and how are they exited?
The P87C654X2BBD,157 supports Idle mode (CPU halted, peripherals active) and Power-down mode (oscillator stopped, RAM/SFRs retained ≥2 V). Both are exited by enabled interrupts (INT0/INT1 must be level-sensitive in Power-down) or hardware reset. In Power-down, VCC must stabilize before exit signal assertion; oscillator restart time is typically <10 ms.
P87C654X2BBD,157 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 44-LQFP
- Series:
- 87C
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 33MHz
- Connectivity:
- I2C, UART/USART
- Peripherals:
- POR, WDT
- Number of I/O:
- 32
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 256 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 5.5V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
P87C654X2BBD,157 FAQ
1.How can I place an order for P87C654X2BBD,157 through Aetrix?
Please submit a Request for Quotation (RFQ) for P87C654X2BBD,157 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P87C654X2BBD,157 reliable?
The price and inventory of P87C654X2BBD,157 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P87C654X2BBD,157 is usually 5 days.
3.What payment methods are accepted for P87C654X2BBD,157?
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P87C654X2BBD,157 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P87C654X2BBD,157 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P87C654X2BBD,157?
For technical support, including P87C654X2BBD,157 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P87C654X2BBD,157 requirements.
6.How does Aetrix verify that P87C654X2BBD,157 is sourced from the original manufacturer or authorized distributors?
All P87C654X2BBD,157 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P87C654X2BBD,157 meets industry standards.
7.What is the process for return or replacement of P87C654X2BBD,157?
All P87C654X2BBD,157 units undergo pre-shipment inspection (PSI). If there is an issue with P87C654X2BBD,157, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P87C654X2BBD,157 part is unused and in its original packaging.
Return procedure for P87C654X2BBD,157:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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