NXP Semiconductors P87LPC760BN,112
- Part No.:
- P87LPC760BN,112
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 14-DIP (0.300", 7.62mm)
- Datasheet:
-
P87LPC760BN,112.pdf
- Description:
- IC MCU 8BIT 1KB OTP 14DIP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
P87LPC760BN,112 from NXP Semiconductors (formerly Philips) is a 14-pin, OTP-based 80C51-compatible microcontroller optimized for low-cost, space-constrained embedded control applications. It integrates 1 kbyte EPROM, 128 byte RAM, one analog comparator, full-duplex UART, I²C interface, watchdog timer with on-chip oscillator, and programmable port configurations - all operating from 2.7 V to 6.0 V. Used in battery-powered sensors and simple industrial controllers.
For engineers reviewing the P87LPC760BN,112 datasheet, P87LPC760BN,112 pinout, P87LPC760BN,112 application, or P87LPC760BN,112 equivalent, key selection criteria include its 14-pin DIP package, 20 MHz max clock at 5 V, OTP memory security bits, configurable I/O slew rate, and dual power-down/idle modes with sub-1 µA typical current.
Technical Context
The P87LPC760BN,112 implements an accelerated 80C51 core executing instructions in 6 or 12 oscillator cycles - delivering twice the throughput of standard 80C51 at same frequency. Its CPU clock is derived from user-selectable oscillators: external crystal/resonator (X1/X2), internal RC, or external clock input, with optional CLKR/DIVM scaling.
Peripherals are tightly integrated via a single internal bus: UART supports Modes 0–3 with Timer 1 baud rate generation; I²C operates as master or slave with dedicated SDA/SCL pins and interrupt support; analog comparator features selectable reference (CMPREF), dual inputs (CIN1A/CIN1B), and interrupt capability; and four keypad interrupt inputs (P0.0–P0.3) enable matrix scanning without external logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Accelerated 80C51 - executes most instructions in 6/12 clocks; 2× speed vs standard 80C51 at same frequency. |
| Memory | 1 kbyte on-chip OTP EPROM (user-programmable), 128 byte RAM, 32 byte customer code space for serialization. |
| Operating Voltage | 2.7 V to 6.0 V - enables direct operation from single-cell Li-ion, 3.3 V, or 5 V rails without level shifting. |
| Max Clock Frequency | 20 MHz at VDD = 4.5–6.0 V; 10 MHz at VDD = 2.7–6.0 V - supports high-speed comms or low-power tradeoffs. |
| Power Modes | Idle mode (CPU halted, peripherals active); Power Down mode (1 µA typical) with wake-up on low-level INT0 or KBI. |
| I/O Configuration | 9–12 configurable I/O pins; per-pin output types: quasi-bidirectional, open-drain, push-pull, or input-only. |
| Analog Function | Single comparator with programmable reference (CMPREF), dual positive inputs (CIN1A/CIN1B), and CMF1 flag interrupt. |
Pinout & Package
Package: 14-pin plastic dual in-line package (DIP), 300 mil width (SOT27-1), lead pitch 0.1 inch, through-hole mount.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| P0.3 / CIN1B | Comparator 1 positive input B | Analog input only; digital I/O disabled when used for comparator function. |
| P0.4 / CIN1A | Comparator 1 positive input A | Primary analog input; supports voltage monitoring or threshold detection relative to CMPREF. |
| P0.5 / CMPREF | Comparator reference (negative) input | Accepts external reference or internal bandgap; sets comparison threshold for CIN1A/CIN1B. |
| P0.6 / CMP1 | Comparator 1 output | Open-drain digital output reflecting comparator result; requires pull-up for logic-high signaling. |
| P1.0 / TxD | UART transmit output | Asynchronous serial data out; compatible with RS-232 level shifters or TTL logic. |
| P1.1 / RxD | UART receive input | Asynchronous serial data in; Schmitt-triggered for noise immunity on noisy lines. |
| P1.2 / T0 / SCL | Timer 0 input / I²C clock | Dual-function: external counter input or open-drain I²C clock line (requires pull-up). |
| P1.3 / INT0 / SDA | External interrupt 0 / I²C data | Dual-function: edge-triggered interrupt source or open-drain I²C bidirectional data line. |
| P1.5 / RST | Reset input / port pin | Active-low reset (if enabled via EPROM config); otherwise functions as Schmitt-trigger input only. |
| P1.7 | General-purpose I/O | Configurable port pin; supports keypad interrupt (KBI) and LED drive (20 mA sink/source). |
| P2.0 / X2 / CLKOUT | Oscillator output / clock divider output | Crystal oscillator feedback or divided CPU clock (÷6) when internal RC/ext clock selected. |
| P2.1 / X1 | Oscillator input | Input to on-chip oscillator amplifier; supports crystal, resonator, or external clock source. |
| VDD | Power supply | Main supply for digital and analog blocks; supports 2.7–6.0 V operation with internal voltage regulation. |
| VSS | Ground reference | 0 V return path; must be low-impedance for stable analog comparator and reset operation. |
Key Features
| Feature | Design Value |
|---|---|
| Accelerated 80C51 core | 6-clock instruction cycle enables 20 MHz operation with 300 ns min. instruction time - reduces firmware latency in real-time control loops. |
| Configurable port outputs | Per-pin selection of quasi-bidirectional, open-drain, push-pull, or input-only modes - eliminates need for external buffers or pull-ups in mixed-signal designs. |
| On-chip RC oscillator | Eliminates external crystal/resonator; supports full functionality with only VDD and VSS connections - lowers BOM cost and PCB area. |
| LED drive capability | 20 mA sink/source per port pin - directly drives indicators or small displays without external drivers. |
| Slew-rate controlled outputs | ~10 ns minimum ramp time on all port outputs - reduces EMI in noise-sensitive environments like medical or automotive subsystems. |
| Two EPROM security bits | Prevents unauthorized read-out of 1 kbyte OTP code - protects firmware IP in consumer or industrial OEM products. |
Applications
| Industrial Sensor Node | Smart Appliance Control |
|---|---|
Use Scenario: Standalone temperature/humidity sensor with local threshold alert and UART reporting to host MCU. IC Role / Device Role / Timing Role: Primary controller executing sensor polling, analog comparator-based threshold detection, and UART telemetry transmission. Use Value: Single-chip solution replaces discrete comparator + 8-bit MCU; OTP memory secures calibration constants; low 1 µA Power Down current extends battery life. | Use Scenario: Front-panel keypad and LED status interface for washing machine or HVAC system. IC Role / Device Role / Timing Role: Dedicated UI controller handling matrix keypad scan (KBI), LED multiplexing, and I²C communication with main system MCU. Use Value: Offloads UI tasks from main processor; 20 mA LED drive eliminates external drivers; programmable Schmitt inputs reject switch bounce noise. |
| Low-Cost Power Monitor | Embedded Security Token |
Use Scenario: AC mains voltage sag detection and graceful shutdown signaling in UPS or power supply modules. IC Role / Device Role / Timing Role: Analog comparator monitors rectified AC against internal reference (CMPREF); triggers brownout interrupt and controls relay driver. Use Value: Integrated comparator + reset + watchdog eliminates 3–4 discrete components; low-voltage reset ensures deterministic shutdown below 2.7 V. | Use Scenario: Tamper-resistant device ID module storing encrypted serial number and challenge-response keys. IC Role / Device Role / Timing Role: Secure identity anchor using 32-byte customer code space for unique ID and EPROM security bits to prevent firmware extraction. Use Value: Prevents cloning via read protection; OTP ensures immutable identity; UART/I²C allow secure provisioning during manufacturing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT89LP2052-20PU | 2 kB Flash (not OTP), no on-chip comparator, no I²C, but includes SPI and enhanced power management. | Lacks analog comparator and I²C - unsuitable for sensor thresholding or multi-device bus systems. | Select when field reprogrammability is required and analog/I²C functions are handled externally. |
| STM8S003F3P6 | 16 MHz max, 8 kB Flash, integrated 10-bit ADC, no built-in comparator, but offers advanced timers and SWIM debug interface. | Higher integration (ADC, advanced PWM) but larger footprint (20-pin TSSOP) and no native comparator output pin. | Choose for designs needing ADC + PWM + debug; avoid if strict 14-pin DIP constraint or comparator output pin is mandatory. |
Compared with AT89LP2052-20PU and STM8S003F3P6, the P87LPC760BN,112 uniquely delivers OTP security, dedicated comparator output (CMP1), I²C master/slave, and 14-pin DIP compatibility - making it optimal for cost-sensitive, analog-aware, through-hole legacy designs where firmware immutability and minimal external components are critical.
Availability
P87LPC760BN,112 is available at Aetrix Electronics and suitable for industrial sensor nodes, appliance UI controllers, low-cost power monitors, and embedded security tokens requiring stable component supply across long-lifecycle production runs.
Supply support for P87LPC760BN,112 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and IoT applications.
The P87LPC760BN,112 belongs to NXP's legacy LPC700 family - designed specifically for ultra-low-pin-count, cost-optimized 8-bit control in space- and budget-constrained embedded systems.
FAQ
What is the maximum operating frequency of the P87LPC760BN,112 and under what voltage conditions?
The P87LPC760BN,112 supports up to 20 MHz operation when VDD is between 4.5 V and 6.0 V. At lower supply voltages (2.7 V to 6.0 V), the maximum frequency is reduced to 10 MHz to ensure timing margin and stability. This dual-frequency specification allows flexible power/performance tradeoffs in battery-powered or wide-input-range applications. The P87LPC760BN,112 uses an internal clock divider (DIVM) and oscillator configuration bits to enforce these limits automatically.
Does the P87LPC760BN,112 support in-system programming (ISP) or require external EPROM programmers?
The P87LPC760BN,112 does not support in-system programming; it requires parallel EPROM programming via its dedicated programming pins (VPP, P1.5/RST, P1.7, P2.0/CLKOUT, P2.1/X1) using a standard EPROM programmer. Its OTP (one-time programmable) EPROM structure means code cannot be erased or rewritten after initial programming. The P87LPC760BN,112 includes two EPROM security bits to prevent unauthorized readback of the programmed firmware.
How is the analog comparator in the P87LPC760BN,112 configured and what are its key electrical limits?
The P87LPC760BN,112 analog comparator uses P0.4 (CIN1A), P0.3 (CIN1B), and P0.5 (CMPREF) as inputs, with output on P0.6 (CMP1). It operates over the full 2.7–6.0 V supply range and supports input common-mode voltage up to VDD. Comparator offset is typically ±5 mV, and response time is <1 µs. The P87LPC760BN,112 comparator can generate interrupts (CMF1 flag) and toggle port outputs on overflow - enabling zero-crossing detection or window-comparator behavior with firmware support.
Can the P87LPC760BN,112 operate without any external oscillator components?
Yes - the P87LPC760BN,112 includes a factory-trimmed on-chip RC oscillator that supports full functionality with only VDD and VSS connections. When enabled via EPROM configuration bits, this oscillator provides clock frequencies from ~1 MHz to ~10 MHz (depending on VDD and temperature), eliminating crystals, capacitors, or resonators. The P87LPC760BN,112 also supports external clock input on X1, crystal/resonator on X1/X2, or medium/high-frequency crystal options - giving designers flexibility across cost, accuracy, and layout constraints.
What I/O drive strength and protection features does the P87LPC760BN,112 provide on its port pins?
The P87LPC760BN,112 provides 20 mA sink/source capability on all port pins - sufficient for direct LED driving or relay control. Each pin supports configurable output modes (quasi-bidirectional, open-drain, push-pull, input-only) and selectable Schmitt-trigger inputs for noise immunity. Outputs feature controlled slew rate (~10 ns min. ramp time) to reduce EMI. Port pins tolerate up to ±2 kV HBM ESD and operate safely within absolute maximum ratings of -0.5 V to VDD + 0.5 V - ensuring robustness in industrial environments. The P87LPC760BN,112 also includes PT0AD register to disable digital inputs on Port 0 pins used for analog functions.
P87LPC760BN,112 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 14-DIP (0.300", 7.62mm)
- Series:
- LPC700
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Core Processor:
- 8051
- Core Size:
- 8-Bit
- Speed:
- 20MHz
- Connectivity:
- I2C, UART/USART
- Peripherals:
- Brown-out Detect/Reset, LED, POR, WDT
- Number of I/O:
- 12
- Program Memory Size:
- 1KB (1K x 8)
- Program Memory Type:
- OTP
- EEPROM Size:
- -
- RAM Size:
- 128 x 8
- Voltage - Supply (Vcc/Vdd):
- 2.7V ~ 6V
- Data Converters:
- -
- Oscillator Type:
- Internal
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
P87LPC760BN,112 FAQ
1.How can I place an order for P87LPC760BN,112 through Aetrix?
Please submit a Request for Quotation (RFQ) for P87LPC760BN,112 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
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The price and inventory of P87LPC760BN,112 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P87LPC760BN,112 is usually 5 days.
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5.How can I obtain technical support or documentation for P87LPC760BN,112?
For technical support, including P87LPC760BN,112 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P87LPC760BN,112 requirements.
6.How does Aetrix verify that P87LPC760BN,112 is sourced from the original manufacturer or authorized distributors?
All P87LPC760BN,112 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P87LPC760BN,112 meets industry standards.
7.What is the process for return or replacement of P87LPC760BN,112?
All P87LPC760BN,112 units undergo pre-shipment inspection (PSI). If there is an issue with P87LPC760BN,112, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P87LPC760BN,112 part is unused and in its original packaging.
Return procedure for P87LPC760BN,112:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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